Patents by Inventor Yih Lee
Yih Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160267897Abstract: A sound-absorbing material has a membrane having multiple piezoelectric fibers, the fiber density of the membrane is below 50 g/m2, the thickness of the membrane is below 1 mm, sound-absorbing coefficient of the membrane is larger than 0.1 at absorbing frequency at 100 Hz+/-10%, and the sound-absorbing coefficient of the membrane is over 0.05 at absorbing frequency at 800 Hz to 1000 Hz. PVDF electrospinning nanofiber membranes of the present invention are thinner and more flexible compared to conventional sound-absorbing material, the membranes in the present invention performs excellent low frequency sound absorption with very thin membrane.Type: ApplicationFiled: January 28, 2016Publication date: September 15, 2016Inventors: Chang-Mou Wu, Min-Hui Chou, Jiunn-Yih Lee
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Publication number: 20160235342Abstract: A method to identify feature points associated with the heart valve movement, heart contraction or cardiac hemodynamics is revealed. The mechanocardiography (MCG) is a technology that makes use of vibrational waveforms acquired using at least one gravity sensor attached on one of the four heart valve auscultation sites on the body surface. The data of the electrocardiography (ECG) is recorded simultaneously with the MCG. The feature points are identified by comparing P, R and T points of synchronized ECG with the MCG spectrum. By the time sequences and amplitudes of the feature points, the method provides additional clinical information of cardiac cycle abnormalities for diagnosis.Type: ApplicationFiled: January 12, 2016Publication date: August 18, 2016Inventors: WEN-YEN LIN, MING-YIH LEE, PO-CHENG CHANG, WEN-ZHENG ZHOU
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Patent number: 9419786Abstract: A multi-lane serial link signal receiving system includes a clock generating circuit and a plurality of data receiving channels. The clock generating circuit provides a fundamental clock signal. Each of the data receiving channels receives an input signal and the fundamental clock signal, and includes a phase detecting circuit, a multi-order digital clock data recovery circuit and a phase adjusting circuit. The phase detecting circuit samples the input signal according to a sampling clock signal to generate a sampled signal. The multi-order digital clock data recovery circuit performs a digital clock data recovery process on the sampled signal to generate phase adjusting information. The phase adjusting circuit adjusts the phase of the fundamental clock signal according to the phase adjusting information to generate the sampling clock signal.Type: GrantFiled: March 27, 2015Date of Patent: August 16, 2016Assignee: MStar Semiconductor, Inc.Inventors: Po-Nien Lin, Meng-Tse Weng, Jiunn-Yih Lee
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Patent number: 9276592Abstract: A multimedia interface receiving circuit includes a phase-locked loop (PLL) and four signal processing channels. Each of the channels includes a phase detecting circuit. In a High-Definition Multimedia Interface (HDMI) configuration, one of the processing channels is disabled, and the PLL provides a locked clock signal to the other three processing channels. Each of the other three processing channels adjusts the phase of the locked clock signal to generate a sampling clock signal. In a DisplayPort (DP) configuration, the PLL changes to connect to the phase detecting circuit of one of the four signal processing channels to form an analog clock data recovery (ACDR) circuit to generate a fundamental clock signal. Each of the three other processing channels adjusts the phase of the fundamental clock signal to generate the sampling clock signal.Type: GrantFiled: December 24, 2014Date of Patent: March 1, 2016Assignee: MStar Semiconductor, Inc.Inventors: Po-Nien Lin, Jiunn-Yih Lee
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Patent number: 9166847Abstract: A signal receiving apparatus includes an equalization module, a coarse tuning module and a fine tuning module. The equalization module receives an input signal, and performs an equalization process on the input signal according to an equalization strength to generate an equalized signal. The coarse tuning module adjusts the equalization strength according to the equalized signal until the equalized signal satisfies a preliminary convergence condition. When the preliminary convergence condition is satisfied, the fine tuning module adjusts the equalization strength according to the equalized signal until the equalization strength satisfies a final convergence condition.Type: GrantFiled: January 15, 2015Date of Patent: October 20, 2015Assignee: MSTAR SEMICONDUCTOR, INC.Inventors: Po-Nien Lin, Jyun-Yang Shih, Jiunn-Yih Lee
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Publication number: 20150280761Abstract: A multi-lane serial link signal receiving system includes a clock generating circuit and a plurality of data receiving channels. The clock generating circuit provides a fundamental clock signal. Each of the data receiving channels receives an input signal and the fundamental clock signal, and includes a phase detecting circuit, a multi-order digital clock data recovery circuit and a phase adjusting circuit. The phase detecting circuit samples the input signal according to a sampling clock signal to generate a sampled signal. The multi-order digital clock data recovery circuit performs a digital clock data recovery process on the sampled signal to generate phase adjusting information. The phase adjusting circuit adjusts the phase of the fundamental clock signal according to the phase adjusting information to generate the sampling clock signal.Type: ApplicationFiled: March 27, 2015Publication date: October 1, 2015Inventors: Po-Nien Lin, Meng-Tse Weng, Jiunn-Yih Lee
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Publication number: 20150207652Abstract: A signal receiving apparatus includes an equalization module, a coarse tuning module and a fine tuning module. The equalization module receives an input signal, and performs an equalization process on the input signal according to an equalization strength to generate an equalized signal. The coarse tuning module adjusts the equalization strength according to the equalized signal until the equalized signal satisfies a preliminary convergence condition. When the preliminary convergence condition is satisfied, the fine tuning module adjusts the equalization strength according to the equalized signal until the equalization strength satisfies a final convergence condition.Type: ApplicationFiled: January 15, 2015Publication date: July 23, 2015Inventors: Po-Nien Lin, Jyun-Yang Shih, Jiunn-Yih Lee
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Publication number: 20150188697Abstract: A multimedia interface receiving circuit includes a phase-locked loop (PLL) and four signal processing channels. Each of the channels includes a phase detecting circuit. In a High-Definition Multimedia Interface (HDMI) configuration, one of the processing channels is disabled, and the PLL provides a locked clock signal to the other three processing channels. Each of the other three processing channels adjusts the phase of the locked clock signal to generate a sampling clock signal. In a DisplayPort (DP) configuration, the PLL changes to connect to the phase detecting circuit of one of the four signal processing channels to form an analog clock data recovery (ACDR) circuit to generate a fundamental clock signal. Each of the three other processing channels adjusts the phase of the fundamental clock signal to generate the sampling clock signal.Type: ApplicationFiled: December 24, 2014Publication date: July 2, 2015Inventors: Po-Nien Lin, Jiunn-Yih Lee
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Publication number: 20140258819Abstract: An information servicing method and an accompanying system use the VPN wireless communication channel of information service provider to transmit pure text contents of each information record to corresponding user devices, and use another wireless communication channel to transmit multimedia contents contained in the information record to the user devices; such that usage of communication bandwidth of the VPN wireless communication channel can be substantially minimized and the cost thereof can also be reduced. The information service provider includes a server which analyzes each information record in advance to obtain a goods symbol corresponding to the information record. The user device generates a chart by using the received goods symbol and its corresponding information record. The chart and the pure text content of the information record are integrated into a single page which is then actively displayed on the display of the user device.Type: ApplicationFiled: March 3, 2014Publication date: September 11, 2014Applicant: FONESTOCK TECHNOLOGY INC.Inventors: Chu Tsung Chen, Jun Yih Lee, Kuan Hao Huang
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Patent number: 8570071Abstract: A phase adjustment apparatus for providing a clock signal to a core circuit is provided. The core circuit is powered by a core voltage. The phase adjustment apparatus includes two clock receiving ends, a plurality of digital receiving ends and a combination circuit. The two clock receiving ends receive two original clocks having a same frequency while the two original clock signals possess different phases. The digital receiving ends receive a plurality of phase selection signals. The synthesizing circuit is powered by a first voltage lower than the core voltage, and generates the clock signal according to the phase control signals and the two original clock signals.Type: GrantFiled: January 4, 2012Date of Patent: October 29, 2013Assignee: MStar Semiconductor, Inc.Inventor: Jiunn-Yih Lee
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Publication number: 20130270014Abstract: The present invention relates to an intelligent weight monitoring system and the method thereof. The system comprises a weight monitoring module, a signal processing module, and a comparison module. The weight measuring module measures at least a weight of a sickbed having a patient, and produces and transmits at least a signal according to the measured weight. The signal processing module processes the signal for producing and transmitting physiological data to the comparison module. The comparison module judges if the patient is abnormal according to the physiological data for producing an abnormal signal. The patient's family members or nurses can get the abnormal signal produced by the comparison module real-timely. Thereby, appropriate medical measures can be applied according to the abnormal signal.Type: ApplicationFiled: November 30, 2012Publication date: October 17, 2013Applicants: CHANG GUNG UNIVERSITY, METAL INDUSTRIES RESEARCH & DEVELOPMENT CENTREInventors: CHANG-MING HU, MIN-YIH LEE, CHENG-YAO LIN, SUNG-LIANG HSIEH, HSIU-PIN WANG, CHIEN-MING HSU, TSUNG-YI LIN
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Publication number: 20130043909Abstract: A phase adjustment apparatus for providing a clock signal to a core circuit is provided. The core circuit is powered by a core voltage. The phase adjustment apparatus includes two clock receiving ends, a plurality of digital receiving ends and a combination circuit. The two clock receiving ends receive two original clocks having a same frequency while the two original clock signals possess different phases. The digital receiving ends receive a plurality of phase selection signals. The synthesizing circuit is powered by a first voltage lower than the core voltage, and generates the clock signal according to the phase control signals and the two original clock signals.Type: ApplicationFiled: January 4, 2012Publication date: February 21, 2013Applicant: MStar Semiconductor, Inc.Inventor: Jiunn-Yih LEE
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Publication number: 20110102730Abstract: The invention provides a liquid crystal device. The liquid crystal device includes a first transparent substrate and a second transparent substrate, wherein the first transparent substrate and the second transparent substrate are parallel to each other. Spacers are formed between the first transparent substrate and the second transparent substrate, to define a cavity; and a cholesteric liquid crystal is disposed into the cavity. Particularly, the liquid crystal device is coupled to a supply voltage, and three states of the liquid crystal device are selectively switched by adjusting the voltage, wherein the three states includes a first transparent state, a scattering state and a second transparent state.Type: ApplicationFiled: May 9, 2010Publication date: May 5, 2011Applicant: NATIONAL TAIWAN UNIVERSITYInventors: I-Hui Lee, Yu-Ching Chao, Yu-Chi Chen, Liang-Chao Chang, Chih-Cheng Hsu, Jiunn-Yih Lee, Tien-Lung Chiu, Jiun-Haw Lee
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Patent number: 7792377Abstract: A method of effective image authentication and image restoration by hiding watermarks in DCT (Discrete Cosine Transform) coefficients is presented. The basic concept is to embed the selected significant watermarking bits for authentication and restoration into the selected medium- and low-frequency DCT coefficients. Thus, the illegally tampered regions can be detected, and then the original information in that region can be extracted for restoration. Experimental results show that the proposed authentication and restoration techniques can be applied to a DVR (Digital Video Recorder) system, in which no original image information is involved, and it can effectively detect the illegally tampered region and restore the tampered region in the human visual perceptual quality by only using a little embedded original information.Type: GrantFiled: April 25, 2007Date of Patent: September 7, 2010Assignee: Huper Laboratories Co., Ltd.Inventors: Chao-Ho Chen, Chung-Yih Lee
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Patent number: 7668236Abstract: The present invention discloses a multi-stage cable equalizer, comprising a fixed gain device and an adjustable gain device. The fixed gain device compensates the loss caused by the cable at a major band, and the adjustable gain device further compensates the loss at adjusted bands. The multi-stage cable equalizer of the present invention exhibits advantages in design flexibility and reduced cost.Type: GrantFiled: December 5, 2005Date of Patent: February 23, 2010Assignee: Mstar Semiconductor, Inc.Inventor: Jiunn-Yih Lee
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Patent number: 7512797Abstract: An interface for facilitating facsimile transmission via a wireless communications device operatively connected to a wireless communications network, including: a modem suitable for being communicatively coupled to a facsimile machine; a controller coupled to the modem; and, a memory operatively coupled to the controller. The interface includes code to cause the modem to transmit a retrain request to the facsimile machine upon expiration of a given temporal period. The interface includes a circuit for selectively generating a ring signal corresponding to a plain old telephone service ring signal. The interface includes a circuit for selectively generating a hold signal corresponding to a plain old telephone service hold signal. And, the circuit includes code to cause the modem to transmit data indicative of white lines to the facsimile machine upon expiration of a given temporal period.Type: GrantFiled: May 22, 2007Date of Patent: March 31, 2009Assignee: CopyTele, Inc.Inventors: Frank J. DiSanto, Denis A. Krusos, Kao-Yih Lee, Roland H. Feibert
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Patent number: 7489775Abstract: An input method using standard numeric keypad which complies with CCITT standards and comprises a plurality of CCITT standard keys is disclosed. Each CCITT standard key has a corresponding CCITT key value. The method comprises the steps of: reassigning a first CCITT key value with an actuating key value of a first function; checking if the first CCITT key value is input, if “YES” then actuating the first function to reassign every CCITT key value with a new input key value of predetermined function; and, checking if any CCITT key value is input, if “YES” then performing the predetermined function corresponding to that input CCITT key value based on the first function. Therefore, all functions of the input method can be operated by using merely the CCITT standard keys without the need for other non-standard function keys.Type: GrantFiled: November 24, 2004Date of Patent: February 10, 2009Assignee: TelePac Technology Inc.Inventor: Jun-Yih Lee
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Patent number: 7447511Abstract: A method and a device for equalizing mode selection are disclosed. The method comprises steps of: providing first sampling pulses in response to an equalized signal; providing second sampling pulses lagging behind the first sampling pulses for a pre-determined phase shift for sampling the equalized signal; establishing a first observing window and a second observing window according to the first sampling pulses and the second sampling pulses, so as to determine whether each of a plurality of equalizing modes is good or bad; and selecting one equalizing mode among the plurality of equalizing modes.Type: GrantFiled: June 1, 2005Date of Patent: November 4, 2008Assignee: Mstar Semiconductor, Inc.Inventors: Ke-Chiang Huang, Kuo-Feng Hsu, Jiunn-Yih Lee, Hsian-Feng Liu
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Publication number: 20080267520Abstract: A method of effective image authentication and image restoration by hiding watermarks in DCT (Discrete Cosine Transform) coefficients is presented. The basic concept is to embed the selected significant watermarking bits for authentication and restoration into the selected medium- and low-frequency DCT coefficients. Thus, the illegally tampered regions can be detected, and then the original information in that region can be extracted for restoration. Experimental results show that the proposed authentication and restoration techniques can be applied to a DVR (Digital Video Recorder) system, in which no original image information is involved, and it can effectively detect the illegally tampered region and restore the tampered region in the human visual perceptual quality by only using a little embedded original information.Type: ApplicationFiled: April 25, 2007Publication date: October 30, 2008Inventors: Chao-Ho Chen, Chung-Yih Lee
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Publication number: 20080008310Abstract: An input method using standard numeric keypad which complies with CCITT standards and comprises a plurality of CCITT standard keys is disclosed. Each CCITT standard key has a corresponding CCITT key value. The method comprises the steps of: reassigning a first CCITT key value with an actuating key value of a first function; checking if the first CCITT key value is input, if “YES” then actuating the first function to reassign every CCITT key value with a new input key value of predetermined function; and, checking if any CCITT key value is input, if “YES” then performing the predetermined function corresponding to that input CCITT key value based on the first function. Therefore, all functions of the input method can be operated by using merely the CCITT standard keys without the need for other non-standard function keys.Type: ApplicationFiled: November 24, 2004Publication date: January 10, 2008Inventor: Jun-Yih Lee