Abstract: Circuit and method for controlling circuitry in a power converter device during a soft-start process is provided. Synchronous rectifier control circuitry is adapted to gradually apply a gate drive signal derived from the main switch of the power converter device to a freewheeling synchronous rectifier of the switching circuitry during the soft-start process.

Abstract: A method and apparatus for providing an asymmetrical backwards compatible communications signal that is capable of being decoded by QPSK and OQPSK receivers as well as PSK and QAM receivers is provided. The invention comprises a timing error accumulator coupled to a first bit stream. The first bit stream includes content that is common to the QPSK/OQPSK receiver and to the PSK/QAM receiver. A phase error accumulator is coupled to a second bit stream and adjusts the phase of symbols in the second bit stream. A phase and timing error compensator is coupled to the phase error accumulator and the timing error accumulator and adjusts the first and second bit streams received from the phase error accumulator and the timing error accumulator in order to reduce timing and phase errors. A higher order modulator coupled to the phase and timing error compensator is also provided. The higher order modulator processes the first and second bit streams to provide the asymmetrical backwards compatible signal.

Abstract: An energy recovery snubber circuit for a bidirectional power converter, a method of operation thereof and a power plant employing the bidirectional power converter. The bidirectional power converter has first and second inputs, an inductor coupled to the first input and a power switch coupled between the inductor and the second input. In one embodiment, the energy recovery snubber circuit includes: (1) a clamping capacitor coupled to the second input; (2) a clamping diode coupled between the clamping capacitor and the first input; and (3) a snubber inductor coupled to a node between the clamping capacitor and the clamping diode.

Abstract: Circuit and method for reducing voltage level variation in a bias voltage generated in a power converter device are provided. The method allows providing a first voltage source configured to supply a first voltage during one respective mode of operation of the power converter, wherein the level of the voltage supplied by the first voltage source is directly proportional to variation in an input voltage of the converter device. The method further allows providing a second voltage source configured to supply a second voltage during another respective mode of operation of the power converter, wherein the level of the voltage supplied by the second voltage source has a generally inverse proportional relationship relative to variation in the input voltage of the converter device. At least one circuit parameter is selected in the voltage sources to adjust the respective levels of the first and second voltages.

Abstract: Circuit and method for reducing voltage level variation in a bias voltage generated in a power converter device are provided. The method allows providing a first voltage source configured to supply a first voltage during one respective mode of operation of the power converter, wherein the level of the voltage supplied by the first voltage source is directly proportional to variation in an input voltage of the converter device. The method further allows providing a second voltage source configured to supply a second voltage during another respective mode of operation of the power converter, wherein the level of the voltage supplied by the second voltage source has a generally inverse proportional relationship relative to variation in the input voltage of the converter device. At least one circuit parameter is selected in the voltage sources to adjust the respective levels of the first and second voltages.

Abstract: A power converter device using synchronous rectifiers and method for controlling operation thereof are provided. A first synchronous rectifier is coupled to the secondary transformer winding to pass a voltage induced at the secondary winding in response to an input voltage supplied to the primary transformer winding during an on-state of a main power switch. A first drive circuit is coupled to the gate terminal of the first synchronous rectifier to selectively activate and deactivate the first rectifier in correspondence with the respective on and off states of the main power switch based on a gate voltage supplied by the first drive circuit, with at least one circuit parameter being selected in the first drive circuit for maintaining the gate voltage within a predefined range regardless of variation in the level of the input voltage.

Abstract: A combined interference cancellation communication system employing forward error code (FEC) decoding for high spectral efficiency satellite communications. The disclosed system enables efficient utilization of available bandwidth through overlapping adjacent channels. A receiver is used to receive a waveform having data information and noise information. A filter bank is coupled with the receiver to receive and filter waveform and output channel information received by the receiver. The channel information received includes a combination of data signals and adjacent channel interference signals. A demodulator is provided to provide an estimation signal representative of an estimation of at least one parameter of the channel information. Soft-input and soft-output decoders are provided to receive the channel information in order to calculate and estimate interference values based on the estimation signal.

Abstract: An approach for identifying a particular carrier among a plurality of carriers in a satellite communication system is disclosed. A transmitter multiplies an encoded signal by a prescribed periodic sequence to form a watermarked signal and transmits the watermarked signal associated with a particular carrier over a communication channel. A receiver tunes to one of the carriers and extracts a data sequence from the one carrier. The receiver multiplies the data sequence with the prescribed periodic sequence to form another watermarked signal and determines whether the watermarked signals match.

Abstract: A regulation circuit for a voltage-fed power converter, a method of operation thereof and a power converter employing the circuit or the method. The power converter has an inverter switch adapted to transfer power to a transformer. In one embodiment, the regulation circuit includes a switching network coupled to a tapped winding of the transformer. The switching network is operable to vary a turns ratio of the transformer, thereby regulating an output voltage of the power converter.

Abstract: A regulation circuit for a current-fed power converter having a power switch adapted to transfer power to a transformer. In one embodiment, the regulation circuit includes a switching network coupled to a tapped winding of the transformer and operable to vary a turns ratio of the transformer thereby regulating an output voltage of the power converter.

Abstract: A circuit for, and method of, reducing a preload current required to maintain a duty cycle of an asymmetrical DC/DC converter and a DC/DC converter incorporating the circuit or the method. In one embodiment, the circuit includes an auxiliary inductor, coupled in series with an output capacitor of the converter in an output current doubler thereof, that reduces ripple current in the output current doubler and thereby maintains the duty cycle.

Abstract: For use with a flyback converter having a modulator for providing a main switch control signal thereto and main and cross-regulated output circuits, the cross-regulated output circuit subject to ringing and resulting voltage excursion, a voltage excursion controller and a method of operating the same. In one embodiment, the controller includes: (1) a delay circuit, coupled to the modulator, that generates a delay signal based on the main switch control signal and (2) an auxiliary switch, associated with the cross-regulated output circuit, that receives the delay signal and opens to isolate at least a portion of the ringing within said cross-regulated output circuit.

Abstract: For use with a power converter having a power supply control circuit, a current startup bias circuit and a method of operating the same. In one embodiment, the circuit includes: (1) a charge reservoir that receives and stores a trickle current during a startup period of the power converter, a voltage of the charge reservoir increasing as the charge reservoir stores the trickle current and (2) a latch, coupled to the charge reservoir, that activates when the voltage reaches a threshold to couple the charge reservoir to the power supply control circuit and initiate operation thereof.

Abstract: An active circuit for delivering three phase AC input power received from a three phase rectifier to a boost converter and a method of operating the same. In one embodiment, the active circuit includes a phase selection switching circuit, coupled to the rectifier, that selects an inner phase of the three phase AC input power. The active circuit also includes a switching network, coupled to the phase selection switching circuit and the rectifier, that controls a current waveshape of the inner phase and a current waveshape of at least one other phase, thereby to reduce harmonics associated with three phase AC input current.

Abstract: For use with a boost converter having a boost inductor couplable to a source of electrical power, a rectifier coupled to the boost inductor and a boost switch coupled across the rectifier, the boost converter operable in discontinuous mode, a circuit for, and method of, providing a reduced output voltage from the boost converter. In one embodiment, the circuit includes an autotransformer, coupled across an output of the boost converter, having an intermediate tap that provides a reduced output voltage at the output.

Abstract: For use in a boost converter having a boost inductor coupled between an input and an output of the boost converter and an output capacitor coupled between rails of the output, an energy storage circuit for, and method of, extending a holdup time of the boost converter.

Abstract: For use with a boost converter having first, second and third input inductors, a switching network, method of reducing input current total harmonic distortion (THD) associated with the boost converter, and boost converter employing the switching network and method. In one embodiment, the switching network includes first and second switches coupled between corresponding rails of the boost converter. The switching network also includes first, second and third L-C resonant networks wye-coupled to a node located between the first and second switches and coupled to the first, second and third input inductors, respectively. The first and second switches and the first, second and third L-C resonant networks cooperate to create resonant voltages across, and induce phase currents through, the first, second and third input inductors to reduce input current THD associated with the boost converter.

Abstract: A power supply and method of operation thereof. In one embodiment, the power supply includes: (1) a primary side power switch, (2) an isolation transformer having a primary winding coupled to the primary side power switch, the primary side power switch conducting intermittently to transfer current from an input of the power supply to the isolation transformer, (3) a secondary side power switch, coupled to a secondary winding of the isolation transformer, that is operable to conduct within a conduction period of the primary side power switch to transfer current from the isolation transformer to an output of the power supply, a portion of the current being contained within the power supply during a nonconduction period of the secondary side power switch and (4) a capacitor, coupled to the secondary side power switch, that, circulates the portion toward the output during the nonconduction period.

Abstract: An integrated three-phase power converter and method of operation thereof is provided. The integrated three-phase power converter includes: (1) first and second power switches coupled between corresponding rails of said power converter, (2) an input stage, including first, second and third L-C branches coupled between said first, second and third phase inputs and a node between said first and second power switches, adapted to receive phase voltages from a source of electrical power, and (3) an output stage, coupled to said first and second power switches, that provides a DC output voltage at said output, said first and second power switches cooperating to employ said input stage to reduce input current total harmonic distortion (THD) on all three of said phase inputs and said output stage to convert said phase voltages to said DC output voltage.

Abstract: A split-boost converter having a main inductor, first and second main switches and floating and fixed outputs and a method of operating the same. In one embodiment, the converter includes an auxiliary diode coupled between the main inductor and a first rail of the floating output, and an auxiliary switch coupled to a node between the main inductor and the auxiliary diode and a second rail of the floating output. The converter is operable in a first mode, when an input voltage of the converter at least equals an output voltage of the converter, in which the auxiliary switch remains open and the first and second main switches are modulated to operate the converter. The converter is further operable in a second mode, when an input voltage of the converter is less than an output voltage of the converter, in which the first and second main switches remain closed and the auxiliary switch is modulated to operate the converter.