Patents by Inventor Yi-Ming Chen

Yi-Ming Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12235197
    Abstract: An automatic processing device for liquid samples includes a sample region, a control module, an image identification device and a centrifuge. The sample region is configured to accommodate a plurality of centrifuge tubes. The control module includes a mechanical module. The mechanical module is configured to unscrew or tighten upper caps of the centrifuge tubes, and is configured to draw liquid from the centrifuge tubes or discharge liquid to the centrifuge tubes. The image identification device is coupled to the control module. The centrifuge is coupled to the control module. The centrifuge is configured to accommodate the centrifuge tubes and perform centrifugal treatment.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: February 25, 2025
    Assignees: CANCER FREE BIOTECH LTD., SONGYI SYSTEM CO., LTD.
    Inventors: Po-Han Chen, Shih-Pei Wu, Yi-Hsuan Chen, Chung-I Chen, Chun-Chieh Chiang, Chi-Ming Lee
  • Patent number: 12232896
    Abstract: A target position determination of a single-slot collimating plate and a collimator assembly are disclosed. A first measurement signal is acquired based upon of the first instance of air scanning, when the single-slot collimating plate moves a predetermined distance from a starting position to a first position in a first direction of the Z axis. A second measurement signal is acquired based upon the second instance of air scanning, when the single-slot collimating plate moves a predetermined distance from the starting position to a second position in the direction opposite to the first direction. A composite measurement signal and a composite air calibration signal are determined based upon the first measurement signal and the second measurement signal. The composite measurement signal is calibrated using the composite air calibration signal. The target position of the single-slot collimating plate is determined based upon the calibrated composite measurement signal.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: February 25, 2025
    Assignee: Siemens Shanghai Medical Equipment Ltd.
    Inventors: Wen Hao Chen, Tao Tao Li, Yi Tian, Jing Ming Zheng, Chang Qing Teng
  • Publication number: 20250054796
    Abstract: A system is provided. The system includes: a semiconductor processing system comprising: a semiconductor processing apparatus configured to perform at least one semiconductor fabrication process; and a load port attached to the semiconductor processing apparatus and configured to load a wafer contained in a wafer container to the semiconductor processing apparatus; and a load port first aid platform in electrical communication with the load port, wherein the load port first aid platform controls the load port when the semiconductor processing apparatus malfunctions.
    Type: Application
    Filed: August 7, 2023
    Publication date: February 13, 2025
    Inventors: Chia-Hsi Wang, ChunKai Yu, Yi-Ming Chen, Yen-Yu Chen, Yi-Fu Chen
  • Patent number: 12221483
    Abstract: The present disclosure provides a fusion protein and the nucleic acid encoding sequence thereof, and uses of the same. The fusion protein of the present disclosure achieves the effect of treating cancer, immunoregulation and activating immune cells through various efficacy experiments.
    Type: Grant
    Filed: January 30, 2024
    Date of Patent: February 11, 2025
    Assignee: CHINA MEDICAL UNIVERSITY HOSPITAL
    Inventors: Der-Yang Cho, Shao-Chih Chiu, Shi-Wei Huang, Chih-Ming Pan, Mei-Chih Chen, Yu-Chuan Lin, Yeh Chen, Yi-Wen Chen, Ming-You Shie, Kai-Wen Kan
  • Patent number: 12224179
    Abstract: The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: February 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Sheng Lin, Chi-Jen Liu, Chi-Hsiang Shen, Te-Ming Kung, Chun-Wei Hsu, Chia-Wei Ho, Yang-Chun Cheng, William Weilun Hong, Liang-Guang Chen, Kei-Wei Chen
  • Patent number: 12218082
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Grant
    Filed: November 9, 2023
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 12218239
    Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: February 4, 2025
    Assignee: Mosaid Technologies Incorporated
    Inventors: Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
  • Patent number: 12211756
    Abstract: A deposition system is provided capable of measuring at least one of the film characteristics (e.g., thickness, resistance, and composition) in the deposition system. The deposition system in accordance with the present disclosure includes a substrate process chamber. The deposition system in accordance with the present disclosure includes a substrate pedestal in the substrate process chamber, the substrate pedestal configured to support a substrate, and a target enclosing the substrate process chamber. A shutter disk including an in-situ measuring device is provided.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Publication number: 20250015246
    Abstract: A semiconductor device is provided, which includes an active region, a first semiconductor layer, a first metal element-containing structure, a first p-type or n-type layer, a second semiconductor layer and an insulating layer. The active region has a first surface and a second surface. The first semiconductor layer is at the first surface. The first metal element-containing structure covers the first semiconductor layer and comprising a first metal element. The first p-type or n-type layer is between the first semiconductor layer and the first metal element-containing structure. The second semiconductor layer is between the first semiconductor layer and the first p-type or n-type layer. The insulating layer covers a portion of the first semiconductor layer and a portion of the second semiconductor. The first p-type or n-type layer includes an oxygen element (O) and a second metal element and has a thickness less than or equal to 20 nm.
    Type: Application
    Filed: September 23, 2024
    Publication date: January 9, 2025
    Inventors: Yu-Tsu LEE, Yi-Yang CHIU, Chun-Wei CHANG, Min-Hao YANG, Wei-Jen HSUEH, Yi-Ming CHEN, Shih-Chang LEE, Chung-Hao WANG
  • Publication number: 20240421253
    Abstract: An optoelectronic semiconductor device includes a substrate, a first type semiconductor structure located on the substrate, a second type semiconductor structure located on the first type semiconductor structure, an active structure located between the first type semiconductor structure and the second type semiconductor structure, a plurality of contact portions disposed between the first type semiconductor structure and the substrate, and a first conductive oxide layer, a second conductive oxide layer, a first insulating layer and a second insulating layer. The plurality of contact portions is separated from each other, and one of them includes a semiconductor and has a side wall. The first conductive oxide layer contacts the contact portion, and the second conductive oxide layer contacts the first conductive oxide layer. The first insulating layer contacts the side wall. The second insulating layer is disposed between the first insulating layer and the second conductive oxide layer.
    Type: Application
    Filed: August 26, 2024
    Publication date: December 19, 2024
    Inventors: Chung-Hao WANG, Yu-Chi WANG, Yi-Ming CHEN, Yi-Yang CHIU, Chun-Yu LIN
  • Publication number: 20240413268
    Abstract: A semiconductor device includes a semiconductor stack, a reflective structure, and a conductive structure. The semiconductor stack includes a first semiconductor structure, a second semiconductor structure and an active region located between the first semiconductor structure and the second semiconductor structure. The reflective structure is located at a side of semiconductor stack closed to the first semiconductor structure, and includes a first metal. The conductive structure locates between the reflective structure and the first semiconductor structure, and includes a first region overlapping with the active structure and a second region which does not overlap with the active structure. The first metal in the second region has a concentration smaller than 5 atomic percent.
    Type: Application
    Filed: June 7, 2024
    Publication date: December 12, 2024
    Inventors: Yi-Yang CHIU, Chun-Yu LIN, Chun Wei CHANG, Yi-Ming CHEN, Chen OU, Hung-Yu CHOU, Liang-Yi WU, Hsiao-Chi YANG
  • Patent number: 12162134
    Abstract: A system includes a plurality of semiconductor processing tools; a carrier purge station; a carrier repair station; and an overhead transport (OHT) loop for transporting one or more substrate carriers among the plurality of semiconductor processing tools, the carrier purge station, and the carrier repair station. The carrier purge station is configured to receive a substrate carrier from one of the plurality of semiconductor processing tools, purge the substrate carrier with an inert gas, and determine if the substrate carrier needs repair. The carrier repair station is configured to receive a substrate carrier to be repaired and replace one or more parts in the substrate carrier.
    Type: Grant
    Filed: February 17, 2023
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jen-Ti Wang, Chih-Wei Lin, Fu-Hsien Li, Yi-Ming Chen, Cheng-Ho Hung
  • Patent number: 12125956
    Abstract: A semiconductor device is provided, which includes a semiconductor stack and a first contact structure. The semiconductor stack includes an active layer and has a first surface and a second surface. The first contact structure is located on the first surface and includes a first semiconductor layer, a first metal element-containing structure and a first p-type or n-type layer. The first metal element-containing structure includes a first metal element. The first p-type or n-type layer physically contacts the first semiconductor layer and the first metal element-containing structure. The first p-type or n-type layer includes an oxygen element (O) and a second metal element and has a thickness less than or equal to 20 nm, and the first semiconductor layer includes a phosphide compound or an arsenide compound.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: October 22, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Yu-Tsu Lee, Yi-Yang Chiu, Chun-Wei Chang, Min-Hao Yang, Wei-Jen Hsueh, Yi-Ming Chen, Shih-Chang Lee, Chung-Hao Wang
  • Patent number: 12074252
    Abstract: An optoelectronic semiconductor device includes a substrate, a first type semiconductor structure, a second type semiconductor structure, an active structure and a contact structure. The first type semiconductor structure is located on the substrate and has a first protrusion part with a first thickness and a platform part with a second thickness. The second type semiconductor structure is located on the first type semiconductor structure. The active structure is between the first type semiconductor structure and the second type semiconductor structure. The contact structure is disposed between the first type semiconductor structure and the substrate. The second thickness of the platform part is in a range of 0.01 ?m to 1 ?m.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: August 27, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chung-Hao Wang, Yu-Chi Wang, Yi-Ming Chen, Yi-Yang Chiu, Chun-Yu Lin
  • Publication number: 20240239765
    Abstract: The present invention relates to a nicotinohydrazide derivative, a stereoisomer thereof or a pharmaceutically acceptable salt thereof having a structure of formula (I): wherein each of X, Y and Z is one of N and CH, at least one of X, Y and Z is CH, at least one of X, Y and Z is N, and R is one of OH and NH2.
    Type: Application
    Filed: December 25, 2020
    Publication date: July 18, 2024
    Inventors: Yi-Ming Chen, Cherng-Chyi Tzeng, Yeh-Long Chen, Chih-Hua Tseng, Chia-Hung Yen, Rajni Kant, Ming-Hui Yang
  • Patent number: 12002906
    Abstract: The present disclosure provides a semiconductor device and a semiconductor component. The semiconductor device includes an active structure, a ring-shaped semiconductor contact layer, a first electrode, and an insulating layer. The active structure has a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active layer located between the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer. The ring-shaped semiconductor contact layer is located on the second-conductivity-type semiconductor layer and having a first inner sidewall and a first outer sidewall. The first electrode has an upper surface and covers the ring-shaped semiconductor contact layer. The insulating layer covers the first electrode and the active structure and has a second inner sidewall and a second outer sidewall. The first inner sidewall is not flush with the second inner sidewall in a vertical direction.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: June 4, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Hao-Chun Liang, Wei-Shan Yeoh, Yao-Ning Chan, Yi-Ming Chen, Shih-Chang Lee
  • Patent number: 11972252
    Abstract: A docker image is received. The docker image is for a container. The container contains files that allow for virtualization of applications that run within the container. The docker image is parsed to identify layer files in the docker image. Installed software components (e.g., installed files) and/or hardware components in the layer files are identified. Software application index calls are made to generate information that identifies relationships between the installed software components and/or hardware components. The relationships between the installed software components and/or hardware components are then displayed to a user.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: April 30, 2024
    Assignee: Micro Focus LLC
    Inventors: Qiuxia Song, Yi-Ming Chen, Zhong-Yi Yang, Yangyang Zhao, Lei Xiao
  • Patent number: 11906939
    Abstract: A lubricating oil volume adjustment system and a lubricating oil volume adjustment method are provided. The system includes a storage device and a processor and is connected to a machine including a motor through a data acquisition device acquiring current information of the motor. The storage device stores a machine learning model trained by a training data set including a plurality of pieces of the current information of the motor during operation and a plurality of temperature values measured during operation of the machine. The processor is configured to acquire the current information of present operation of the motor by using the data acquisition device, predict a temperature value of the machine when the motor operates under the current information by using the machine learning model, and calculate and adjust a lubricating oil volume suitable to be used by the machine during operation according to the predicted temperature value.
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: February 20, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Ming Chen, Tian-You Hou, Shu-Chung Liao
  • Publication number: 20240047604
    Abstract: A semiconductor light-emitting device comprises a substrate; a first adhesive layer on the substrate; multiple epitaxial units on the first adhesive layer; a second adhesive layer on the multiple epitaxial units; multiple first electrodes between the first adhesive layer and the multiple epitaxial units, and contacting the first adhesive layer and the multiple epitaxial units; and multiple second electrodes between the second adhesive layer and the multiple epitaxial units, and contacting the second adhesive layer and the multiple epitaxial units; wherein the multiple epitaxial units are totally separated.
    Type: Application
    Filed: October 17, 2023
    Publication date: February 8, 2024
    Inventors: Hsin-Chih Chiu, Chih-Chiang Lu, Chun-Yu Lin, Ching-Huai Ni, Yi-Ming Chen, Tzu-Chieh Hsu, Ching-Pei Lin
  • Publication number: 20240019838
    Abstract: A composite tool cutting monitoring system used for a machine is provided. The cutting monitoring system includes a data capturing module, a database and a cutting control module. The data capturing module is configured to capture a motor current data of the machine and a tool wear data. The motor current data is used as a training data for a tool wear state prediction model to perform deep learning and forecasting. The database is configured to establish a tool wear database for the comparison of a tool wear state. The tool wear state prediction model outputs a tool wear state prediction data to the cutting control module. The cutting control module judges whether the tool wear state is normal according to the tool wear state prediction data.
    Type: Application
    Filed: October 27, 2022
    Publication date: January 18, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Ming CHEN, Shu-Chung LIAO