Abstract: An optical module, comprising a circuit board (110), a photoelectric assembly (130) electrically connected to the circuit board (110), an optical interface (120), and optical fiber (140) in optical communication with the photoelectric assembly (130) and the optical interface (120), and a fiber coiling member (150). The fiber coiling member (150) comprises a fiber coiling body (151) enclosing an accommodating cavity (1510), and the fiber coiling body (151) is provided with a bottom wall (1512) and a fiber coiling wall (1511) extending from the bottom wall (1512) in the thickness direction of the circuit board (110). The fiber coiling wall (1511) defines a peripheral boundary of the accommodating cavity (1510). The fiber coiling member (150) further comprises stop walls (152) arranged opposite to the bottom wall (1512) in the thickness direction of the circuit board (110), and protruding from the fiber coiling wall (1511) to the interior of the accommodating cavity (1510).

Abstract: An optical module, in which an emitting optical fiber and an optical waveguide element are included in an emitting optical fiber assembly. The optical waveguide element filters out, among optical signals, those propagating in a high-order mode and retains, among the optical signals, those propagating in a fundamental mode. In addition, when the emitting optical fiber is a single-mode optical fiber, the fundamental mode spot diameter at a light output end of the emitting optical fiber matches the fundamental mode spot diameter of an external multi-mode optical fiber; and when the emitting optical fiber is a multi-mode optical fiber, the fundamental mode spot diameter at a light output end of the optical waveguide element matches the fundamental mode spot diameter of the external multi-mode optical fiber.

Abstract: Embodiments of the disclosure include an apparatus and method of forming a backside profile in a semiconductor device that includes die-to-wafer bonding. The method generally includes removing a portion of a substrate layer included in a plurality of dies, the plurality of dies arranged on and bonded to an insulation layer included in a support structure, where the plurality of dies define a plurality of channels between adjacent dies, and forming a corner feature on a plurality of corners of the substrate layer adjacent to the plurality of channels. The use of a backside profile as described herein may mitigate the downstream process risks associated with trapped residue in the channels, and provide stress relief to the semiconductor device.

Abstract: A method for depositing copper onto a substrate includes grain engineering to control the internal structure of the copper. In some embodiments, the method comprises depositing a grain control layer conformally onto a copper seed layer in a structure on the substrate where the grain control layer is a non-conducting material, etching the grain control layer using a direct deep reactive ion etch (DRIE) process to remove portions of the grain control layer on horizontal surfaces within the structure, and depositing a copper material onto the structure such that at least one grain parameter of the copper material is controlled, at least in part, by a remaining portion of the grain control layer on vertical surfaces of the structure. In some embodiments, the deposited copper material in the structure has a <111> grain orientation normal to a horizontal surface of the structure.

Abstract: The present invention relates to the technical field of flying toys, and discloses a flying toy with various playing modes, which comprises a flying body and an elastic part, wherein the flying body comprises a flying shell, a blade part, a central shaft and a driving part, the central shaft is arranged through the blade part, and the driving part is used for driving the blade part to rotate; the elastic part is arranged elastically, the flying shell and the elastic part are arranged in an assemblable and detachable manner or integrally formed, and the flying body is arranged in a in a bouncing manner under the elastic force.

Abstract: A method and apparatus for training a learning model for automatic defect detection and classification of at least a portion of a processed wafer include receiving labeled images having defect classification types and features for portions of a post-processed wafer, creating a first training set comprising the received labeled images, training the machine learning model to automatically classify wafer portions based on at least one detected defect in respective wafer portions using the first training set, receiving labeled wafer profiles having respective downstream yield data, creating a second training set comprising the labeled wafer profiles and training the machine learning model, using the second training set, to automatically determine a respective downstream yield of a wafer based on a respective wafer profile. The machine learning model can be applied to at least one unlabeled wafer image to determine at least one defect classification for at least one portion of a wafer.

Abstract: A method, apparatus and system for the automatic detection and measurement of chipping defects on diced wafers includes receiving an image of at least a portion of a diced wafer, aligning the received image of the at least the portion of the diced wafer, determining edges of the at least the portion of the diced wafer depicted in the aligned, received image, automatically determining at least one baseline from which to measure chipping defects on the at least the portion of the diced wafer from the determined edges, and measuring chipping defects on the at least the portion of the diced wafer using at least one determined, respective baseline. In some embodiments, the method, apparatus and system can further include applying a machine learning model to measured chipping defects to determine if a critical failure exists on the diced wafer.

Abstract: A method and apparatus for training a learning model for the automatic detection and classification of defects on wafers includes receiving labeled images of wafer defects having multiple defect classifications, creating a first training set including the received labeled images of wafer defects, training the machine learning model to automatically detect and classify wafer defects in a first stage using the first training set, blending at least one set of at least two labeled images having different classifications to generate additional labeled image data, creating a second training set including the blended, additional labeled image data, and training the machine learning model to automatically detect and classify wafer defects in a second stage using the second training set. The trained machine learning model can then be applied to at least one unlabeled wafer image to determine at least one defect classification for the at least one unlabeled wafer image.

Abstract: Methods, apparatuses and systems for providing a switching component are disclosed herein. An example switching component may comprise: A switching component comprising: a housing; a carrier body disposed within the housing; a first pair of contact pads disposed on a first surface of the carrier body; and a second pair of contact pads disposed on a second surface of the carrier body, wherein each pair of contact pads is configured to independently make contact with adjacent bridge contact pads in order to actuate an electrical bridge in response to movement of the carrier body.

Abstract: The present disclosure provides an immunoconjugate includes an antibody comprising an antigen-binding fragment that specifically binds to an epitope in mesothelin, N-glycan binding domain and an N-glycan; a linker linking to the N-glycan; and a payload A and a payload B conjugated to the linker, respectively; wherein the payload A and the payload B are the same or different. A pharmaceutical composition comprises the immunoconjugate and a method for treating cancer are also provided in the disclosure.

Abstract: Methods, apparatuses and systems for providing a switching component are disclosed herein. An example switching component may comprise: A switching component comprising: a housing; a carrier body disposed within the housing; a first pair of contact pads disposed on a first surface of the carrier body; and a second pair of contact pads disposed on a second surface of the carrier body, wherein each pair of contact pads is configured to independently make contact with adjacent bridge contact pads in order to actuate an electrical bridge in response to movement of the carrier body.

Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.

Abstract: A method for deploying product applications within virtual machines onto on-premises and public cloud infrastructures. Specifically, the disclosed method proposes a migration scheme of virtual machine images (configured at least with product applications and guest operating systems) from an on-premises infrastructure to a public cloud infrastructure. Further, the migration scheme considers two workflows—a normal workflow contingent on the public cloud infrastructure having up-to-date support for the guest operating systems; and an exception workflow contingent on the public cloud infrastructure lacking up-to-date support for the guest operating systems.

Abstract: Provided are an anti-CD11b antibody or an antigen-binding portion thereof, and methods and use of the antibody for modulating immunoresponses by regulating CD11b expression on cells.

Abstract: A method of forming a structure having a coating layer includes the following steps: providing a substrate; coating a fluid on the surface of the substrate, where the fluid includes a carrier and a plurality of silicon-containing nanoparticles; and performing a heating process to remove the carrier and convert the silicon-containing nanoparticles into a silicon-containing layer, a silicide layer, or a stack layer including the silicide layer and the silicon-containing layer.

Abstract: Methods, apparatuses and systems for providing a switching component are disclosed herein. An example switching component may comprise: a housing; a moveable carrier a moveable carrier disposed within the housing; at least one integrated moveable contact assembly, the moveable contact assembly comprising a substrate, a set of moveable contacts disposed on a first surface of the substrate and a guiding element surrounding at least a portion of the substrate, wherein at least a portion of the guiding element is configured to abut a surface of the moveable carrier; and a set of stationary contacts adjacent the set of moveable contacts, wherein the set of moveable contacts is configured to move with two degrees of freedom to make contact with the set of stationary contacts in order to actuate an electrical bridge in response to movement of the moveable carrier.

Abstract: A memory device includes a memory cell array, a data accessing circuit, a data bus inversion calculator, a multiplexer, and an output result judging circuit. The data accessing circuit performs a data write-in operation or a data read-out operation on the memory cell array. The data accessing circuit reads read-out data from the memory cell array. The data bus inversion calculator generates inversion indication data according to the read-out data. The multiplexer outputs the inversion indication data or test data according to a mode signal. The output result judging circuit compares the read-out data with the inversion indication data or the test data to generate output information.

Abstract: A memory device includes a memory cell array, a data accessing circuit, a data bus inversion calculator, a multiplexer, and an output result judging circuit. The data accessing circuit performs a data write-in operation or a data read-out operation on the memory cell array. The data accessing circuit reads read-out data from the memory cell array. The data bus inversion calculator generates inversion indication data according to the read-out data. The multiplexer outputs the inversion indication data or test data according to a mode signal. The output result judging circuit compares the read-out data with the inversion indication data or the test data to generate output information.