Abstract: The present disclosure provides a method of manufacturing a semiconductor device, The method includes providing a substrate, forming a metallization layer on the substrate, forming an upper dielectric layer over the metallization layer, forming a first sacrificial layer, a second sacrificial layer, and a third sacrificial layer penetrating the upper dielectric layer and the metallization layer, wherein the first sacrificial layer is aligned with the third sacrificial layer along a first axis, and the second sacrificial layer is free from overlapping the first sacrificial layer and the third sacrificial layer along the first axis, forming a width controlling structure between the first sacrificial layer and the third sacrificial layer, wherein the width controlling structure defines a recess exposing the upper dielectric layer, forming a protective layer within the recess, removing the width controlling structure to expose a portion of the metallization layer.

Abstract: A method of manufacturing a semiconductor device is provided. The method includes: providing a substrate; forming a metallization layer on the substrate; forming an upper dielectric layer over the s metallization layer; forming a first sacrificial layer and a second sacrificial layer, each of which penetrates the upper dielectric layer and the metallization layer; removing the upper dielectric layer; forming a width controlling structure between the first sacrificial layer and the second sacrificial layer, wherein the width controlling structure defines a recess exposing the metallization layer; forming a protective layer within the recess of the width controlling structure; removing the width controlling structure to expose a portion of the metallization layer; and patterning the metallization layer to form a word line between the first sacrificial layer and the second sacrificial layer.

Abstract: The present disclosure provides a method of preparing active areas. The method includes the operations of: receiving a substrate having an oxide layer, a nitride layer, and a silicon layer thereon; forming a patterned photoresist layer on the silicon layer; depositing a mask layer to cover a contour of the patterned photoresist layer; coating a carbon layer on the mask layer; etching the carbon layer, the mask layer, and the silicon layer to expose a top surface of the nitride layer; forming a plurality of opens in the oxide layer to expose a top surface of the substrate; and growing an epitaxial layer from the top surface of the substrate in the plurality of opens to form the active areas.

Abstract: The present disclosure provides a method of preparing active areas. The method includes the operations of: receiving a substrate having an oxide layer, a nitride layer, and a silicon layer thereon; forming a patterned photoresist layer on the silicon layer; depositing a mask layer to cover a contour of the patterned photoresist layer; coating a carbon layer on the mask layer; etching the carbon layer, the mask layer, and the silicon layer to expose a top surface of the nitride layer; forming a plurality of opens in the oxide layer to expose a top surface of the substrate; and growing an epitaxial layer from the top surface of the substrate in the plurality of opens to form the active areas.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes providing a substrate defined with a peripheral region and an array area at least partially surrounded by the peripheral region; disposing an insulating layer over the substrate; disposing a capping layer over the insulating layer; disposing a hardmask stack on the capping layer; patterning the hardmask stack; removing portions of the capping layer exposed through the hardmask stack; removing portions of the insulating layer exposed through the hardmask stack; removing portions of the substrate exposed through the capping layer and the insulating layer to form a plurality of fins in the array area and a first elongated member at least partially surrounding the plurality of fins; removing the hardmask stack; and forming an isolation over the substrate and surrounding the plurality of fins and the first elongated member.

Abstract: A method of forming a semiconductor structure includes following steps. A semiconductor material structure is formed over a substrate. A first pad layer is formed over the semiconductor material structure. The first pad layer and the semiconductor material structure are etched to form a trench. An oxidation process is performed on a sidewall of the semiconductor material structure to form a first oxide structure on the sidewall of the semiconductor material structure. A second oxide structure is formed in the trench.

Abstract: The present disclosure is related to a method of forming a pattern, including the steps of: providing a structure including a substrate and a target layer, in which the target layer is disposed on the substrate, and the target layer includes a central area and a periphery area; forming a plurality of core patterns and a linear spacer pattern on the central area, in which a width of the linear spacer pattern is wider than 50 nm; covering a photoresist on the periphery area; removing a portion of the central area not covered by the plurality of core patterns and not covered by the linear spacer pattern to form a pattern in the central area, and removing the photoresist, the linear spacer pattern and the plurality of core patterns to expose the pattern.

Abstract: A method of forming a semiconductor structure includes following steps. A semiconductor material structure is formed over a substrate. A first pad layer is formed over the semiconductor material structure. The first pad layer and the semiconductor material structure are etched to form a trench. An oxidation process is performed on a sidewall of the semiconductor material structure to form a first oxide structure on the sidewall of the semiconductor material structure. A second oxide structure is formed in the trench.

Abstract: A method for forming a semiconductor structure includes: providing a structure including a substrate and a target layer disposed on the substrate, and the target layer includes a central area and a periphery area; forming a plurality of linear fin features within the central area in which the linear fin features are substantially parallel to each other and include edge imbalance portions; and removing the edge imbalance portions of the linear fin features to obtain linear uniform fin features.

Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the semiconductor structure. The semiconductor structure includes a substrate defined with a peripheral region and an array area at least partially surrounded by the peripheral region, wherein the substrate includes a plurality of fins protruding from the substrate and disposed in the array area, and a first elongated member protruding from the substrate and at least partially surrounding the plurality of fins; an insulating layer disposed over the plurality of fins and the first elongated member; a capping layer disposed over the insulating layer; and an isolation surrounding the plurality of fins, the first elongated member, the insulating layer and the capping layer.

Abstract: The present disclosure provides a method of manufacturing a semiconductor structure. The method includes providing a substrate defined with a peripheral region and an array area at least partially surrounded by the peripheral region; disposing an insulating layer over the substrate; disposing a capping layer over the insulating layer; disposing a hardmask stack on the capping layer; patterning the hardmask stack; removing portions of the capping layer exposed through the hardmask stack; removing portions of the insulating layer exposed through the hardmask stack; removing portions of the substrate exposed through the capping layer and the insulating layer to form a plurality of fins in the array area and a first elongated member at least partially surrounding the plurality of fins; removing the hardmask stack; and forming an isolation over the substrate and surrounding the plurality of fins and the first elongated member.

Abstract: A method of manufacturing a semiconductor structure includes: etching a substrate according to a hard mask to form a plurality of trenches in the substrate; performing a nitridation treatment on the trenches of the substrate; filling the trenches of the substrate with a flowable isolation material; and solidifying the flowable isolation material to form an isolation material. A semiconductor structure manufactured by the method is also provided.

Abstract: A method of manufacturing a semiconductor structure includes the following operations. A buffer layer is formed over a substrate. A first top hard mask is formed on the buffer layer, in which the first top hard mask has a first trench to expose a first portion of the buffer layer. A spacer layer is formed to cover a sidewall of the first trench and an upper surface of the first top hard mask and the first portion of the buffer layer to form a second trench over the first portion. The top portion and the bottom portion are etched to form a thinned top portion and a thinned bottom portion. A second top hard mask is formed in the second trench. The thinned top portion and the vertical portion of the spacer layer are removed.

Abstract: A method of forming a semiconductor structure includes following steps. A semiconductor material structure is formed over a substrate. A first pad layer is formed over the semiconductor material structure. The first pad layer and the semiconductor material structure are etched to form a trench. An oxidation process is performed on a sidewall of the semiconductor material structure to form a first oxide structure on the sidewall of the semiconductor material structure. A second oxide structure is formed in the trench.

Abstract: A method for forming a semiconductor structure includes: providing a structure including a substrate and a target layer disposed on the substrate, and the target layer includes a central area and a periphery area; forming a plurality of linear fin features within the central area in which the linear fin features are substantially parallel to each other and include edge imbalance portions; and removing the edge imbalance portions of the linear fin features to obtain linear uniform fin features.

Abstract: A method of manufacturing a semiconductor structure includes: etching a substrate according to a hard mask to form a plurality of trenches in the substrate; performing a nitridation treatment on the trenches of the substrate; filling the trenches of the substrate with a flowable isolation material; and solidifying the flowable isolation material to form an isolation material. A semiconductor structure manufactured by the method is also provided.

Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the semiconductor structure. The semiconductor structure includes a substrate defined with a peripheral region and an array area at least partially surrounded by the peripheral region, wherein the substrate includes a plurality of fins protruding from the substrate and disposed in the array area, and a first elongated member protruding from the substrate and at least partially surrounding the plurality of fins; an insulating layer disposed over the plurality of fins and the first elongated member; a capping layer disposed over the insulating layer; and an isolation surrounding the plurality of fins, the first elongated member, the insulating layer and the capping layer.

Abstract: The present disclosure is related to a method of forming a pattern, including the steps of: providing a structure including a substrate and a target layer, in which the target layer is disposed on the substrate, and the target layer includes a central area and a periphery area; forming a plurality of core patterns and a linear spacer pattern on the central area, in which a width of the linear spacer pattern is wider than 50 nm; covering a photoresist on the periphery area; removing a portion of the central area not covered by the plurality of core patterns and not covered by the linear spacer pattern to form a pattern in the central area, and removing the photoresist, the linear spacer pattern and the plurality of core patterns to expose the pattern.

Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the semiconductor structure. The semiconductor structure includes a base, a plurality of islands, and an isolation layer. At least one of the plurality of islands includes a pillar extending from an upper surface of the base, a protrusion connected to the pillar, a capping layer disposed on the protrusion, and a passivation liner disposed on sidewalls of the protrusion and the capping layer. The isolation layer surrounds the islands.

Abstract: This invention provides a method for forming a shallow trench structure, including providing a substrate, forming a patterned photoresist layer on the substrate, performing an etching process with the patterned photoresist layer as a mask to form a shallow trench structure on the substrate, and applying plasma treatment unto the substrate with plasma produced from a mixture of CF4 and O2. Repeating the etching process and the plasma treatment until a shallow trench structure with a predetermined aspect ratio is obtained.