Patents by Inventor Ying-hao Kuo

Ying-hao Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10361323
    Abstract: A backside-illuminated photodetector structure comprising a first reflecting region, a second reflecting region and a semiconductor region. The semiconductor region is between the first reflecting region and the second reflecting region. The semiconductor region comprises a first doped region and a second doped region.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: July 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wan-Yu Lee, Ying-Hao Kuo
  • Publication number: 20190219762
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Application
    Filed: March 22, 2019
    Publication date: July 18, 2019
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Patent number: 10353147
    Abstract: A system and method for manufacturing semiconductor devices is provided. An embodiment comprises using an etchant to remove a portion of a substrate to form an opening with a 45° angle with a major surface of the substrate. The etchant comprises a base, a surfactant, and an oxidant. The oxidant may be hydrogen peroxide.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: July 16, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wan-Yu Lee, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20190137404
    Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.
    Type: Application
    Filed: December 21, 2018
    Publication date: May 9, 2019
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Publication number: 20190139850
    Abstract: A method includes filling a trench formed in a first integrated circuit carrier with temporary bonding material to form a temporary bonding layer. At least one chip is bonded over the temporary bonding layer.
    Type: Application
    Filed: December 31, 2018
    Publication date: May 9, 2019
    Inventors: Wan-Yu Lee, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20190131222
    Abstract: Some embodiments relate to a semiconductor package. The package includes a substrate having an upper surface and a lower surface. A first chip is disposed over a first portion of the upper surface of the substrate. A second chip is disposed over a second portion of the upper surface of the substrate. A first plurality of carbon nano material pillars are disposed over an uppermost surface of the first chip, and a second plurality of carbon nano material pillars are disposed over an uppermost surface of the second chip. A molding compound is disposed above the substrate, and encapsulates the first chip, the first plurality of carbon nano material pillars, the second chip, and the second plurality of carbon nano material pillars.
    Type: Application
    Filed: December 17, 2018
    Publication date: May 2, 2019
    Inventors: Chun-Hao Tseng, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 10276471
    Abstract: In some embodiments, the present disclosure relates to a package for holding a plurality of integrated circuits. The package includes a first conductive pad over a first chip and a second conductive pad over a second chip. A molding structure surrounds the first chip and the second chip. A first passivation layer is over the first chip and the second chip, and a conductive structure is over the first passivation layer. The conductive structure is coupled to the first conductive pad. A second passivation layer is over the conductive structure. The first passivation layer and the second passivation layer have sidewalls defining an aperture that is directly over an optical element within the second chip and that extends through the first passivation layer and the second passivation layer.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wan-Yu Lee, Chun-Hao Tseng, Jui Hsieh Lai, Tien-Yu Huang, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20190121169
    Abstract: An electro-optic modulator device includes a modulation region, a reflecting region, a conductive line and an anti-reflecting region. The modulation region includes a doped region. The reflecting region is over the modulation region. The conductive line is connected to the doped region. The conductive line extends through the reflecting region. The anti-reflecting region is on an opposite surface of the modulation region from the reflecting region.
    Type: Application
    Filed: December 17, 2018
    Publication date: April 25, 2019
    Inventors: Wan-Yu Lee, Ying-Hao Kuo
  • Patent number: 10269694
    Abstract: An apparatus includes a base portion having an upper surface and a lower surface opposite the upper surface. The apparatus also includes a first sidewall portion having a first upper portion distal the upper surface of the base portion and a first slanted sidewall between the first upper portion and the upper surface of the base portion. The apparatus further includes a second sidewall portion having a second upper portion distal the upper surface of the base portion and a second slanted sidewall between the second upper portion and the upper surface of the base portion. The first sidewall portion and the second sidewall portion define a first reservoir between the first slanted sidewall and the second slanted sidewall, the first reservoir being configured to receive a first chip package portion and to secure the first chip package portion in a first curing position.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 10261248
    Abstract: A semiconductor device, a package structure, and methods of forming the same are disclosed. An embodiment is a semiconductor device comprising a first optical device over a first substrate, a vertical waveguide on a top surface of the first optical device, and a second substrate over the vertical waveguide. The semiconductor device further comprises a lens capping layer on a top surface of the second substrate, wherein the lens capping layer is aligned with the vertical waveguide, and a second optical device over the lens capping layer.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: April 16, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20190103391
    Abstract: A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 4, 2019
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Publication number: 20190025514
    Abstract: An apparatus comprises a substrate having a plateau region and a trench region, a metal layer over the plateau region, a semiconductor component over the trench region, wherein a gap is between the plateau region and the semiconductor component, an adhesion promoter layer over the plateau region, the semiconductor component and the gap, a dielectric layer over the adhesion promoter layer and a bonding interface formed between the adhesion promoter layer and the dielectric layer, wherein the bonding interface comprises a chemical structure comprising a first dielectric material of the adhesion promoter layer and a second dielectric material of the dielectric layer.
    Type: Application
    Filed: September 25, 2018
    Publication date: January 24, 2019
    Inventors: Chun-Hao Tseng, Ying-Hao Kuo, Kai-Fang Cheng, Hai-Ching Chen, Tien-I Bao
  • Publication number: 20190011635
    Abstract: A method of making a grating in a waveguide includes forming a waveguide material over a substrate, the waveguide material having a thickness less than or equal to about 100 nanometers (nm). The method further includes forming a photoresist over the waveguide material and patterning the photoresist. The method further includes forming a first set of openings in the waveguide material through the patterned substrate and filling the first set of openings with a metal material.
    Type: Application
    Filed: August 27, 2018
    Publication date: January 10, 2019
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Patent number: 10177082
    Abstract: A method of forming a semiconductor package includes growing a layer of carbon nano material on a chip. The chip has a first surface and a second surface and the layer of carbon nano material is grown on the first surface of the chip. The layer of carbon nano material is configured to provide a path through which heat generated from the chip is dissipated. A substrate is attached to the second surface of the chip. A molding compound is formed above the substrate to encapsulate the chip and the layer of carbon nano material.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: January 8, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Hao Tseng, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 10170387
    Abstract: A method includes filling a trench formed in a first integrated circuit carrier with temporary bonding material to form a temporary bonding layer. At least one chip is bonded over the temporary bonding layer.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: January 1, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Wan-Yu Lee, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 10161875
    Abstract: A bio-chip package comprises a substrate a first layer over the substrate comprising an image sensor. The bio-chip package also comprises a second layer over the first layer. The second layer comprises a waveguide system a grating coupler. The bio-chip package also comprises a third layer arranged to accommodate a fluid between a first-third layer portion and a second-third layer portion, and to allow the fluid to pass from a first side of the third layer to a second side of the third layer. The third layer comprises a material having a predetermined transparency with respect to a wavelength of a received source light, the waveguide system is configured to direct the received source light to the grating coupler, and the image sensor is configured to determine a change in the wavelength of the source light caused by a coupling between the source light and the fluid.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo
  • Patent number: 10157901
    Abstract: A semiconductor device includes a first chip, a dielectric layer over the first chip, and a second chip over the dielectric layer. A conductive layer is embedded in the dielectric layer and is electrically coupled to the first chip and the second chip. The second chip includes an optical component. The first chip and the second chip are arranged on opposite sides of the dielectric layer in a thickness direction of the dielectric layer.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui Hsieh Lai, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 10156741
    Abstract: An electro-optic modulator device includes a modulation region, a reflecting region, a conductive line and an anti-reflecting region. The modulation region includes a doped region. The reflecting region is over the modulation region. The conductive line is connected to the doped region. The conductive line extends through the reflecting region. The anti-reflecting region is on an opposite surface of the modulation region from the reflecting region.
    Type: Grant
    Filed: December 15, 2016
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wan-Yu Lee, Ying-Hao Kuo
  • Patent number: 10137603
    Abstract: A vacuum carrier module includes a substrate having at least one hole and an edge region. There is at least one support on a top surface of the substrate. Further, a gel film is adhered to the edge region of the substrate. The at least one hole fluidly connects a reservoir located above the top surface of the substrate. A method of using a vacuum carrier module includes planarizing a gel film by passing an alignment material through a hole in a substrate to contact a first surface of the gel film, positioning at least one chip on a second surface of the gel film opposite the first surface. The method further includes encasing the at least one chip in a molding material and applying a vacuum to the first surface of the gel film.
    Type: Grant
    Filed: November 7, 2017
    Date of Patent: November 27, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Yu Huang, Chun-Hao Tseng, Ying-Hao Kuo, Kuo-Chung Yee
  • Patent number: 10135224
    Abstract: An apparatus and method of forming a chip package with a waveguide for light coupling is disclosed. The method includes depositing an adhesive layer over a carrier. The method further includes depositing a laser diode (LD) die having a laser emitting area onto the adhesive layer and depositing a molding compound layer over the LD die and the adhesive layer. The method still further includes curing the molding compound layer and partially removing the molding compound layer to expose the laser emitting area. The method also includes depositing a ridge waveguide structure adjacent to the laser emitting area and depositing an upper cladding layer over the ridge waveguide structure.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: November 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hao Tseng, Ying-Hao Kuo, Kuo-Chung Yee