Patents by Inventor Ying Liang

Ying Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210079722
    Abstract: Provided is a cord-penetrating component for use with a window shade having a top rail, a reeling unit and a cord. A bottom wall of the top rail has a through-hole penetrable by the cord. The reeling unit is disposed in the top rail and has a top plate and a bottom plate. A reeling wheel for reeling in the cord is disposed between the top and bottom plates. The cord-penetrating component is disposed on bottom wall of the top rail and protrudes from top side of the bottom wall. Ratio of vertical distance between bottom side of the top plate of the reeling unit and top side of the bottom plate of the reeling unit to vertical distance between top side of the cord-penetrating component and top side of the bottom wall of the top rail is 2?5:1. A window shade using the cord-penetrating component is further provided.
    Type: Application
    Filed: October 18, 2019
    Publication date: March 18, 2021
    Applicant: CHING FENG HOME FASHIONS CO., LTD.
    Inventor: Wen-Ying LIANG
  • Publication number: 20210079723
    Abstract: The blind includes an upper beam, a rope winder and a lifting rope. The bottom wall of the upper beam includes a through hole for the lifting rope to penetrate therethrough. The rope winder is arranged inside the upper beam and includes a top plate and a bottom plate. A winding wheel for winding the lifting rope is arranged between the top and bottom plates. The stringing apparatus of the present invention is arranged on the bottom wall of the upper beam and protrudes out of the top surface of the bottom wall. The relationship between a vertical distance from the bottom surface of the top plate of the rope winder to the top surface of the rope winder and a distance from the top surface of the stringing apparatus to the top surface of the bottom wall of the upper beam satisfies the relation of 2-5:1.
    Type: Application
    Filed: November 6, 2019
    Publication date: March 18, 2021
    Applicant: CHING FENG HOME FASHIONS CO., LTD.
    Inventor: Wen-Ying LIANG
  • Publication number: 20210060738
    Abstract: A switch device includes a shell, a ratchet wheel, a first pawl member, a second pawl member, a first biasing member, a second biasing member, a switch shaft, and a stop member. The shafting shaft is disposed to turnably engage a central segment of the stop member. Two lateral segments of the stop member are disposed respectively above the first and second pawl members, and respectively have two abutment edges that are disposed opposite to the ratchet wheel, and that are configured to be brought into abutting engagement with a surrounding wall of the shell so as to prevent the switch shaft from pulling out of the shell. A ratchet wrench having the switch device is also disclosed.
    Type: Application
    Filed: August 28, 2019
    Publication date: March 4, 2021
    Applicant: HAUR YUEH CO., LTD.
    Inventor: Ying-Liang Lai
  • Patent number: 10937656
    Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: March 2, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20210057287
    Abstract: A method includes forming a gate stack, which includes a first portion over a portion of a first semiconductor fin, a second portion over a portion of a second semiconductor fin, and a third portion connecting the first portion to the second portion. An anisotropic etching is performed on the third portion of the gate stack to form an opening between the first portion and the second portion. A footing portion of the third portion remains after the anisotropic etching. The method further includes performing an isotropic etching to remove a metal gate portion of the footing portion, and filling the opening with a dielectric material.
    Type: Application
    Filed: October 19, 2020
    Publication date: February 25, 2021
    Inventors: Ming-Chi Huang, Kuo-Bin Huang, Ying-Liang Chuang, Ming-Hsi Yeh
  • Publication number: 20200373298
    Abstract: Provided is a metal gate structure and related methods that include performing a metal gate cut process. The metal gate cut process includes a plurality of etching steps. For example, a first anisotropic dry etch is performed, a second isotropic dry etch is performed, and a third wet etch is performed. In some embodiments, the second isotropic etch removes a residual portion of a metal gate layer including a metal containing layer. In some embodiments, the third etch removes a residual portion of a dielectric layer.
    Type: Application
    Filed: August 14, 2020
    Publication date: November 26, 2020
    Inventors: Ming-Chi HUANG, Ying-Liang CHUANG, Ming-Hsi YEH, Kuo-Bin HUANG
  • Publication number: 20200350418
    Abstract: Embodiments of the present disclosure provide a method of cleaning a lanthanum containing substrate without formation of undesired lanthanum compounds during processing. In one embodiment, the cleaning method includes treating the lanthanum containing substrate with an acidic solution prior to cleaning the lanthanum containing substrate with a HF solution. The cleaning method permits using lanthanum doped high-k dielectric layer to modulate effective work function of the gate stack, thus, improving device performance.
    Type: Application
    Filed: July 14, 2020
    Publication date: November 5, 2020
    Inventors: Ming-Chi Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
  • Patent number: 10811320
    Abstract: A method includes forming a gate stack, which includes a first portion over a portion of a first semiconductor fin, a second portion over a portion of a second semiconductor fin, and a third portion connecting the first portion to the second portion. An anisotropic etching is performed on the third portion of the gate stack to form an opening between the first portion and the second portion. A footing portion of the third portion remains after the anisotropic etching. The method further includes performing an isotropic etching to remove a metal gate portion of the footing portion, and filling the opening with a dielectric material.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: October 20, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Chi Huang, Kuo-Bin Huang, Ying-Liang Chuang, Ming-Hsi Yeh
  • Patent number: 10790863
    Abstract: Embodiments of the present invention relate to the communications field, and provide a branching tower-mounted amplifier and an antenna feed system, so that a branching tower-mounted amplifier is added on an antenna unit side, thereby implementing a function of a four-port RRU, ensuring network coverage, and improving network performance. The branching tower-mounted amplifier includes a first filter module, a second filter module, a first amplification module, a second amplification module, a control module, a first branching module, and a second branching module.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: September 29, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Jiangchun Gu, Ying Liang
  • Patent number: 10755934
    Abstract: A chemical mechanical polishing (CMP) system and associated semiconductor fabrication methods are disclosed herein. An exemplary method includes performing a planarization process in a polishing unit of a CMP system to planarize a surface of a material layer using a CMP slurry. The method further includes, after performing the planarization process, performing a buffing process in the polishing unit of the CMP system to buff the surface of the material layer using an ozone gas dissolved in deionized water (O3/DIW) solution. The method further includes controlling the performing of the planarization process and the performing of the buffing process, such that the CMP slurry is received by the polishing unit from a first pipeline during the planarization process and the O3/DIW solution is received by the polishing unit from a second pipeline during the buffing process.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: August 25, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shich-Chang Suen, Chi-Jen Liu, Ying-Liang Chuang, Li-Chieh Wu, Liang-Guang Chen, Ming-Liang Yen
  • Patent number: 10748898
    Abstract: Provided is a metal gate structure and related methods that include performing a metal gate cut process. The metal gate cut process includes a plurality of etching steps. For example, a first anisotropic dry etch is performed, a second isotropic dry etch is performed, and a third wet etch is performed. In some embodiments, the second isotropic etch removes a residual portion of a metal gate layer including a metal containing layer. In some embodiments, the third etch removes a residual portion of a dielectric layer.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: August 18, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Chi Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
  • Patent number: 10720516
    Abstract: Embodiments of the present disclosure provide a method of cleaning a lanthanum containing substrate without formation of undesired lanthanum compounds during processing. In one embodiment, the cleaning method includes treating the lanthanum containing substrate with an acidic solution prior to cleaning the lanthanum containing substrate with a HF solution. The cleaning method permits using lanthanum doped high-k dielectric layer to modulate effective work function of the gate stack, thus, improving device performance.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: July 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Chi Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20200152772
    Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.
    Type: Application
    Filed: January 17, 2020
    Publication date: May 14, 2020
    Inventors: Ju-Li Huang, Chun-Sheng Liang, Ming-Chi Huang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang
  • Publication number: 20200118823
    Abstract: A chemical mechanical polishing (CMP) system and associated semiconductor fabrication methods are disclosed herein. An exemplary method includes performing a planarization process in a polishing unit of a CMP system to planarize a surface of a material layer using a CMP slurry. The method further includes, after performing the planarization process, performing a buffing process in the polishing unit of the CMP system to buff the surface of the material layer using an ozone gas dissolved in deionized water (O3/DIW) solution. The method further includes controlling the performing of the planarization process and the performing of the buffing process, such that the CMP slurry is received by the polishing unit from a first pipeline during the planarization process and the O3/DIW solution is received by the polishing unit from a second pipeline during the buffing process.
    Type: Application
    Filed: December 11, 2019
    Publication date: April 16, 2020
    Inventors: Shich-Chang SUEN, Chi-Jen LIU, Ying-Liang CHUANG, Li-Chieh WU, Liang-Guang CHEN, Ming-Liang YEN
  • Patent number: 10604756
    Abstract: The present invention relates to methods for protecting against damage caused by radiation and/or chemotherapy, and methods for treating bone marrow damage by reducing/inhibiting Latexin expression and/or Latexin activity. The methods comprise administering to a subject in need thereof a pharmaceutical composition comprising an antagonist that reduces expression and/or activity of latexin, wherein latexin is a latexin polynucleotide variant and/or a latexin polypeptide variant that binds to the antagonist.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: March 31, 2020
    Assignee: University of Kentucky Research Foundation
    Inventors: Gary Van Zant, Ying Liang, Yi Liu
  • Publication number: 20200090940
    Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.
    Type: Application
    Filed: November 19, 2019
    Publication date: March 19, 2020
    Inventors: Ju-Li Huang, Ying-Liang Chuang, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20200080372
    Abstract: A blind capable of stepless positioning includes a control unit which controls the positioning of a shade, is disposed in a roller, and has a fixed sleeve, a spindle, a movable sleeve and a pre-torque spring. The fixed sleeve is fixedly disposed at a roller holder and fitted around one end of the spindle, whereas the movable sleeve is fixedly disposed at the roller and fitted around the other end of the spindle; hence, the movable sleeve rotates together with the roller. The pre-torque spring is fitted around the spindle and has two ends connected to the fixed sleeve and the movable sleeve, respectively, such that the pre-torque spring operates in conjunction with the movable sleeve. While the shade is being rolled up and rolled down, a predetermined torque level of the pre-torque spring matches the length of the shade to therefore brake the shade at any height.
    Type: Application
    Filed: November 9, 2018
    Publication date: March 12, 2020
    Inventors: Sheng-Ying HSU, Wen-Ying LIANG, Wu-Chung NIEN
  • Patent number: 10568396
    Abstract: A woven material (100) including bonding fibers (108) and a method of reinforcing woven material using bonding fibers is disclosed. The woven material (100) includes a plurality of warp threads (102), and at least one weft thread (104) coupled to the warp threads (102). The woven material (100) also includes a plurality of bonding fibers (108). The bonding fibers (108) are positioned in parallel with the warp threads (102), and/or in parallel with the weft thread(s) (104). Additionally, the bonding fibers (108) are formed from a material having a melting temperature that is lower than a melting temperature of the material(s) used to form the warp threads (102) and the weft thread(s) (104) of the woven material.
    Type: Grant
    Filed: July 12, 2015
    Date of Patent: February 25, 2020
    Assignee: APPLE INC.
    Inventors: Yoji Hamada, Peter F. Coxeter, Ying-Liang Su, Edward Siahaan, Whitney D. Mattson, Naoto Matsuyuki
  • Publication number: 20200044073
    Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.
    Type: Application
    Filed: February 27, 2019
    Publication date: February 6, 2020
    Applicant: Taiwam Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li HUANG, Chun-Sheng Liang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang, Chun-Ming Yang, Yu-Chi Pan
  • Patent number: 10541317
    Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: January 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ju-Li Huang, Chun-Sheng Liang, Ming-Chi Huang, Ming-Hsi Yeh, Ying-Liang Chuang, Hsin-Che Chiang