Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.

Abstract: A blind capable of stepless positioning includes a control unit which controls the positioning of a shade, is disposed in a roller, and has a fixed sleeve, a spindle, a movable sleeve and a pre-torque spring. The fixed sleeve is fixedly disposed at a roller holder and fitted around one end of the spindle, whereas the movable sleeve is fixedly disposed at the roller and fitted around the other end of the spindle; hence, the movable sleeve rotates together with the roller. The pre-torque spring is fitted around the spindle and has two ends connected to the fixed sleeve and the movable sleeve, respectively, such that the pre-torque spring operates in conjunction with the movable sleeve. While the shade is being rolled up and rolled down, a predetermined torque level of the pre-torque spring matches the length of the shade to therefore brake the shade at any height.

Abstract: A woven material (100) including bonding fibers (108) and a method of reinforcing woven material using bonding fibers is disclosed. The woven material (100) includes a plurality of warp threads (102), and at least one weft thread (104) coupled to the warp threads (102). The woven material (100) also includes a plurality of bonding fibers (108). The bonding fibers (108) are positioned in parallel with the warp threads (102), and/or in parallel with the weft thread(s) (104). Additionally, the bonding fibers (108) are formed from a material having a melting temperature that is lower than a melting temperature of the material(s) used to form the warp threads (102) and the weft thread(s) (104) of the woven material.

Abstract: The present disclosure describes structure and method of a fin field-effect transistor (finFET) device. The finFET device includes: a substrate, a fin over the substrate, and a gate structure over the fin. The gate structure includes a work-function metal (WFM) layer over an inner sidewall of the gate structure. A topmost surface of the WFM layer is lower than a top surface of the gate structure. The gate structure also includes a filler gate metal layer over the topmost surface of the WFM layer. A top surface of the filler gate metal layer is substantially co-planar with the top surface of the gate structure. The gate structure further includes a self-assembled monolayer (SAM) between the filler gate metal layer and the WFM layer.

Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.

Abstract: A near-eye display and a near-eye display system are provided. The near-eye display includes a display panel, a collimation lens component, and an optical redirector. The display panel includes a plurality of pixels that are disposed in a tiling manner. The collimation lens component includes a plurality of collimation lenses, and the plurality of collimation lenses are in a one-to-one correspondence with the plurality of pixels. Each of the plurality of collimation lenses is configured to: convert, into collimated light, light emitted by a corresponding pixel, and input the collimated light into the optical redirector. The optical redirector includes a plurality of light convergence structures, and the plurality of light convergence structures are in a one-to-one correspondence with the plurality of collimation lenses. Each of the plurality of light convergence structures is configured to converge, on a focus of the near-eye display, collimated light input by a corresponding collimation lens.

Abstract: Embodiments of the present disclosure provide a method of cleaning a lanthanum containing substrate without formation of undesired lanthanum compounds during processing. In one embodiment, the cleaning method includes treating the lanthanum containing substrate with an acidic solution prior to cleaning the lanthanum containing substrate with a HF solution. The cleaning method permits using lanthanum doped high-k dielectric layer to modulate effective work function of the gate stack, thus, improving device performance.

Abstract: A chemical mechanical polishing (CMP) system includes an O3/DIW generator, a polishing unit, and a cleaning unit. The O3/DIW generator is configured to generate an O3/DIW solution including ozone gas (O3) dissolved in deionized water (DIW). The polishing unit includes components for buffing a surface of a semiconductor structure, and a pipeline coupled to the O3/DIW generator to receive the O3/DIW solution for the buffing. The cleaning unit is coupled to the O3/DIW generator and is configured to clean the surface of the semiconductor structure using the O3/DIW solution.

Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.

Abstract: Embodiments of the present disclosure provide wet process based methods for modifying threshold value (Vt) of high-k metal gate using self-assembled monolayer (SAM) on dedicated transistor. In one embodiment, the method includes forming a gate structure over a substrate, the gate structure comprising a gate dielectric layer, a barrier layer formed over the gate dielectric layer, and an oxide layer formed over the barrier layer, and forming a self-assembled monolayer on the oxide layer by exposing the oxide layer to an aqueous solution containing metal oxides in a metal dissolving acid.

Abstract: Provided is a metal gate structure and related methods that include performing a metal gate cut process. The metal gate cut process includes a plurality of etching steps. For example, a first anisotropic dry etch is performed, a second isotropic dry etch is performed, and a third wet etch is performed. In some embodiments, the second isotropic etch removes a residual portion of a metal gate layer including a metal containing layer. In some embodiments, the third etch removes a residual portion of a dielectric layer.

Abstract: Embodiments of the present invention relate to the communications field, and provide a branching tower-mounted amplifier and an antenna feed system, so that a branching tower-mounted amplifier is added on an antenna unit side, thereby implementing a function of a four-port RRU, ensuring network coverage, and improving network performance. The branching tower-mounted amplifier includes a first filter module, a second filter module, a first amplification module, a second amplification module, a control module, a first branching module, and a second branching module.

Abstract: Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.

Abstract: Embodiments of the present disclosure provide wet process based methods for modifying threshold value (Vt) of high-k metal gate using self-assembled monolayer (SAM) on dedicated transistor. In one embodiment, the method includes forming a gate structure over a substrate, the gate structure comprising a gate dielectric layer, a barrier layer formed over the gate dielectric layer, and an oxide layer formed over the barrier layer, and forming a self-assembled monolayer on the oxide layer by exposing the oxide layer to an aqueous solution containing metal oxides in a metal dissolving acid.

Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.

Abstract: Provided is a metal gate structure and related methods that include performing a metal gate cut process. The metal gate cut process includes a plurality of etching steps. For example, a first anisotropic dry etch is performed, a second isotropic dry etch is performed, and a third wet etch is performed. In some embodiments, the second isotropic etch removes a residual portion of a metal gate layer including a metal containing layer. In some embodiments, the third etch removes a residual portion of a dielectric layer.

Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a semiconductor device includes a first gate structure and a second gate structure on a substrate; wherein the first gate structure includes a first gate dielectric layer having a first material, and the second gate structure includes a second gate dielectric layer having a second material, the first material being different from the second material, wherein the first and the second gate structures further includes a first and a second self-protective layers disposed on the first and the second gate dielectric layers respectively, wherein the first self-protective layer includes metal phosphate and the second self-protective layer includes boron including complex agents and a first work function tuning layer on the first self-protective layer in the first gate structure.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a fin structure over a substrate. The method also includes forming a gate structure over the fin structure. The method further includes forming fin spacers over sidewalls of the fin structure and gate spacers over sidewalls of the gate structure. In addition, the method includes forming a source/drain structure over the fin structure and depositing a dummy material layer to cover the source/drain structure. The dummy material layer is removed faster than the gate spacers during the removal of the dummy material layer. The method further includes forming a salicide layer over the source/drain structure and the fin spacers, and forming a contact over the salicide layer. The dummy material layer includes Ge, amorphous silicon or spin-on carbon.

Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a semiconductor device includes a first gate structure and a second gate structure on a substrate; wherein the first gate structure includes a first gate dielectric layer having a first material, and the second gate structure includes a second gate dielectric layer having a second material, the first material being different from the second material, wherein the first and the second gate structures further comprises a first and a second self-protective layers disposed on the first and the second gate dielectric layers respectively, wherein the first self-protective layer comprises metal phosphate and the second self-protective layer comprises boron comprising complex agents and a first work function tuning layer on the first self-protective layer in the first gate structure.

Abstract: A method includes forming a gate stack, which includes a first portion over a portion of a first semiconductor fin, a second portion over a portion of a second semiconductor fin, and a third portion connecting the first portion to the second portion. An anisotropic etching is performed on the third portion of the gate stack to form an opening between the first portion and the second portion. A footing portion of the third portion remains after the anisotropic etching. The method further includes performing an isotropic etching to remove a metal gate portion of the footing portion, and filling the opening with a dielectric material.