Patents by Inventor Ying (Lora) Liang
Ying (Lora) Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12369387Abstract: Nanowire devices and fin devices are formed in a first region and a second region of a substrate. To form the devices, alternating layers of a first material and a second material are formed, inner spacers are formed adjacent to the layers of the first material, and then the layers of the first material are removed to form nanowires without removing the layers of the first material within the second region. Gate structures of gate dielectrics and gate electrodes are formed within the first region and the second region in order to form the nanowire devices in the first region and the fin devices in the second region.Type: GrantFiled: July 6, 2021Date of Patent: July 22, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chao-Ching Cheng, Tzu-Chiang Chen, Chen-Feng Hsu, Yu-Lin Yang, Tung Ying Lee, Chih Chieh Yeh
-
Patent number: 12369391Abstract: The invention provides a layout pattern of a semiconductor varactor, which comprises a plurality of varactor units arranged on a substrate, wherein each varactor unit comprises a plurality of fin structures arranged in parallel with each other, a plurality of gate structures arranged in parallel with each other, located on the substrate and spanning the fin structures, and a gate metal layer electrically connected with the plurality of gate structures.Type: GrantFiled: January 19, 2023Date of Patent: July 22, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ching-Wen Hung, Peng-Hsiu Chen, Su-Ming Hsieh, Ying-Ren Chen
-
Patent number: 12369389Abstract: An integrated circuit is provided and includes first transistors of a first circuit arranged in a first cell row having a first number of fin structures and a second transistor of a second circuit. The second transistor is coupled in parallel with a first element in the first transistors between first and second terminals of the first circuit, and arranged in a second cell row having a second number, different from the first number, of fin structures. The first element and the second transistor share a first gate extending in a first direction to pass through the first and second cell rows in a layout view. The second transistor is a duplication of the first element.Type: GrantFiled: July 28, 2023Date of Patent: July 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jerry Chang-Jui Kao, Hui-Zhong Zhuang, Li-Chung Hsu, Sung-Yen Yeh, Yung-Chen Chien, Jung-Chan Yang, Tzu-Ying Lin
-
Patent number: 12366780Abstract: A pixel structure and a display panel are disclosed. The pixel structure includes a plurality of data lines, a plurality of scan lines, and a plurality of pixel rows. The scan line of a next stage of the pixel row where a first pixel unit is located is connected to the sub-pixel with the highest brightness under the same gray scale in the same first pixel unit. This can reduce a coupling capacitance received by the sub-pixel with the highest brightness in the same gray level, and further reduce a feeder voltage received by the sub-pixel with the highest brightness in the same gray level.Type: GrantFiled: April 14, 2022Date of Patent: July 22, 2025Assignee: SUZHOU CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yingying Liu, Jianjian Ying, Peng Du
-
Patent number: 12369394Abstract: In an embodiment, a method includes forming a plurality of fins adjacent to a substrate, the plurality of fins comprising a first fin, a second fin, and a third fin; forming a first insulation material adjacent to the plurality of fins; reducing a thickness of the first insulation material; after reducing the thickness of the fist insulation material, forming a second insulation material adjacent to the first insulation material and the plurality of fins; and recessing the first insulation material and the second insulation material to form a first shallow trench isolation (STI) region.Type: GrantFiled: April 25, 2024Date of Patent: July 22, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Szu-Ying Chen, Sen-Hong Syue, Li-Ting Wang, Huicheng Chang, Yee-Chia Yeo
-
Patent number: 12368436Abstract: A semiconductor device includes a first conductivity-type substrate, and a cell region including: a second conductivity type deep well; first and second non-deep wells having the second conductivity-type, the first and second non-deep wells being in corresponding first and second portions of the substrate, the first and second portions of the substrate being in the deep well; and first, second, third and fourth transistor-regions. The first and second transistor-regions are correspondingly in the first and second non-deep wells and include first conductivity-type first transistors. The third and fourth transistor-regions are in the third and fourth portions of the substrate which are in the deep well, and include second transistors having the second conductivity-type. The first transistor-region is configured for a first power domain. The second, third and fourth transistor-regions are configured for a second power domain that is different than the first power domain.Type: GrantFiled: April 14, 2022Date of Patent: July 22, 2025Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY, LIMITEDInventors: Huaixin Xian, Zhang-Ying Yan, Qingchao Meng
-
Patent number: 12369400Abstract: An electronic device includes a panel with an operation region and an extended circuit region. The panel includes a first substrate and a first polarizing element. The first polarizing element is disposed on the first substrate. The first substrate extends from the operation region to the extended circuit region, and the first polarizing element extends from the operation region to the extended circuit region.Type: GrantFiled: November 17, 2022Date of Patent: July 22, 2025Assignee: InnoLux CorporationInventors: Yu-Chih Tseng, Yi Tung, Pi-Ying Chuang, Kuo-Shun Tsai, Chu-Hong Lai
-
Patent number: 12367176Abstract: Approaches for providing a non-disruptive file move are disclosed. A request to move a target file from the first constituent to the second constituent is received. The file has an associated file handle. The target file in the first constituent is converted to a multipart file in the first constituent with a file location for the new file in the first constituent. A new file is created in the second constituent. Contents of the target file are moved to a new file on the second constituent while maintaining access via the associated file handle via access to the multipart file. The target file is deleted from the first constituent.Type: GrantFiled: April 24, 2023Date of Patent: July 22, 2025Assignee: NetApp, Inc.Inventors: Richard Parvin Jernigan, IV, Umeshkumar Vasantha Rajasekaran, Ying-Hao Wang, Yuyu Zhou
-
Patent number: 12365540Abstract: The present disclosure provides a control method for goods retrievement and storage, a control apparatus, and a transport robot. The control method for goods retrievement includes: receiving a retrievement instruction, and acquiring locating information of target goods according to the retrievement instruction; moving a transport robot to a target position according to the locating information; obtaining status information of the target goods and/or position relationship information between a carrying apparatus and the target goods; and adjusting a position and posture of the carrying apparatus according to the status information and/or the position relationship information, and causing the carrying apparatus to take out the target goods.Type: GrantFiled: March 29, 2022Date of Patent: July 22, 2025Assignee: HAI ROBOTICS CO., LTD.Inventors: Ruiqun Zheng, Zhe Kong, Ying Zhao, Jiawei He, Qingxin Zhan
-
Patent number: 12367815Abstract: Provided are a display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels, the sub-pixel includes a pixel circuit and a light-emitting element, the pixel circuit is configured to drive the light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting functional layer located therebetween; the pixel circuit includes a driving transistor, and the first electrode of the light-emitting element is electrically connected to a first electrode of the driving transistor; the plurality of sub-pixels include a first sub-pixel and a second sub-pixel, the first sub-pixel is adjacent to the second sub-pixel, and an orthographic projection of the first electrode of the light-emitting element of the first sub-pixel on the base substrate does not overlap an orthographic projection of the pixel circuit of the second sub-pixel on the base substrate.Type: GrantFiled: December 23, 2022Date of Patent: July 22, 2025Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ying Han, Pan Xu, Xing Zhang, Chengyuan Luo, Guangshuang Lv, Donghui Zhao, Cheng Xu
-
Patent number: 12367204Abstract: Computer-implemented prediction methods, in accordance with various embodiments, involve storing key-value pairs each including a key tuple and an associated value in a data store, building a prediction model associated with at least a subset of the key-value pairs, and in response to receipt of a prediction query that specifies a key tuple, generating a prediction response based on the prediction model that includes a predicted value for the specified key tuple. In one example application, the key tuples each include an operation specifying a purchase and a two-part identifier specifying a customer and a product.Type: GrantFiled: April 29, 2024Date of Patent: July 22, 2025Assignee: NIKE, Inc.Inventors: Ying-zong Huang, Vishal Doshi, Balaji Rengarajan, Vasudha Shivamoggi, Devavrat Shah, Ritesh Madan
-
Patent number: 12369171Abstract: A station (STA) receives an indication from a first access point (AP) on one of a plurality of links that is not a non-primary link among the plurality of links comprising at least a primary link and the non-primary link. Based on the indication, the STA determines that: (i) the first AP is affiliated with a non-simultaneous-transmit-and-receive (NSTR) AP multi-link device (MLD), and (ii) a second AP, as a neighbor AP of the first AP, is affiliated with the NSTR AP MLD and is operating on the non-primary link.Type: GrantFiled: May 26, 2022Date of Patent: July 22, 2025Assignee: MediaTek Singapore Pte. Ltd.Inventors: Kai Ying Lu, Yongho Seok, James Chih-Shi Yee
-
Patent number: 12369476Abstract: The present disclosure provides a transparent display panel and method for manufacturing the same and a display device. The transparent display panel includes pixel units arranged in an array, and the pixel unit includes a light-emitting area and a transparent area. The pixel unit includes a pixel defining layer disposed in the light-emitting area and defining a plurality of opening areas. A light-emitting device is disposed in the opening area. The pixel unit further includes a transparent film layer disposed in the transparent area and being of a hydrophobic material. The transparent film layer includes a groove and an inclined channel, and the channel connects the groove with any one of the opening areas. A bottom surface of the groove is higher than a bottom surface of the opening area, and an area of the groove is greater than that of the opening area connected with the channel.Type: GrantFiled: April 20, 2021Date of Patent: July 22, 2025Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventor: Ying Cui
-
Systems and methods for operating passive nitrogen oxide adsorbers in exhaust aftertreatment systems
Patent number: 12366191Abstract: A system includes a passive NOx adsorber (PNA) for receiving and treating exhaust gas generated by an engine and a controller. The controller is configured to: while exhaust gas is received by the PNA, detect a torque demand that is greater than a threshold value; responsive to detecting that the torque demand is greater than the threshold value, engage a motor, coupled with a battery system, with a drive shaft of the system to meet at least a portion of the torque demand; and in response to the engagement of the motor with the drive shaft not meeting all of the torque demand, engage the engine with the drive shaft to meet a remainder of the torque demand.Type: GrantFiled: August 13, 2024Date of Patent: July 22, 2025Assignee: Cummins Inc.Inventors: Jinyong Luo, Xiaobo Song, Xing Jin, David Schmidt, Lu Qiu, Lisa A Orth-Farrell, Ying Yuan, Manik Narula, Lars K. Henrichsen -
Patent number: 12365744Abstract: System for and method of producing a pure starch slurry and alcohol by using combined corn wet and dry milling processes. A simple and lower cost process to obtain starch inside floury endosperm is provided. The starch can be highly purified to meet green technology process needs. The remaining starch inside the corn kernels can be used as feedstock for alcohol production and to produce valuable co-products such as oil and various animal feeds.Type: GrantFiled: August 15, 2024Date of Patent: July 22, 2025Assignee: Lee Tech LLCInventor: Chie Ying Lee
-
Patent number: 12367569Abstract: A method includes forming a package component, the package component comprising an integrated circuit die, attaching the package component to a package substrate; placing a heat spreader over the package component and the package substrate to form an integrated circuit package, wherein a height of the integrated circuit package is in a range from 2.5 mm to 6 mm, and performing a first automatic optical inspection (AOI) process on the integrated circuit package using an AOI apparatus to determine if the orientation and alignment of the heat spreader with regards to the package substrate is within specification, wherein the AOI apparatus comprises a lens that has a maximum depth of field that is greater than the height of the integrated circuit package, and wherein during the first AOI process the depth of field encompasses an entirety of the height of the integrated circuit package.Type: GrantFiled: April 27, 2022Date of Patent: July 22, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: I-Hsuan Chen, Ying-Hao Wang, Chien-Lung Chen, Chien-Chi Tzeng, Hu-Wei Lin
-
Patent number: 12369399Abstract: An integrated circuit structure having a stacked transistor architecture includes a first semiconductor body (e.g., set of one or more nanoribbons) and a second semiconductor body (e.g., set of one or more nanoribbons) above the first semiconductor body. The first and second semiconductor bodies are part of the same fin structure. The distance between an upper surface of the first semiconductor body and a lower surface of the second semiconductor body is 60 nm or less. A first gate structure is on the first semiconductor body, and a second gate structure is on the second semiconductor body. An isolation structure that includes a dielectric material is between the first and second gate structures, and is on and conformal to a top surface of the first gate structure. In addition, a bottom surface of the second gate structure is on a top surface of the isolation structure, which is relatively flat.Type: GrantFiled: August 25, 2021Date of Patent: July 22, 2025Assignee: INTEL CORPORATIONInventors: Willy Rachmady, Sudipto Naskar, Cheng-Ying Huang, Gilbert Dewey, Marko Radosavljevic, Nicole K. Thomas, Patrick Morrow, Urusa Alaan
-
Patent number: 12368976Abstract: A method for verifying alignment of image sensors of a CCD camera, the method including casting a collimated light source through an LCOS controlled to be disposed in a first pattern, onto the image sensors to form a second pattern on each of the image sensors, the LCOS disposed between a collimated light source and the CCD camera, frame-differencing the first pattern with the second pattern of each of the image sensors to result in a differencing result for each of the image sensors, and adjusting at least one of an orientation and a position of one of the image sensors if the differencing result for the one of the image sensors is non-zero, to result in an optical mapping of pixel cells of the LCOS and pixel cells of each of the image sensors.Type: GrantFiled: May 8, 2025Date of Patent: July 22, 2025Assignee: MLOptic Corp.Inventors: Wei Zhou, Kaizhang Fan, Ying-Ju Chu
-
Publication number: 20250232957Abstract: Systems and methods for multi-level pulsing are described. The systems and methods include generating four or more states. During each of the four or more states, a radio frequency (RF) generator generates an RF signal. The RF signal has four or more power levels, and each of the four or more power levels corresponds to the four or more states. The multi-level pulsing facilitates a finer control in processing a substrate.Type: ApplicationFiled: March 31, 2025Publication date: July 17, 2025Inventors: Ying Wu, Maolin Long, John Drewery, Vikram Singh
-
Patent number: D1084869Type: GrantFiled: August 28, 2023Date of Patent: July 22, 2025Inventor: Kuei-Ying Hsu