Patents by Inventor Yogesh Kumar

Yogesh Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240413800
    Abstract: Described embodiments include an audio amplifier circuit that includes a first amplifier having a differential first amplifier input adapted to be coupled to an audio input source, a multiplexer having first and second mux inputs, a control input and a mux output. The first mux input is coupled to the differential amplifier output. There is a signal generator having a generator input coupled to the mux output. There is also a driver circuit having a driver circuit input and a driver circuit output, the driver circuit input coupled to the generator output, and a second amplifier having a first error input coupled to a current sense terminal that is configured to provide a voltage proportional to a current supplied from a power supply terminal, and a second error input coupled to a current limit terminal configured to provide a reference voltage proportional to a current limit value.
    Type: Application
    Filed: August 19, 2024
    Publication date: December 12, 2024
    Inventors: Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Yinglai Xia
  • Publication number: 20240386452
    Abstract: The embodiments of present disclosure address a need of a framework to holistically utilize storage capacity of an Energy Storage System (ESS) to serve forecast errors of several Renewable Energy Generators (REGens) participating in a day-ahead market. Embodiments herein provide a method and system for optimizing the operation and price of an Energy Storage as a Service (ESaaS) framework. In anticipation of the forecast errors from REGens, the ESS operator takes suitable countermeasures such as charging/discharging of storage system through market transactions. This is done in a way to reduce imbalance in the market commitments made by individual REGens without reserving any storage volume for each REGen. Further, the system is configured to schedule the storage, determine the settlement volumes, and decide the service prices. The disclosed ESaaS framework is beneficial for all entities such as REGens (revenue outflow decreases), system operator (imbalance volume reduces), and ESS (revenue earned increases).
    Type: Application
    Filed: May 7, 2024
    Publication date: November 21, 2024
    Applicant: Tata Consultancy Services Limited
    Inventors: Vishnu Padmakumar MENON, Yogesh Kumar BICHPURIYA, Narayanan RAJAGOPAL, Venkatesh SARANGAN
  • Patent number: 12132398
    Abstract: In some examples, a circuit includes an amplifier, a resistor, and a damping network. The amplifier has an amplifier output and first and second amplifier inputs. The first amplifier input is adapted to be coupled to a first terminal, and the second amplifier input is configured to receive a reference voltage. The resistor is coupled between the amplifier output and the first amplifier input. The damping network is coupled between the amplifier output and the first terminal.
    Type: Grant
    Filed: January 31, 2023
    Date of Patent: October 29, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yongbin Chu, Yogesh Kumar Ramadass
  • Publication number: 20240338471
    Abstract: An aspect of the present disclosure facilitates secured access to protected resources. In one embodiment, a system (e.g., identity provider) receives, from an application service operating on a cloud node of a first cloud, a token request to access a protected resource hosted on a second cloud. The system generates a cloud web token containing a resource identifier of the protected resource, an application identifier associated with the application service and a node identifier of the cloud node. The system sends the cloud web token to the cloud node. Upon receiving, from the application service, an access request containing the resource identifier and the cloud web token, the system checks whether the cloud web token contained in the access request is valid. The system allows access to the protected resource if the cloud web token is determined to be valid, and denies access to the protected resource otherwise.
    Type: Application
    Filed: April 6, 2023
    Publication date: October 10, 2024
    Inventors: Manish Agrawal, Sandeep Kumar, Yogesh Kumar
  • Patent number: 12095429
    Abstract: Described embodiments include an audio amplifier circuit that includes a first amplifier having a differential first amplifier input adapted to be coupled to an audio input source, a multiplexer having first and second mux inputs, a control input and a mux output. The first mux input is coupled to the differential amplifier output. There is a signal generator having a generator input coupled to the mux output. There is also a driver circuit having a driver circuit input and a driver circuit output, the driver circuit input coupled to the generator output, and a second amplifier having a first error input coupled to a current sense terminal that is configured to provide a voltage proportional to a current supplied from a power supply terminal, and a second error input coupled to a current limit terminal configured to provide a reference voltage proportional to a current limit value.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 17, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Yinglai Xia
  • Publication number: 20240302326
    Abstract: An integrated circuit (IC) includes a semiconductor substrate and a mold compound on the semiconductor substrate. The IC also includes an acoustic signal generator between the mold compound and the semiconductor substrate. The acoustic signal generator is configured to transmit an acoustic signal having a predetermined set of frequencies through at least one of the semiconductor substrate or the mold compound.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Inventors: Bichoy Waguih Bahr, Ting-Ta Yen, Yogesh Kumar Ramadass
  • Publication number: 20240239751
    Abstract: Provided herein are improved processes for the preparation of a compound of Formula IX (AG-10). Also provided herein are pharmaceutically acceptable salts of Formula I and Formula Ib as well as crystalline types of Formula IX (AG-10). The processes described herein provide improved yields and efficiency, while the pharmaceutically acceptable salts and crystalline forms provide unexpected pharmacokinetic properties. Other features and aspects of the present disclosure will be apparent to a person of skill in the art upon reading the remainder of the specification.
    Type: Application
    Filed: January 16, 2024
    Publication date: July 18, 2024
    Inventors: Pooran CHAND, Yogesh Kumar GUPTA, Rakesh Kumar KUMAWAT, Mamoun ALHAMADSHEH, Robert ZAMBONI
  • Patent number: 12034378
    Abstract: A method includes charging a capacitor of a power inverter to a direct current (DC) input voltage from an input terminal of the power inverter. The capacitor has first and second terminals. The method also includes providing a first voltage at an output terminal of the power inverter at a first time by controlling one of either: an output switch that selectively couples the output terminal to either the first terminal or the second terminal; or a set of input switches that selectively couple the first and second terminals to either the input terminal or a ground terminal. The method further includes providing a second voltage at the output terminal at a second time by controlling the other of the output switch or the set of input switches.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: July 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Orlando Lazaro, Yogesh Kumar Ramadass, Nan Xing
  • Patent number: 12034420
    Abstract: A switching amplifier includes a first portion of a power stage; a second portion of a power stage; a pulse-width modulation (PWM) control loop coupled to control inputs of the first portion of the power stage; and a linear amplifier coupled to control inputs of the second portion of the power stage. The PWM control loop controls a first switch and a second switch of the first portion of the power stage. Between current terminals of the first switch and the second switch is a first signal output of the switching amplifier. The linear amplifier controls a third switch and a fourth switch of the second portion of the power stage. Between current terminals of the third switch and the fourth switch is a second signal output of the switching amplifier.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: July 9, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yinglai Xia, Yogesh Kumar Ramadass
  • Publication number: 20240211639
    Abstract: Disclosed are systems and methods for uniquely identifying a hardware device. In one aspect, a method may comprise (a) obtaining a first partial key and encrypted parameters from a database and a second partial key from a remote server; (b) decrypting the encrypted parameters using the first partial key and the second partial key, to thereby generate decrypted parameters; (c) obtaining attributes of a hardware device, wherein the attributes comprise a state of a CPU or GPU of the hardware device; (d) processing, on the hardware device, the attributes with a first ML algorithm to generate a digital fingerprint of the hardware device, wherein the first ML algorithm comprises the decrypted parameters; and (e) processing, on the remote server, at least the digital fingerprint of the hardware device and the attributes with a second ML algorithm configured to determine whether the hardware device has been previously identified.
    Type: Application
    Filed: August 9, 2023
    Publication date: June 27, 2024
    Inventor: Yogesh Kumar Jitendra PATEL
  • Publication number: 20240194574
    Abstract: Disclosed embodiments include an integrated circuit (IC) comprising a silicon wafer, first and second conductive lines on the silicon wafer. There are first, second and third insulation blocks with portions on the first and second conductive lines and the silicon wafer, a metal pillar on the surface of the first conductive line opposite the silicon wafer, and a conductive adhesive block on the surface of the second conductive line opposite the silicon wafer. The IC also has a lead frame having first and second leads, and a capacitor having first and second capacitor terminals in which the first capacitor terminal is connected to the second lead using conductive adhesive, the second capacitor terminal is connected to the second conductive line through the conductive adhesive block, and the first lead is coupled to the first conductive line.
    Type: Application
    Filed: February 23, 2024
    Publication date: June 13, 2024
    Inventors: Benjamin Stassen Cook, Yogesh Kumar Ramadass, Salvatore Frank Pavone, Mahmud Halim Chowdhury
  • Publication number: 20240154981
    Abstract: Systems and methods for monitoring network activity. The methods include receiving at an interface a first logging parameter for a first network device, wherein the first logging parameter specifies how the first network device is to record data associated with the first network device; communicating the first logging parameter to the first network device; and indicating to the first network device a first network-accessible location to where the first network device is to transmit its recorded data, wherein the first network device is configured to record data in accord with the first logging parameter and transmit the recorded data to the first network-accessible location.
    Type: Application
    Filed: December 17, 2022
    Publication date: May 9, 2024
    Inventors: Avni Bhupendrakumar Wala, Yogesh Kumar Bansal, Bhaskar Sen, Sowri Raju Bathineni, Sumit Jindal
  • Patent number: 11948871
    Abstract: Disclosed embodiments include an integrated circuit (IC) comprising a silicon wafer, first and second conductive lines on the silicon wafer. There are first, second and third insulation blocks with portions on the first and second conductive lines and the silicon wafer, a metal pillar on the surface of the first conductive line opposite the silicon wafer, and a conductive adhesive block on the surface of the second conductive line opposite the silicon wafer. The IC also has a lead frame having first and second leads, and a capacitor having first and second capacitor terminals in which the first capacitor terminal is connected to the second lead using conductive adhesive, the second capacitor terminal is connected to the second conductive line through the conductive adhesive block, and the first lead is coupled to the first conductive line.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: April 2, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Benjamin Stassen Cook, Yogesh Kumar Ramadass, Salvatore Frank Pavone, Mahmud Halim Chowdhury
  • Publication number: 20240088878
    Abstract: In one example, an apparatus comprises a power stage having a first power stage input, a second power stage input, and a power stage output. The apparatus also comprises a modulator circuit having a first ramp input, a second ramp input, a modulator input, a first modulator output, and a second modulator output, the first modulator output coupled to the first power stage input, and the second modulator output coupled to the second power stage input. The apparatus also comprises a multi-level ramp generator having a first ramp output and a second ramp output, the first ramp output coupled to the first ramp input, and the second ramp output coupled the second ramp input.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Yinglai Xia, Shailendra Kumar Baranwal, Yogesh Kumar Ramadass, Junmin Jiang
  • Publication number: 20240088647
    Abstract: In one example, an apparatus comprises: a first switch and a second switch coupled between a fuse terminal and a ground terminal, the first switch having a first switch control terminal, the second switch having a second switch control terminal; and a driver circuit having a control input, a first control output, and a second control output, the control input coupled to the fuse terminal, the first control output coupled to the first switch control terminal, and the second control output coupled to the second switch control terminal.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Yogesh Kumar Ramadass, Ujwal Radhakrishna, Jeffrey Morroni
  • Publication number: 20240079958
    Abstract: In one example, an apparatus comprises: a primary side bridge coupled between a power input and a first ground terminal, the primary side bridge having first switching terminals coupled to first capacitor terminals; and a secondary side bridge coupled between a power output and a second ground terminal, the secondary side bridge having second switching terminals coupled to second capacitor terminals.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Applicant: Texas Instruments Incorporated
    Inventors: Ashish Kumar, Haoquan Zhang, Yogesh Kumar Ramadass
  • Patent number: 11919865
    Abstract: Provided herein are improved processes for the preparation of a compound of Formula IX (AG-10). Also provided herein are pharmaceutically acceptable salts of Formula I and Formula Ib as well as crystalline types of Formula IX (AG-10). The processes described herein provide improved yields and efficiency, while the pharmaceutically acceptable salts and crystalline forms provide unexpected pharmacokinetic properties. Other features and aspects of the present disclosure will be apparent to a person of skill in the art upon reading the remainder of the specification.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: March 5, 2024
    Assignee: EIDOS THERAPEUTICS, INC.
    Inventors: Pooran Chand, Yogesh Kumar Gupta, Rakesh Kumar Kumawat, Mamoun Alhamadsheh, Robert Zamboni
  • Publication number: 20240069970
    Abstract: Described herein are systems and methods for sharing vitals among service replicas to enable processing of long running workflows within a container orchestration system. A method can provide a container orchestration system that provides within one or more container orchestration environments, a runtime for containerized workloads and services. The method can provide a healthbus within the container orchestration system, the healthbus comprising a memory. The method can deploy a plurality of pods within the container orchestration system, each pod comprising a memory. The method can periodically publish, by each pod, a health message to the healthbus, the health message comprising at least an indication of an identification of the pod and an indication of a time interval in which the pod has been active. The method can periodically query, by each pod, the healthbus to determine a world view of the container orchestration system.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: MURALI POTTLAPELLI, MICHAL CHMIELEWSKI, YOGESH KUMAR
  • Publication number: 20240024864
    Abstract: A process for regenerating catalyst from a fluidized catalytic process comprising is disclosed. The process comprises providing an oxygen stream and a preheated carbon dioxide recycle stream and mixing the oxygen stream and the preheated carbon dioxide recycle stream to provide a carbon dioxide rich oxidation stream. The carbon dioxide rich oxidation stream is passed to a regenerator unit to provide a carbon dioxide rich flue gas stream. One or more of a sulfur-containing compound, a nitrogen-containing compound, or both in the carbon dioxide rich flue gas stream is reacted with a reactant in a decontamination reactor to form a reactor effluent stream comprising reactant salt. The reactor effluent stream is filtered to remove the reactant salt and catalyst fines to produce a filtered reactor effluent stream. A carbon dioxide recycle stream is taken from the filtered reactor effluent stream.
    Type: Application
    Filed: May 8, 2023
    Publication date: January 25, 2024
    Inventors: Sakthivelan Maadasamy Durai, Yogesh Kumar Gupta, Jan De Ren, Anil Nivrutti Pachpande
  • Publication number: 20240026228
    Abstract: A process for regenerating catalyst from a fluidized catalytic process comprising is disclosed. The process comprises providing an oxygen stream and a preheated carbon dioxide recycle stream and mixing the oxygen stream and the preheated carbon dioxide recycle stream to provide a carbon dioxide rich oxidation stream. The carbon dioxide rich oxidation stream is passed to a regenerator unit to provide a carbon dioxide rich flue gas stream. One or more of a sulfur-containing compound, a nitrogen-containing compound, or both in the carbon dioxide rich flue gas stream is reacted with a reactant in a decontamination reactor to form a reactor effluent stream comprising reactant salt. The reactor effluent stream is filtered to remove the reactant salt and catalyst fines to produce a filtered reactor effluent stream. A carbon dioxide recycle stream is taken from the filtered reactor effluent stream.
    Type: Application
    Filed: May 8, 2023
    Publication date: January 25, 2024
    Inventors: Anil Nivrutti Pachpande, Yogesh Kumar Gupta, Jan De Ren, Sakthivelan Maadasamy Durai