Patents by Inventor Yohei Yamaguchi

Yohei Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240148895
    Abstract: An antibody-drug conjugate represented by formula (I): (where Ab is an antibody, X is a group represented by formula (X-1), formula (X-2) or formula (X-3): (where at the left represents the binding site with NH and at the right represents the binding side with D), D is a group represented by formula (D-1) or formula (D-2): (where represents the binding site with X), and n is in the range of about 1 to about 8).
    Type: Application
    Filed: August 24, 2023
    Publication date: May 9, 2024
    Inventors: Masayuki MIYANO, Yuya NAKAZAWA, Kentaro ISO, Yuki YABE, Hirotatsu UMIHARA, Junichi TAGUCHI, Satoshi INOUE, Shuntaro TSUKAMOTO, Hiroyuki KOGAI, Atsumi YAMAGUCHI, Tsuyoshi AKAGI, Yohei MUKAI, Toshifumi HIRAYAMA, Masaki KATO, Toshiki MOCHIZUKI, Akihiko YAMAMOTO, Yuji YAMAMOTO, Takato SAKURADA
  • Publication number: 20240141182
    Abstract: An object of the present invention is to provide a multi-layer coating film having at least a clear coating film and a base coating film and having good chipping resistance, and preferably to provide a multi-layer coating film further having good designability. The multi-layer coating film of the present invention is a multi-layer coating film comprising a substrate, a base layer formed thereon, and a clear layer formed on the base layer, wherein the base layer comprises a luster pigment, wherein the base layer has an erosion index of 45 ?m2/g or less where the erosion index is a value obtained by multiplying an erosion rate of the base layer by a thickness of the base layer, and wherein the erosion rate of the base layer is measured using a micro slurry jet erosion method at a projection power at which an erosion rate with respect to a silicon wafer is 0.635 ?m/g.
    Type: Application
    Filed: February 21, 2022
    Publication date: May 2, 2024
    Applicant: NIPPON PAINT AUTOMOTIVE COATINGS CO., LTD.
    Inventors: Tomoyuki ISHIKAWA, Kohei YAMAGUCHI, Eiji YAMANAKA, Azusa JIZODO, Yoshito ARAKI, Yohei JINNO
  • Publication number: 20240144740
    Abstract: The controller of the information processing apparatus obtains a first evaluation amount that is an evaluation amount of the first vehicle in a case that the body color of the first vehicle is assumed to be the color of the first paint coating film. The controller obtains a second evaluation amount that is an evaluation amount of the first vehicle in case that the body color of the first vehicle is assumed to be the color of the second paint coating film. The controller determines whether the second paint coating film should be removed from the first vehicle based on the first evaluation amount and the second evaluation amount. The controller outputs the above determination result.
    Type: Application
    Filed: October 16, 2023
    Publication date: May 2, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kenji YAMAGUCHI, Yohei NAKSNISHI, Yu HAMADA
  • Publication number: 20240144348
    Abstract: The information processing apparatus acquires the first body color desired by a user as a body color of a vehicle ordered by the user. Furthermore, based on at least the appraised value of the vehicle having a first body color after a predetermined period has elapsed, the information processing apparatus determines whether or not to propose to the user to topcoat the vehicle having the second body color with an easily peelable paint of the first body color.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 2, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kenji YAMAGUCHI, Yohei NAKANISHI, Yu HAMADA
  • Patent number: 11971709
    Abstract: The disclosure is to constitute, while reducing a cost for collecting training data used in machine learning that makes a control module acquire an ability to control a robot device, the control module operatable in an actual environment by the machine learning. A learning device according to one aspect of the present invention executes machine learning of an extractor by using a first learning data set constituted by a combination of simulation data and first environmental information and a second learning data set constituted by a combination of actual data and second environmental information. Further, a learning device according to one aspect of the present invention executes machine learning of a controller by using a third learning data set constituted by a combination of third environmental information, state information, and a control command.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: April 30, 2024
    Assignee: OMRON Corporation
    Inventors: Yuki Yamaguchi, Kennosuke Hayashi, Kin Chung Denny Fu, Yohei Okawa, Chisato Saito, Yoshiya Shibata
  • Publication number: 20240135418
    Abstract: An information processing apparatus calculates a fee for applying a second coating film including an easily removable layer to a first vehicle having a first coating film applied thereon. The information processing apparatus disclosed herein has a controller that calculates a first fee defined as a fee for applying the second coating film to the first vehicle that is for lease lower than a second fee defined as a fee for applying the second coating film to the first vehicle that is not for lease. In other words, the controller calculates the first fee by subtracting a first subtraction value from the second fee.
    Type: Application
    Filed: October 22, 2023
    Publication date: April 25, 2024
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Kenji YAMAGUCHI, Yohei Nakanishi, Yu Hamada
  • Publication number: 20240128724
    Abstract: An optical semiconductor device according to the present disclosure includes: a first-conductivity-type semiconductor substrate having a projecting portion; second-conductivity-type intermediate layers formed on both sides of the projecting portion above the semiconductor substrate; a stripe-shaped mesa structure formed of a first-conductivity-type first cladding layer, an active layer, and a second-conductivity-type second cladding layer, which are laminated above a surface including a top of the projecting portion so as to be centered at the projecting portion; buried layers formed on both sides of the mesa structure, to block current; and a second-conductivity-type contact layer formed at surfaces of the mesa structure and the buried layers.
    Type: Application
    Filed: March 5, 2021
    Publication date: April 18, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kazuyuki ONOE, Tsutomu YAMAGUCHI, Yohei HOKAMA
  • Publication number: 20240128187
    Abstract: An isolation region separates a first circuit region and a second circuit region. A signal conveyance element is an element to convey a signal from the first circuit region to the second circuit region and includes at least one primary coil and two secondary coils. The at least one primary coil has opposite ends electrically connected to the first circuit region and is disposed in the isolation region. The two secondary coils each have opposite ends electrically connected to the second circuit region, are arranged to be magnetically coupled to the at least one primary coil, and are arranged in the isolation region.
    Type: Application
    Filed: July 17, 2023
    Publication date: April 18, 2024
    Applicant: Mitsubishi Electric Corporation
    Inventors: Manabu YOSHINO, Motoki IMANISHI, Yasuo YAMAGUCHI, Toshihiro IMASAKA, Yohei TORII
  • Patent number: 11945882
    Abstract: Crystals of the compound represented by formula (1), a method for the production thereof, and a method for producing an antibody-drug conjugate using the crystals.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: April 2, 2024
    Assignee: DAIICHI SANKYO COMPANY, LIMITED
    Inventors: Tatsuya Yamaguchi, Takashi Kouko, Shigeru Noguchi, Yohei Yamane, Fumikatsu Kondo, Takahiro Aoki, Tadahiro Takeda, Kohei Sakanishi, Hitoshi Sato, Tsuyoshi Ueda, Shinji Matuura, Kei Kurahashi, Yutaka Kitagawa, Tatsuya Nakamura
  • Publication number: 20240088161
    Abstract: The purpose of the present invention is to improve reliability of the TFT of the oxide semiconductor. The feature of the invention is: A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed under the first oxide semiconductor, a first gate electrode is formed under the first gate insulating film, an interlayer insulating film is formed on the first oxide semiconductor; a drain wiring, which connects with the first oxide semiconductor, and a source wiring, which connects with the first oxide semiconductor, are formed on the interlayer insulating film; the drain wiring or the source wiring is a laminated structure of a second oxide semiconductor and a first metal, the second oxide semiconductor is under the first metal.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 14, 2024
    Applicant: Japan Display Inc.
    Inventor: Yohei YAMAGUCHI
  • Patent number: 11921392
    Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.
    Type: Grant
    Filed: September 15, 2022
    Date of Patent: March 5, 2024
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Arichika Ishida, Hidekazu Miyake, Hiroto Miyake, Isao Suzumura
  • Publication number: 20240072010
    Abstract: A package includes: a first portion having defined therein a mounting region in which an electronic component is mounted; and a second portion connected to the first portion. An area of the second portion is larger than an area of the first portion in plain view viewed from the direction normal to a surface through which the first portion and the second portion are connected.
    Type: Application
    Filed: November 8, 2023
    Publication date: February 29, 2024
    Inventors: Yohei MORIYAMA, Atsushi YAMAGUCHI
  • Publication number: 20240030226
    Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.
    Type: Application
    Filed: October 4, 2023
    Publication date: January 25, 2024
    Inventors: Isao SUZUMURA, Kazufumi WATABE, Yoshinori ISHII, Hidekazu MIYAKE, Yohei YAMAGUCHI
  • Publication number: 20240006404
    Abstract: RC-network components that include a substrate and capacitor having a thin-film top electrode portion at a surface on one side of the substrate. The low ohmic semiconductor substrate is doped to contribute 5% or less to the resistance of the RC-network component. The resistance provided in series with the capacitor is controlled by providing a contact plate, spaced from the thin-film top electrode portion by an insulating layer, and a set of one or more bridging contacts passing through openings in the insulating layer. The bridging contacts electrically interconnect the thin-film top electrode portion and the contact plate. Different resistance values can be set by appropriate selection of the number of bridging contacts. The openings are elongated thereby reducing temperature concentration at their periphery. Correspondingly, the bridging contacts have an elongated cross-sectional shape.
    Type: Application
    Filed: September 15, 2022
    Publication date: January 4, 2024
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Yohei YAMAGUCHI, Yasuhiro MURASE, Stéphane BOUVIER
  • Patent number: 11855102
    Abstract: The purpose of the present invention is to improve reliability of the TFT of the oxide semiconductor. The feature of the invention is: A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed under the first oxide semiconductor, a first gate electrode is formed under the first gate insulating film, an interlayer insulating film is formed on the first oxide semiconductor; a drain wiring, which connects with the first oxide semiconductor, and a source wiring, which connects with the first oxide semiconductor, are formed on the interlayer insulating film; the drain wiring or the source wiring is a laminated structure of a second oxide semiconductor and a first metal, the second oxide semiconductor is under the first metal.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: December 26, 2023
    Assignee: Japan Display Inc.
    Inventor: Yohei Yamaguchi
  • Publication number: 20230392049
    Abstract: Provided is a readily adhesive polyester film that has antistatic properties-and prevents an antistatic agent from transferring to other items The readily adhesive polyester film includes a polyester film and a readily adhesive layer on at least one surface of the polyester film, wherein the readily adhesive layer is formed of a cured composition containing an ion-conducting antistatic agent, a polyester resin, and a polycarbonate urethane resin, a surface of the readily adhesive layer has a surface specific resistance value of 1.0×1013 ?/sq or lower, and after the surface of the readily adhesive layer is brought into contact with an additional polyester film and maintained at a temperature of 50° C. under a pressure of 1 kg/cm2 for 3 days, the surface of the additional polyester film that is in contact with the surface of the readily adhesive layer has a surface specific resistance value of 1.0×1014 ?/sq or higher.
    Type: Application
    Filed: September 22, 2021
    Publication date: December 7, 2023
    Applicant: TOYOBO CO., LTD.
    Inventors: Eiji KUMAGAI, Yohei YAMAGUCHI, Takeshi KUBO, Noriyuki TAKAGI, Tsuyoshi OHTA
  • Publication number: 20230387146
    Abstract: A display device including a substrate having thin film transistors (TFT) comprising: the TFT including an oxide semiconductor film, a gate electrode and an insulating film formed between the oxide semiconductor film and the gate electrode, wherein a first aluminum oxide film and a second aluminum oxide film, which is formed on the first aluminum oxide film, are formed between the insulating film and the gate electrode, an oxygen concentration in the first aluminum oxide film is bigger than an oxygen concentration in the second aluminum oxide film.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 30, 2023
    Inventors: Hajime WATAKABE, Isao SUZUMURA, Akihiro HANADA, Yohei YAMAGUCHI
  • Publication number: 20230387319
    Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Yohei YAMAGUCHI, Yuichiro HANYU, Hiroki HIDAKA
  • Patent number: 11819901
    Abstract: A tool for a press brake includes a tool main body, an attachment portion formed on a base end side of the tool main body and configured to be detachably attached to a tool installation portion of the press brake by using a tool changer, and a bending portion formed on a distal end side of the tool main body and used to bend a plate-shaped workpiece. An engagement hole having a circular cross-sectional shape to be engaged with a bar-shaped finger of the tool changer extends through the tool main body in a thickness direction. An anti-rotation bottomed depressed portion configured to receive a distal end of an anti-rotation member of the tool changer is formed in a vicinity of the engagement hole.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: November 21, 2023
    Assignee: AMADA CO., LTD.
    Inventors: Masaaki Sato, Shiro Hayashi, Shingo Kamada, Hideto Yamada, Yohei Yamaguchi
  • Publication number: 20230361220
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Application
    Filed: July 5, 2023
    Publication date: November 9, 2023
    Inventors: Yohei YAMAGUCHI, Kazufumi WATABE, Tomoyuki ARIYOSHI, Osamu KARIKOME, Ryohei TAKAYA