Patents by Inventor Yoichi Momose
Yoichi Momose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11417275Abstract: A circuit device includes a scan line drive circuit that drives a plurality of scan lines of an electro-optical element. A field for constituting one image includes a plurality of subfields. The scan line drive circuit selects once a scan line group to be selected among the plurality of scan lines, in a subfield included in the plurality of subfields. The scan line group includes a scan line connected to a pixel circuit to which an i-th bit is written in a subfield, and a scan line connected to a pixel circuit to which a j-th bit is written in a subfield.Type: GrantFiled: June 28, 2021Date of Patent: August 16, 2022Assignee: SEIKO EPSON CORPORATIONInventors: Yoichi Momose, Mitsutoshi Miyasaka
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Publication number: 20220199003Abstract: The electro-optical device includes a plurality of digital scanning lines, a plurality of analog scanning lines, a digital signal line, an analog signal line, and a plurality of pixel circuits. Each of the pixel circuits includes a light emitting element, a digital driving circuit, and an analog driving circuit. The digital driving circuit performs digital driving in which a drive current is supplied to the light emitting element in a period of a length corresponding to a grayscale value. The analog driving circuit performs analog current setting in which a current value of the drive current is set based on an analog data voltage. In a period in which the pixel circuit connected to an s-th digital scanning line and an s-th analog scanning line performs the analog current setting, the pixel circuit connected to a t-th digital scanning line and a t-th analog scanning line performs the digital driving.Type: ApplicationFiled: December 20, 2021Publication date: June 23, 2022Applicant: SEIKO EPSON CORPORATIONInventors: Yoichi MOMOSE, Mitsutoshi MIYASAKA
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Publication number: 20220199021Abstract: An electro-optical device includes a plurality of digital scanning lines, a digital signal line, and a plurality of pixel circuits. Each of the pixel circuits includes a light emitting element and a digital driving circuit. The digital driving circuit performs digital driving to turn the light emitting element ON-state or OFF-state based on a grayscale value. The digital driving circuit keeps the light emitting element ON-state by supplying a drive current to the light emitting element, in a period in which an enable signal is active, of a grayscale display period having a length corresponding to the grayscale value. The control line driving circuit sets a period in which the enable signal is active. A ratio, with respect to the grayscale display period, of an ON-state period in which the light emitting element is ON-state changes in accordance with the period in which the enable signal is active.Type: ApplicationFiled: December 22, 2021Publication date: June 23, 2022Applicant: SEIKO EPSON CORPORATIONInventors: Yoichi MOMOSE, Mitsutoshi MIYASAKA
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Patent number: 11367162Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.Type: GrantFiled: January 28, 2021Date of Patent: June 21, 2022Assignee: SEIKO EPSON CORPORATIONInventors: Mitsutoshi Miyasaka, Yoichi Momose, Kiyoshi Sekijima
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Publication number: 20220035209Abstract: An electro-optical device including a first substrate and a transistor is provided. The first substrate includes a first scanning line having a light shielding property and extending in a first direction between a substrate body and a pixel electrode. The transistor includes a semiconductor film extending in the first direction to overlap with the first scanning line in a layer between the first scanning line and the pixel electrode. In a layer between a gate electrode and a pixel electrode, a second scanning line having a light shielding property extends in the first direction to overlap with the first scanning line in plan view. The second scanning line extends through a position spaced apart from a third contact portion that electrically couples the pixel electrode and the semiconductor film, and is electrically coupled to the gate electrode and the first scanning line.Type: ApplicationFiled: July 28, 2021Publication date: February 3, 2022Applicant: SEIKO EPSON CORPORATIONInventors: Yohei SUGIMOTO, Yoichi MOMOSE
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Publication number: 20220011613Abstract: An electro-optical device may include a first substrate, a second substrate, a seal member extending in a first direction and disposed between the first and second substrates in a seal region defined around a pixel area, a first conductive layer disposed between the first substrate and the seal member and extending in a second direction intersecting with the first direction, a second conductive layer disposed between the first substrate and the first conductive layer and extending in the second direction, a third layer disposed in the pixel area and formed of the first conductive layer, and a fourth layer disposed in the pixel area and formed of the second conductive layer. In plan view, the first conductive layer overlaps the second conductive layer in the seal region. In a cross-sectional view the first direction, the second conductive layer is larger in an outer shape than the first conductive layer.Type: ApplicationFiled: September 24, 2021Publication date: January 13, 2022Applicant: SEIKO EPSON CORPORATIONInventors: Yusuke Kinoe, Yoichi Momose
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Publication number: 20210407413Abstract: A circuit device includes a scan line drive circuit that drives a plurality of scan lines of an electro-optical element. A field for constituting one image includes a plurality of subfields. The scan line drive circuit selects once a scan line group to be selected among the plurality of scan lines, in a subfield included in the plurality of subfields. The scan line group includes a scan line connected to a pixel circuit to which an i-th bit is written in a subfield, and a scan line connected to a pixel circuit to which a j-th bit is written in a subfield.Type: ApplicationFiled: June 28, 2021Publication date: December 30, 2021Applicant: SEIKO EPSON CORPORATIONInventors: Yoichi MOMOSE, Mitsutoshi MIYASAKA
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Publication number: 20210407382Abstract: A circuit device includes a scan line drive circuit that drives a plurality of scan lines of an electro-optical element, and an enable line drive circuit that outputs an enable signal to a plurality of pixel circuits. A field for constituting one image includes a plurality of subfields. The enable line drive circuit outputs an enable signal that is active in a partial period of a first display period corresponding to a first bit, which is a lower bit of display data. When the enable signal is active in a partial period of the first display period, a pixel is ON-state or OFF-state.Type: ApplicationFiled: June 28, 2021Publication date: December 30, 2021Applicant: SEIKO EPSON CORPORATIONInventors: Yoichi MOMOSE, Mitsutoshi MIYASAKA
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Patent number: 11211009Abstract: An electro-optical device includes a scan line, a data line, a pixel circuit provided at an intersection of the scan line and the data line, a first high potential line, a first low potential line, a second high potential line, and a second low potential line. The pixel circuit includes a light emitting device, a memory circuit disposed between the first high potential line and the first low potential line, a first transistor of N-type including a gate electrically connected to the memory circuit, and a second transistor disposed between the memory circuit and the data line. The light emitting device and the first transistor are disposed in series between the second high potential line and the second low potential line.Type: GrantFiled: July 13, 2020Date of Patent: December 28, 2021Assignee: SEIKO EPSON CORPORATIONInventors: Mitsutoshi Miyasaka, Yoichi Momose
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Patent number: 11156878Abstract: An electro-optical device may include a first substrate, a second substrate, a seal member extending in a first direction and disposed between the first and second substrates in a seal region defined around a pixel area, a first conductive layer disposed between the first substrate and the seal member and extending in a second direction intersecting with the first direction, a second conductive layer disposed between the first substrate and the first conductive layer and extending in the second direction, a third layer disposed in the pixel area and formed of the first conductive layer, and a fourth layer disposed in the pixel area and formed of the second conductive layer. In plan view, the first conductive layer overlaps the second conductive layer in the seal region. In a cross-sectional view the first direction, the second conductive layer is larger in an outer shape than the first conductive layer.Type: GrantFiled: April 10, 2020Date of Patent: October 26, 2021Assignee: SEIKO EPSON CORPORATIONInventors: Yusuke Kinoe, Yoichi Momose
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Patent number: 11151942Abstract: An electro-optical device includes scan line, data line, pixel circuit located at a position corresponding to an intersection of the scan line and the data line, a first high potential line supplies a first potential, a low potential line supplies a second potential, and a second high potential line supplies a third potential. The pixel circuit includes a light emitting element, a memory circuit disposed between the first high potential line and the low potential line, a first transistor including a gate electrically connected to the memory circuit, and a second transistor including a gate electrically connected to the scan line. The second transistor is disposed between the memory circuit and f the data line. A potential difference between the first potential and the second potential is smaller than a potential difference between the third potential and the second potential.Type: GrantFiled: July 7, 2020Date of Patent: October 19, 2021Assignee: SEIKO EPSON CORPORATIONInventors: Mitsutoshi Miyasaka, Yoichi Momose
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Patent number: 11042055Abstract: In a liquid crystal display device, a reflecting surface is attached to a portion, which overlaps with a periphery portion of a light guiding plate where the light incident section is position in a surface on the light guiding plate side in the dispersing sheet which is positioned farthest to the light guiding plate side among a plurality of optical sheets which are positioned between the light guiding plate and a liquid crystal panel. As a result, light which is emitted from the periphery portion of the light guiding plate is returned into the light guiding plate by being reflected by the reflecting surface, and after this, is emitted as illumination light from a light emitting surface while progressing within the light guiding plate.Type: GrantFiled: May 26, 2017Date of Patent: June 22, 2021Assignee: 138 East LCD Advancements LimitedInventors: Yoichi Momose, Nobutaka Urano
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Publication number: 20210150664Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.Type: ApplicationFiled: January 28, 2021Publication date: May 20, 2021Applicant: SEIKO EPSON CORPORATIONInventors: Mitsutoshi MIYASAKA, Yoichi MOMOSE, Kiyoshi SEKIJIMA
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Patent number: 10991319Abstract: Provided are a scan line, a data line, a pixel circuit provided corresponding to an intersection between the scan line and the data line, and an enable line. The pixel circuit includes a memory circuit, a light-emitting element, and an enable line driving circuit, the light-emitting element changes luminance in accordance with an image signal retained in the memory circuit, the enable line driving circuit controls a light emission enabled state of the light-emitting element, the pixel circuit includes a first pixel circuit, a second pixel circuit, a third pixel circuit, and a fourth pixel circuit, the enable line includes a first enable line and a second enable line, the first pixel circuit and the second pixel circuit are electrically connected with the first enable line, and the third pixel circuit and the fourth pixel circuit are electrically connected with the second enable line.Type: GrantFiled: October 8, 2019Date of Patent: April 27, 2021Assignee: SEIKO EPSON CORPORATIONInventors: Mitsutoshi Miyasaka, Yoichi Momose, Kiyoshi Sekijima
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Publication number: 20210109385Abstract: A method of manufacturing a liquid crystal device having a first substrate and a second substrate facing each other with a liquid crystal layer interposed therebetween, and a sealing member formed in a peripheral portion of at least one of the substrates. The method includes forming the sealing member, disposing the liquid crystal layer inside the sealing member, and bonding the first substrate to the second substrate. In forming the sealing member, a ring-shaped portion that seals the liquid crystal layer inside the sealing member, a first sealing layer and a second sealing layer that face each other to be separated from each other are formed. In the bonding of the first substrate to the second substrate, a junction portion is formed in which the first and second sealing layers are pressed and joined outside the sealing member so as to form the ring-shaped portion.Type: ApplicationFiled: August 24, 2020Publication date: April 15, 2021Inventors: Yoichi MOMOSE, Satoshi HASEGAWA
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Patent number: 10943326Abstract: An electro-optical device includes a pixel circuit 41G, a pixel circuit 41B, a high potential line 47G configured to supply a high potential VDDG to the pixel circuit 41G, a high potential line 47B configured to supply a high potential VDDB to the pixel circuit 41B, and a low potential line 46 configured to supply a first low potential VSS1 to the pixel circuit 41G and the pixel circuit 41B. The pixel circuit 41G includes a light-emitting element 20G configured to display G, the pixel circuit 41B includes a light-emitting element 20B configured to display B, and the high potential VDDG and the high potential VDDB are mutually independent.Type: GrantFiled: February 19, 2019Date of Patent: March 9, 2021Assignee: SEIKO EPSON CORPORATIONInventors: Mitsutoshi Miyasaka, Yoichi Momose, Kiyoshi Sekijima
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Patent number: 10891891Abstract: An electro-optical device includes a scan line, a data line, a pixel circuit, and an enable line. The pixel circuit includes a memory circuit, a light emitting element, and a first transistor. The light emitting element changes brightness in response to an image signal held in the memory circuit. The first transistor controls light emission and non-light-emission of the light emitting element. A field for displaying a single image each includes a sub-field (SF1) and a sub-field (SF2). The sub-field (SF1) and the sub-field (SF2) include a non-display period during which the light emitting element does not emit light and a display period during which the light emitting element is allowed to emit light. A length of the display period in the sub-field (SF1) is different from a length of the display period in the sub-field (SF2).Type: GrantFiled: January 29, 2019Date of Patent: January 12, 2021Assignee: SEIKO EPSON CORPORATIONInventors: Mitsutoshi Miyasaka, Yoichi Momose, Kiyoshi Sekijima
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Patent number: 10861390Abstract: An electro-optical device includes a first scan line, a second scan line, a data line, a pixel circuit located at a position corresponding to an intersection of the data line and each of the first scan line and the second scan line, and a scan line drive circuit supplying one of a selection signal and a non-selection signal to the first scan line and supplying one of a maintain signal and a non-maintain signal to the second scan line. The scan line drive circuit is capable of output the selection signal and the non-maintain signal during an identical period.Type: GrantFiled: February 15, 2019Date of Patent: December 8, 2020Assignee: SEIKO EPSON CORPORATIONInventors: Mitsutoshi Miyasaka, Yoichi Momose, Kiyoshi Sekijima
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Publication number: 20200357339Abstract: An electro-optical device includes a scan line, a data line, a pixel circuit provided at an intersection of the scan line and the data line, a first high potential line, a first low potential line, a second high potential line, and a second low potential line. The pixel circuit includes a light emitting device, a memory circuit disposed between the first high potential line and the first low potential line, a first transistor of N-type including a gate electrically connected to the memory circuit, and a second transistor disposed between the memory circuit and the data line. The light emitting device and the first transistor are disposed in series between the second high potential line and the second low potential line.Type: ApplicationFiled: July 13, 2020Publication date: November 12, 2020Applicant: SEIKO EPSON CORPORATIONInventors: Mitsutoshi MIYASAKA, Yoichi MOMOSE
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Publication number: 20200335041Abstract: An electro-optical device includes scan line, data line, pixel circuit located at a position corresponding to an intersection of the scan line and the data line, a first high potential line supplies a first potential, a low potential line supplies a second potential, and a second high potential line supplies a third potential. The pixel circuit includes a light emitting element, a memory circuit disposed between the first high potential line and the low potential line, a first transistor including a gate electrically connected to the memory circuit, and a second transistor including a gate electrically connected to the scan line. The second transistor is disposed between the memory circuit and f the data line. A potential difference between the first potential and the second potential is smaller than a potential difference between the third potential and the second potential.Type: ApplicationFiled: July 7, 2020Publication date: October 22, 2020Applicant: SEIKO EPSON CORPORATIONInventors: Mitsutoshi MIYASAKA, Yoichi MOMOSE