Abstract: An array antenna includes an antenna substrate including a first ceramic member, an insertion member and a second ceramic member sequentially stacked, antenna pattern portions arranged on the antenna substrate in an array form, and shielding vias disposed inside the antenna substrate and extending in a thickness direction of the antenna substrate. The shielding vias are disposed in thickness areas of the antenna substrate corresponding to the antenna pattern portions.

Abstract: A heating cover for a LiDAR sensor includes a plastic cover layer and a heating film attached to a back surface of the plastic cover layer. In the heating film, an indium tin oxide (ITO) thin film layer is formed on a polyethylene terephthalate (PET) film. Respective line electrodes are arranged along both long sides on the ITO thin film layer.

Abstract: A chip antenna includes a first ceramic substrate, a second ceramic substrate disposed to face the first ceramic substrate, a first patch disposed on the first ceramic substrate to operate as a feed patch, and a second patch disposed on the second ceramic substrate to operate as a radiation patch. One or both of the first ceramic substrate and the second ceramic substrate include a groove, and one or both of the first patch and the second patch is disposed in the groove of the respective first ceramic substrate and second ceramic substrate and protrudes from the groove.

Abstract: A chip antenna module array includes a first chip antenna module including: a first solder layer disposed below a first dielectric layer; a first feed via disposed in the first dielectric layer; a first patch antenna pattern disposed above the first dielectric layer and having a first resonant frequency; and a first coupling pattern spaced apart from the first patch antenna pattern, and not vertically overlapping the first patch antenna pattern. The chip antenna module array includes a second chip antenna module including: a second solder layer disposed below a second dielectric layer; a second feed via disposed in the second dielectric layer; a second patch antenna pattern disposed above the second dielectric layer and having a second resonant frequency; and a second coupling pattern disposed above and vertically overlapping the second patch antenna pattern. The first and second chip antenna modules are disposed spaced apart on a connection member.

Abstract: A display device may includes: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area of the substrate, each of the pixels including a light-emitting element provided with a pixel electrode; scan lines and data lines coupled to the pixels; a power line configured to supply driving power to the light-emitting elements, and extending in one direction; and an initialization power line configured to supply initialization power to the light-emitting elements. The power line and the initialization power line may be provided on different layers. The initialization power line may include: first conductive lines extending in a direction oblique to the scan lines and the data lines; and conductive lines intersecting the first conductive lines. The first and second conductive lines may be disposed in areas between the pixel electrodes of adjacent light-emitting elements.

Abstract: An antenna module includes a substrate having a first surface including a ground region and a feeder region; chip antennas mounted on the first surface of the substrate; and at least one patch antenna disposed inside of the substrate or at least partially disposed on a second surface of the substrate. The chip antennas include a body portion, a ground portion bonded to a first surface of the body portion, and a radiation portion bonded to a second surface of a body portion. The ground portion of each chip antenna is mounted on the ground region and the radiation portion of each chip antenna is mounted on the feeder region.

Abstract: A display device includes a substrate including a display area and a peripheral area; a first voltage line disposed on the display area of the substrate, a first voltage being applied to the first voltage line; a second voltage line disposed on the display area of the substrate and extending in a direction parallel to the first voltage line, a second voltage being applied to the second voltage line; a first voltage transmission line disposed on the peripheral area of the substrate and transmitting the first voltage; a second voltage transmission line disposed on the peripheral area of the substrate and transmitting the second voltage; a first bridge electrode electrically connecting the first voltage line and the first voltage transmission line; and a second bridge electrode electrically connecting the second voltage line and the second voltage transmission line.

Abstract: A chip antenna includes a first substrate, a second substrate overlapping the first substrate, a first patch, provided on a first surface of the first substrate, operating as a feed patch, a second patch, provided on the second substrate, operating as a radiation patch, at least one feed via penetrating through the first substrate in a thickness direction and configured to provide a feed signal to the first patch, and a ground pad provided on the other surface of the first substrate. The first substrate comprises a ceramic sintered material. The ceramic sintered material comprises an Mg2SiO4 phase, an MgAl2O4 phase, and a CaTiO3 phase, and a content of the CaTiO3 phase in the ceramic sintered material ranges from 5.1 mol % to 15.1 mol %.

Abstract: A display device includes a display panel that has a display area displaying an image and a non-display area around the display area. The display panel includes: a substrate; a plurality of connection lines on the substrate in the non-display area and including a first connection line and a second connection line adjacent to each other; a first dummy line overlapping and disposed on the first connection line; and a second dummy line overlapping the second connection line and disposed between the substrate and the second connection line.

Abstract: A display panel includes a first panel region (FPR) including (n?1)-th and n-th pixel rows ((n?1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n?1)-th scan line ((n?1)SL) connected to the (n?1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n?1)SL and the nRL.

Abstract: Disclosed is a LiDAR window integrated optical filter that includes a window of a polymer material for absorbing a visible light band and transmitting a near-infrared band; and an upper reflective layer and a lower reflective layer formed on the upper surface and the lower surface of the window. The upper reflective layer and the lower reflective layer may be formed in a thin film including titanium dioxide (TiO2) and silicon dioxide (SiO2).

Abstract: A display device may including: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area of the substrate, each of the pixels including a light-emitting element provided with a pixel electrode; scan lines and data lines coupled to the pixels; a power line configured to supply driving power to the light-emitting elements, and extending in one direction; and an initialization power line configured to supply initialization power to the light-emitting elements. The power line and the initialization power line may be provided on different layers. The initialization power line may include: first conductive lines extending in a direction oblique to the scan lines and the data lines; and conductive lines intersecting the first conductive lines. The first and second conductive lines may be disposed in areas between the pixel electrodes of adjacent light-emitting elements.

Abstract: Provided is an aircraft docking guidance system using a three-dimensional (3D) laser scanner, including a laser scanner configured to acquire data related to aircraft docking guidance and docking control; a database configured to store information related to specifications and characteristics of each aircraft type that is a target of the aircraft docking guidance and docking control using the laser scanner; a communicator configured to transmit and receive information between the laser scanner and the database; and a data analysis decision algorithm processing unit configured to determine information of an object by comparing image information acquired through the laser scanner and information stored in the database.

Abstract: A display device includes: a display panel in which a non-display region and a display region surrounding the non-display region are defined, wherein the display panel includes: a base layer comprising a first region in which a hole is defined corresponding to the non-display region, a second region surrounding the first region, and a third region corresponding to the display region; and first signal line parts disposed on the second region and the third region, the first signal line parts arrayed spaced apart from each other in a first direction, and each of the first signal line parts includes: a first line; a second line spaced apart from the first line; and a first connection part configured to connect the first line and the second line.

Abstract: A display panel includes a first panel region (FPR) including (n?1)-th and n-th pixel rows ((n?1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n?1)-th scan line ((n?1)SL) connected to the (n?1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n?1)SL and the nRL.

Abstract: An electronic apparatus includes a display panel including a base substrate including an active area and a peripheral area adjacent to the active area, pixels on the active area, pads on the peripheral area and arranged in a first direction, signal lines connecting the pixels to the pads, and a vernier mark on the peripheral area and spaced apart from the pads and the signal lines, a circuit board on the display panel and including a base film, and leads on the base film and overlapping with the pads in a plan view, and a conductive adhesive member extending in the first direction and between the display panel and the circuit board to connect the pads to the leads. The conductive adhesive member overlaps with the vernier mark when viewed in a second direction intersecting the first direction.

Abstract: A chip antenna module includes: a solder layer disposed on a lower surface of the first dielectric layer; a first patch antenna pattern disposed on upper surface of the first dielectric layer and having a through-hole; a second patch antenna pattern spaced apart from an upper surface of the first patch antenna pattern and having an area less than an area of the first patch antenna pattern; a first feed via extending through the first dielectric layer and electrically connected to the first patch antenna pattern; a second feed via extending through the first dielectric layer and the through-hole, and electrically connected to the second patch antenna pattern; and shielding vias extending through the first dielectric layer, electrically connected to the first patch antenna pattern, and at least partially surrounding the second feed via.

Abstract: A display device includes a substrate including sub-pixel circuit areas that are arranged in m rows and n columns, where m and n are positive integers, first gate lines extending in a row direction, data lines extending in a column direction, initialization power lines extending in the row direction, including first power lines disposed in sub-pixel circuit areas of odd rows and receiving a first initialization voltage and second power lines disposed in sub-pixel circuit areas of even rows and receiving a second initialization voltage, and transmission lines extending in the column direction, including first transmission lines disposed in sub-pixel circuit areas of odd columns and receiving the first initialization voltage from the first power lines and second transmission lines disposed in sub-pixel circuit areas of even columns and receiving the second initialization voltage from the second power lines.

Abstract: A display device may include a plurality of pixel circuits disposed adjacent to each other, the plurality of pixel circuits including a plurality of active patterns disposed to correspond to the pixel circuits, respectively. Each of the active patterns includes a first initialization channel region to which an initialization voltage is applied, a second initialization channel region to which the initialization voltage is applied, and a third initialization channel region to which the initialization voltage is applied, the second initialization channel region of each of the active patterns is connected to the first initialization channel region of the adjacent active patterns, and a first end region of the third initialization channel region is connected between the first initialization channel region and the second initialization channel region.

Abstract: A backlight unit for blind spot warning lighting includes a printed circuit board (PCB) mounted with a light-emitting diode (LED), a bottom case having the PCB embedded on a lower portion thereof, and having an opened front surface, and a top case comprising a front plate covering a the front surface of the bottom case, and a guide protrusion formed to protrude backward from a rear surface of the front plate to guide the light from the LED to the front plate, and an object of the present disclosure is to provide a backlight unit, which can uniformly emit light while unifying the number of reflection and diffusion layers, and be advantageous for applying a hot wire, thereby improving visibility.