Abstract: A cyclone separating apparatus for a vacuum cleaner includes a first cyclone with an air entrance disposed on a lower portion of the first cyclone and an air exit disposed at an upper portion of the first cyclone; a first contaminants chamber substantially enclosing the first cyclone to collect contaminants discharged from the first cyclone; a plurality of second cyclones above the first cyclone, the plurality of second cyclones being substantially perpendicular to a center axis of the first cyclone; and a second contaminants chamber disposed outside the first contaminants chamber to collect contaminants discharged from the plurality of second cyclones.

Abstract: A dust-collecting apparatus of a vacuum cleaner includes a first dust-collecting unit, a second dust-collecting unit, and a dust receptacle. The second dust-collecting unit is adapted to be mounted to one side of the first dust-collecting unit. The dust receptacle is adapted to be mounted on a lower part of both the first and the second dust-collecting units, and the dust receptacle is adapted to store dust separated by the first and the second dust-collecting units. The first and second dust-collecting units are arranged so that air discharged from the first dust-collecting unit enters the second dust-collecting unit.

Abstract: The present invention relates to a novel quinazoline derivative and a pharmaceutically acceptable salt thereof for inhibiting the growth of cancer cells, a method for the preparation thereof and a pharmaceutical composition comprising same as an active ingredient.

Abstract: A cyclone dust-separating apparatus is disclosed. The dust-separating apparatus includes a cyclone unit having an air inlet and an air outlet so as to remove dust or dirt from air, and a dust bin joined to a bottom end of the cyclone unit so as to store the dust or dirt separated by the cyclone unit. The cyclone unit is installed in such a manner that a longitudinal axis thereof is substantially horizontally arranged. The dust bin is installed in such a manner that a longitudinal axis thereof is substantially perpendicular to the longitudinal axis of the cyclone unit. The dust bin has an air outflow passage connected with the air outlet, so that air discharged from the cyclone unit passes through the dust bin and then discharges in a bottom end direction of the dust bin.

Abstract: A method for forming a semiconductor device having recess channel includes forming a hard mask film pattern for exposing first regions for forming the trenches on a semiconductor substrate; forming first trenches by a first etching process using the hard mask film pattern as a mask, and removing the hard mask film pattern; forming a barrier film on the semiconductor substrate including the first trenches; forming an ion implantation mask film for exposing the first trenches on the barrier film; forming an ion implantation region in the semiconductor substrate below the first trenches using the ion implantation mask film and the barrier film; forming bulb-shaped second trenches by a second etching process using the ion implantation mask film and the barrier film as a mask, so that bulb-type trenches for recess channels, each including the first trench and the second trench, are formed; and removing the ion implantation mask film and the barrier film.

Abstract: A method for transmitting a message from a mobile terminal in a mobile communication system The method includes displaying a list of messages attempted to be transmitted, selecting a message from the list of transmitted messages that was unsuccessfully transmitted, and displaying detailed information about the selected message that was unsuccessfully transmitted.

Abstract: Disclosed herein is a system for transmitting vehicle state information. The system includes a Smartcard Control Unit (SCU) configured to store the vehicle state information, and to have a Universal Serial Bus (USB) port; a personal terminal for receiving and reading the vehicle state information from the SCU through a smartcard; a web server for storing the vehicle state information; and a repair shop terminal having a USB port configured to be connected to the USB port installed in the SCU through a USB cable and to receive the vehicle state information.

Abstract: The present invention discloses a magnetoresistive random access memory (MRAM) and a manufacturing method thereof. The whole cells are connected to each other by using a substrate as a ground terminal and a vertical structure field effect transistor (FET) for connecting the cells to the bit line. Thus, the MRAM is easily manufactured without requiring a special process for isolation of each cell. The MRAM uses the vertical structure FET to simplify the whole manufacturing process. An MTJ cell mask process which is essential in a general horizontal structure FET is omitted, to improve a speed of the MRAM and attain high integration of the MRAM.

Abstract: The present invention discloses an MRAM wherein a write word line is disposed between every other set of the word lines and a ground line is disposed between every other bit lines. This structure of MRAM in accordance with the present invention, Which is similar to folded bit line DRAM having a unit cell area of 8F2, allows read and write operation of MRAM with reduced number of required lines.

Abstract: A method for transmitting a message from a mobile terminal includes determining whether a specific event that occurs during the transmission may be disregarded. The specific event may be an event such as a closing/opening of a folder, a flip, or a sliding cover of the mobile terminal or a receipt of a call from another party. Normally, the specific event causes the mobile terminal to terminate the transmission of the message. However, the user may specify that the specific event may be disregarded, and the transmission may continue without disruption. As an example, an event disregard mode may be set via a menu for one or more specific events to indicate that the specific events may be disregarded. Thus, user's convenience is enhanced and a fast communication service is provided to users.

Abstract: The present invention generally relates to a NAND-type magnetoresistive RAM, and more specifically, to a NAND-type magnetoresistive RAM comprising a plurality of transistors connected in series as a NAND-type which can reduce the effective area per cell. Two or more NAND-type transistors sharing an adjacent source region and an adjacent drain region are connected in series, thereby reducing inactive regions. A read node connected to a bitline is shared by a plurality of transistors, thereby improving a read operation. As a result, the effective area per cell can be decreased, and the integration of a device can be improved.

Abstract: A magnetic random access memory (MRAM) having a vertical structure transistor has the characteristics of faster access time than SRAM, high density as with DRAM, and non-volatility like a flash memory device. The MRAM has a vertical structure transistor, a first word line including the transistor, a contact line connected to the transistor, a magnetic tunnel junction (MTJ) cell deposited on the contact line, a bit line deposited on the MTJ cell, and a second word line deposited on the bit line at the position of MTJ cell. With the disclosed structure, it is possible to improve the integration density of a semiconductor device, to increase the short channel effect, and to improve the control rate of the resistance, while using a simplified manufacturing process.

Abstract: The present invention discloses a magnetoresistive random access memory (MRAM) and a manufacturing method thereof. The whole cells are connected to each other by using a substrate as a ground terminal and a vertical structure field effect transistor (FET) for connecting the cells to the bit line. Thus, the MRAM is easily manufactured without requiring a special process for isolation of each cell. The MRAM uses the vertical structure FET to simplify the whole manufacturing process. An MTJ cell mask process which is essential in a general horizontal structure FET is omitted, to improve a speed of the MRAM and attain high integration of the MRAM.

Abstract: The present invention generally relates to a NAND-type magnetoresistive RAM, and more specifically, to a NAND-type magnetoresistive RAM comprising a plurality of transistors connected in series as a NAND-type which can reduce the effective area per cell. Two or more NAND-type transistors sharing an adjacent source region and an adjacent drain region are connected in series, thereby reducing inactive regions. A read node connected to a bitline is shared by a plurality of transistors, thereby improving a read operation. As a result, the effective area per cell can be decreased, and the integration of a device can be improved.

Abstract: A magnetic random access memory (MRAM) having a vertical structure transistor has the characteristics of faster access time than SRAM, high density as with DRAM, and non-volatility like a flash memory device. The MRAM has a vertical structure transistor, a first word line including the transistor, a contact line connected to the transistor, a magnetic tunnel junction (MTJ) cell deposited on the contact line, a bit line deposited on the MTJ cell, and a second word line deposited on the bit line at the position of MTJ cell. With the disclosed structure, it is possible to improve the integration density of a semiconductor device, to increase the short channel effect, and to improve the control rate of the resistance, while using a simplified manufacturing process.

Abstract: A magnetic random access memory (MRAM) having a vertical structure transistor has the characteristics of faster access time than SRAM, high density as with DRAM, and non-volatility like a flash memory device. The MRAM has a vertical structure transistor, a first word line including the transistor, a contact line connected to the transistor, a magnetic tunnel junction (MTJ) cell deposited on the contact line, a bit line deposited on the MTJ cell, and a second word line deposited on the bit line at the position of MTJ cell. With the disclosed structure, it is possible to improve the integration density of a semiconductor device, to increase the short channel effect, and to improve the control rate of the resistance, while using a simplified manufacturing process.

Abstract: A semiconductor memory device having a sense amplifier control circuit is disclosed. At least two sensing power drivers among the plurality of sensing power drivers for driving sensing power in a selected sense amplifier array block are commonly connected to common sensing power lines by a plurality of switching units controlled according to sensing power supply control signals generated by using block select address signals, thereby improving a driving capacity of the sensing power drivers and a sensing speed.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In an open bit line cell aligned local interconnection type device having a minimum line width of 1F and a pattern interval of 1F, hard masks are formed on respective conductive layers, and insulating spacers are formed at the side walls thereof, thereby preventing the adjacent conductive layers from being shorted out and maintaining the minimum pattern interval. As a result, a high, integration of the device is achieved, and the process yield and reliability of the device are improved.

Abstract: The present invention discloses a method for fabricating a semiconductor device. In an open bit line cell aligned local interconnection type device having a minimum line width of 1F and a pattern interval of 1F, hard masks are formed on respective conductive layers, and insulating spacers are formed at the side walls thereof, thereby preventing the adjacent conductive layers from being shorted out and maintaining the minimum pattern interval. As a result, a high integration of the device is achieved, and the process yield and reliability of the device are improved.

Abstract: A magnetic random access memory (MRAM) having a vertical structure transistor has the characteristics of faster access time than SRAM, high density as with DRAM, and non-volatility like a flash memory device. The MRAM includes a vertical structure transistor, a first word line including the transistor, a contact line connected to the transistor, a magnetic tunnel junction (MTJ) cell deposited on the contact line, a bit line deposited on the MTJ cell, and a second word line deposited on the bit line at the position of MTJ cell. With the disclosed structure, it is possible to improve the integration density of a semiconductor device, to increase the short channel effect, and to improve the control rate of the resistance, while using a simplified manufacturing process.