Abstract: A semiconductor memory device having a sense amplifier control circuit is disclosed. At least two sensing power drivers among the plurality of sensing power drivers for driving sensing power in a selected sense amplifier array block are commonly connected to common sensing power lines by a plurality of switching units controlled according to sensing power supply control signals generated by using block select address signals, thereby improving a driving capacity of the sensing power drivers and a sensing speed.

Abstract: The present invention relates to a sub word line driving circuit for a semiconductor memory device, and said circuit comprises a first word line driving and clearing means for driving and clearing a first word line by applying according to a first word line driving signal a word line boosting voltage or a ground voltage into the first word line; a first word line potential emitting means for rapidly emitting according to a word line boosting bar voltage an electric potential of the first word line into the ground voltage; a second word line driving and clearing means for driving and clearing a second word line by applying according to a second word line driving signal a word line boosting voltage or a ground voltage into the second word line; a second word line potential emitting means for rapidly emitting according to the word line boosting bar voltage an electric potential of the second word line into the ground voltage; and an equalizing means for equalizing according to the word line boosting bar voltage