Patents by Inventor Yong CHA

Yong CHA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9199895
    Abstract: Disclosed is a method for producing 1,3-butadiene through oxidative dehydrogenation of normal-butene using a parallel reactor in which catalysts are charged into fixed bed reactors and are not physically mixed. More specifically, disclosed is a method for efficiently producing 1,3-butadiene through oxidative dehydrogenation of normal-butene using the parallel reactor containing multi-component bismuth molybdate-based catalysts exhibiting different activities to oxidative dehydrogenation for normal-butene isomers (1-butene, trans-2-butene and cis-2-butene), and butene separated from a C4 mixture containing normal-butene and normal-butane, as a reactant.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: December 1, 2015
    Assignee: LG CHEM, LTD.
    Inventors: Kyong-Yong Cha, Dong-Hyun Ko, Dae-Chul Kim, Hyun-Seok Nam, Dae-Heung Choi
  • Publication number: 20150263016
    Abstract: A semiconductor device includes a common source region formed in a semiconductor substrate, a bit line formed over the semiconductor substrate, first and second vertical channel layers coupled between the bit line and the common source region, wherein the first and second vertical channel layers are alternately arranged on the semiconductor substrate, first conductive layers stacked over the semiconductor substrate to surround one side of the first vertical channel layer, second conductive layers stacked over the semiconductor substrate to surround one side of the second vertical channel layer, and a charge storage layer formed between the first vertical channel layer and the first conductive layers and between the second vertical channel layer and the second conductive layers.
    Type: Application
    Filed: August 6, 2014
    Publication date: September 17, 2015
    Inventor: Jae Yong CHA
  • Publication number: 20150151292
    Abstract: Disclosed are a mesoporous composite oxide catalyst, a method for preparing the same and a method for synthesizing 1,3-butadidne using the same. The surface area is increased by introducing certain porous silica into preparation of a catalyst for synthesizing 1,3-butadiene, thereby improving a conversion ratio of normal-butene, and selectivity and yield of 1,3-butadiene, and providing economic efficiency from the viewpoint of decreasing an amount of used metal and reducing catalyst production cost.
    Type: Application
    Filed: May 2, 2014
    Publication date: June 4, 2015
    Applicant: LG Chem, Ltd.
    Inventors: Myung Ji Suh, Dong Hyun Ko, Kyong Yong Cha, Jun Han Kang, Dae Chul Kim, Hyun Seok Nam, Dae Heung Choi
  • Patent number: 9041222
    Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: May 26, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yonghoon Kim, Keung Beum Kim, Seongho Shin, Seung-Yong Cha, Inho Choi
  • Patent number: 8933493
    Abstract: A semiconductor device may include a first transistor, a second transistor connected in series to the first transistor through a first junction, and a third transistor connected in series to the second transistor through a second junction. Here, a high voltage is supplied to one of the first and second junctions, and a turn-off voltage is supplied to a gate of the second transistor.
    Type: Grant
    Filed: March 16, 2013
    Date of Patent: January 13, 2015
    Assignee: SK Hynix Inc.
    Inventor: Jae-Yong Cha
  • Publication number: 20150001715
    Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.
    Type: Application
    Filed: September 16, 2014
    Publication date: January 1, 2015
    Inventors: Yonghoon Kim, Keung Beum Kim, Seongho Shin, Seung-Yong Cha, Inho Choi
  • Patent number: 8866310
    Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: October 21, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yonghoon Kim, Keung Beum Kim, Seongho Shin, Seung-Yong Cha, Inho Choi
  • Patent number: 8826489
    Abstract: A suction body for a cleaner is provided that can generate electric energy by itself using air drawn in by the cleaner. A suction body includes an ultraviolet sterilizer that radiates ultraviolet rays toward a surface to be cleaned and sterilizes the surface to be cleaned, a lighting device that emits light, a displaying device that displays a cleaning state, a fan that rotates by drawn-in air, and a generator that converts rotary energy of the fan into electric energy so as to supply the electric energy to the ultraviolet sterilizer, the lighting device, and the displaying device.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: September 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang-Keun Oh, Hyun-Ju Lee, Seung-Yong Cha
  • Publication number: 20140239403
    Abstract: A semiconductor device includes a first gate formed on a substrate, the first gate having a square shape. A first junction and a second junction are formed in the substrate at two opposite sides of the first gate. A third junction is formed in the substrate at one of the other two opposite sides of the first gate.
    Type: Application
    Filed: July 3, 2013
    Publication date: August 28, 2014
    Inventor: Jae Yong CHA
  • Publication number: 20140183644
    Abstract: A semiconductor device may include a first transistor, a second transistor connected in series to the first transistor through a first junction, and a third transistor connected in series to the second transistor through a second junction. Here, a high voltage is supplied to one of the first and second junctions, and a turn-off voltage is supplied to a gate of the second transistor.
    Type: Application
    Filed: March 16, 2013
    Publication date: July 3, 2014
    Applicant: SK HYNIX INC.
    Inventor: Jae-Yong CHA
  • Publication number: 20130313706
    Abstract: A semiconductor device is provided, which comprises a first semiconductor package, a second semiconductor package, and a connection structure. The first semiconductor package includes a first substrate. The first substrate includes a first region and a second region. The second semiconductor package is mounted on the first semiconductor package. The connection structure electrically connects the second semiconductor package and the first semiconductor package. The connection structure comprises first connection patterns at the first region. The first connection patterns provide a data signal at the first region. The connection structure further comprises second connection patterns at the second region. The second connection patterns provide a control/address signal at the second region. A number of the second connection patterns is less than a number of the first connection patterns.
    Type: Application
    Filed: January 22, 2013
    Publication date: November 28, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yonghoon Kim, Keung Beum Kim, Seongho Shin, Seung-Yong Cha, Inho Choi
  • Publication number: 20130281748
    Abstract: Disclosed is a method for producing 1,3-butadiene through oxidative dehydrogenation of normal-butene using a parallel reactor in which catalysts are charged into fixed bed reactors and are not physically mixed. More specifically, disclosed is a method for efficiently producing 1,3-butadiene through oxidative dehydrogenation of normal-butene using the parallel reactor containing multi-component bismuth molybdate-based catalysts exhibiting different activities to oxidative dehydrogenation for normal-butene isomers (1-butene, trans-2-butene and cis-2-butene), and butene separated from a C4 mixture containing normal-butene and normal-butane, as a reactant.
    Type: Application
    Filed: November 3, 2011
    Publication date: October 24, 2013
    Applicant: LG CHEM, LTD.
    Inventors: Kyong-Yong Cha, Dong-Hyun Ko, Dae-Chul Kim, Hyun-Seok Nam, Dae-Heung Choi
  • Publication number: 20130093472
    Abstract: A semiconductor integrated circuit includes a driving unit, a first current path and a second current path. The driving unit applies a power supply voltage to a drive node in response to a control signal. The first current path couples the drive node and an output node. The second current path couples the drive node and the output node. The first current path and the second current path are coupled in parallel between the drive node and the output node.
    Type: Application
    Filed: December 30, 2011
    Publication date: April 18, 2013
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Hae Uk LEE, Chang Hyuk LEE, Jae Yong CHA, Ha Min SUNG, Yi Seul PARK
  • Patent number: 8421497
    Abstract: A semiconductor chip including a termination resistance and a semiconductor module including the semiconductor chip.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-yong Cha, Sun-won Kang
  • Patent number: 8198161
    Abstract: A vertical transistor and a method for forming the same. The vertical transistor includes a semiconductor substrate having pillar type active patterns formed on a surface thereof; first junction regions formed in the surface of the semiconductor substrate on both sides of the active patterns; screening layers formed on sidewalls of the first junction regions; second junction regions formed on upper surfaces of the active patterns; and gates formed on sidewalls of the active patterns including the second junction regions to overlap with at least portions of the first junction regions.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: June 12, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seon Yong Cha
  • Patent number: 8172932
    Abstract: A connecting tube having a dust sensing function is provided. The connecting tube includes a tube element having a first air flowing passage; a body having a second air flowing passage to communicate with the first air flowing passage; a detecting sensor disposed on the second air flowing passage to detect whether the dust or dirt passes through the second air flowing passage; a lamp part to operate according to a signal outputted from the detecting sensor; a rotating part rotatably disposed on the body; a rotation driving-passage part disposed on the body to draw in an external air into the second air flowing passage and thus to rotate the rotating part; an electric generator connected to the rotating part to generate an electric power; and a muffler part to reduce noises from the rotating part and the flowing air.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: May 8, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jang-keun Oh, Min-ha Kim, Jin-gon Lee, Jung-gyun Han, Seung-yong Cha
  • Patent number: 8166609
    Abstract: A suction nozzle of a vacuum cleaner includes a suction nozzle body which includes a suction port adapted to draw in contaminants on a surface, and a contaminant attachment unit formed in the suction nozzle body. The contaminant attachment unit is adapted to attach contaminants thereto.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: May 1, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Yong Cha, Jang-Keun Oh
  • Publication number: 20120046393
    Abstract: The present invention relates to a chloride penetration resistant nano-hybrid concrete chemical admixture comprising layered double hydroxide and polyurethane copolymer. More specifically, nano-hybrid concrete chemical admixture obtained by combining the two compounds at a nano-scale, the layered double hydroxide which exhibits resistance to chloride penetration, and polyurethane copolymer which entails an excellent water reducing ability, durability and workability. In addition, the inorganic/organic hybrid material described herein exhibits high water reducing ability, improved resistance to chloride penetration, and thus can be used as chloride penetration resistant concrete chemical admixture for marine concretes.
    Type: Application
    Filed: July 25, 2011
    Publication date: February 23, 2012
    Inventors: Cheol Yong Cha, Kwang Young Park, Young Kook Choi, Myung Wook Jang, Sung Hoon Hwang
  • Publication number: 20120021576
    Abstract: A vertical transistor and a method for forming the same. The vertical transistor includes a semiconductor substrate having pillar type active patterns formed on a surface thereof; first junction regions formed in the surface of the semiconductor substrate on both sides of the active patterns; screening layers formed on sidewalls of the first junction regions; second junction regions formed on upper surfaces of the active patterns; and gates formed on sidewalls of the active patterns including the second junction regions to overlap with at least portions of the first junction regions.
    Type: Application
    Filed: October 3, 2011
    Publication date: January 26, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Seon Yong CHA
  • Patent number: 8053817
    Abstract: A vertical transistor and a method for forming the same. The vertical transistor includes a semiconductor substrate having pillar type active patterns formed on a surface thereof; first junction regions formed in the surface of the semiconductor substrate on both sides of the active patterns; screening layers formed on sidewalls of the first junction regions; second junction regions formed on upper surfaces of the active patterns; and gates formed on sidewalls of the active patterns including the second junction regions to overlap with at least portions of the first junction regions.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: November 8, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seon Yong Cha