Patents by Inventor Yong Chan Kim

Yong Chan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6060365
    Abstract: A method for fabricating a bipolar transistor improves the fast characteristics of the transistor at low operating voltages. An oxide film is formed on a semiconductor substrate, in which a buried layer is formed, and a floating poly base is formed on the oxide film. An insulating film is then formed on the entire surface of the semiconductor substrate including the floating poly base. The insulating film and the floating poly base are etched to define a base region and a collector region, and a first epitaxial layer is formed in the base and collector regions, with the first epitaxial layer having a smaller thickness than the oxide film. A second epitaxial layer is formed on the first epitaxial layer, and impurities are implanted into the second epitaxial layer in the base and collector regions. A second polysilicon layer is then formed on the second epitaxial layer in the base region, and electrodes are formed on the semiconductor surface.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: May 9, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventor: Yong-Chan Kim
  • Patent number: 5970355
    Abstract: A method for fabricating a semiconductor device having a base electrode, an emitter electrode, and a collector electrode, includes the steps of: forming first, second, and buried layers in a semiconductor substrate; forming first, second, and third epitaxial layers using the respective buried layers as seeds; forming an isolation region between the first and second epitaxial layers; forming first, second, and third impurity regions connected to the respective buried layers through the respective epitaxial layers; forming fourth, fifth, and sixth impurity regions in the respective epitaxial layers; forming polysilicon layers on the respective epitaxial layers, respectively; defining first, second, and third emitter electrode regions as well as first, second, and third base contact regions; etching portions of the polysilicon layers excluding the emitter electrode regions and the base contact regions down to a predetermined depth; oxidizing the etched portions of the polysilicon layer to grow an oxide layer; im
    Type: Grant
    Filed: February 4, 1998
    Date of Patent: October 19, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Yong Chan Kim
  • Patent number: 5956599
    Abstract: The method for forming a semiconductor device isolation layer, which advantageously simplifies the manufacture and planarization of the device, includes the steps of forming a V-shaped groove of a predetermined width and depth in a device isolation region of a semiconductor substrate and subjecting the substrate to a thermal oxidation process to form the device isolation layer.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: September 21, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Yong Chan Kim
  • Patent number: 5939779
    Abstract: A bottom lead semiconductor chip stack package which includes a first body and a second body. The first body includes a pair of lead frames, each lead frame having a first lead portion and a second lead portion. A protrusion enclosed in a solder extends from the first lead portion. The first body also includes a semiconductor chip containing chip pads disposed on the surface thereof, the chip pads being connected to the solder enclosed protrusions. The second body has substantially the same structural configurations as the first body and is reversely stacked relative to the first body such that the semiconductor chips are disposed in opposing relationship relative to each other. An adhesive attaches the lead frames of the first body to the corresponding lead frames of the second body.
    Type: Grant
    Filed: May 14, 1997
    Date of Patent: August 17, 1999
    Assignee: LG Semicon Co., Ltd.
    Inventor: Yong Chan Kim
  • Patent number: 5862676
    Abstract: A refrigerant expansion device for a refrigeration cycle comprises a housing, a passage formed penetrating the housing, an expansion means for expanding the refrigerant passing through the passage and a flow rate control means for bypassing some of the refrigerant passing through the expansion means according to the pressure of the refrigerant, for supplying to the low pressure portion of the passage, and for controlling the flow rate of the refrigerant through the expansion means.
    Type: Grant
    Filed: June 19, 1997
    Date of Patent: January 26, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Youb Kim, Young-Dawn Bae, Eun-Chang Choi, Yong-Chan Kim
  • Patent number: 5714410
    Abstract: An improved CMOS analog semiconductor apparatus and a fabrication method thereof which are capable of selectively oxidizing a polysilicon, and forming a conductive region and an insulation region of a semiconductor apparatus, for thus improving a metal step coverage of the semiconductor apparatus by using a simpler process, so that it is possible to reduce a defective wiring and crack, and to increase a yield and reliability of the product.
    Type: Grant
    Filed: December 5, 1996
    Date of Patent: February 3, 1998
    Assignee: LG Semicon Co., Ltd.
    Inventor: Yong Chan Kim