Patents by Inventor Yong Chan Kim

Yong Chan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150370359
    Abstract: The present application provides a conductive structure body precursor, a conductive structure body and a method for manufacturing the same.
    Type: Application
    Filed: November 27, 2014
    Publication date: December 24, 2015
    Inventors: Jin Hyong LIM, Yong Chan KIM, Junghwan YOON, Jung II YOON, KI-Hwan KIM, IIha LEE
  • Publication number: 20150373844
    Abstract: The present specification relates to a conductive structure body and a method for manufacturing the same.
    Type: Application
    Filed: November 4, 2014
    Publication date: December 24, 2015
    Inventors: Junghwan YOON, Jin Hyong LIM, Yong Chan KIM, IIha LEE, Ki-Hwan KIM
  • Publication number: 20150313013
    Abstract: The present application relates to a conductive film, a method for manufacturing the same, and a display device including the same.
    Type: Application
    Filed: October 30, 2014
    Publication date: October 29, 2015
    Inventors: Yong Chan KIM, Jin Hyong LIM, Ki-Hwan KIM, Junghwan YOON, Ilha LEE
  • Publication number: 20150279899
    Abstract: Provided are a unit pixel, an image sensor including the same, a portable electronic device including the same, and a method of manufacturing the same. The method of manufacturing includes: forming a photoelectric conversion region in a substrate; forming, in the substrate, a first floating diffusion region spaced apart from the photoelectric conversion region of the substrate, and a second floating diffusion region spaced apart from the first floating diffusion region; forming a first recess spaced apart from the first floating diffusion region and the second floating diffusion region by removing a portion of the substrate from a first surface of the substrate; filling the first recess to form a dual conversion gain (DCG) gate that extends perpendicularly or substantially perpendicularly from the first surface of the substrate; and forming a conductive layer to fill an inside of the first recess.
    Type: Application
    Filed: March 17, 2015
    Publication date: October 1, 2015
    Inventors: Yong-Chan KIM, Seung-Sik KIM, Eun-Sub SHIM, Moo-Sup LIM
  • Publication number: 20150170579
    Abstract: A device for driving a light-emitting diode, a light-emitting device, and a display device are disclosed. The disclosed light-emitting diode driving device may include: a first transistor having a first conductive electrode connected with a source voltage terminal and having a second conductive electrode connected with an input terminal of the light-emitting diode; a second transistor having a control electrode connected with the second conductive electrode of the first transistor; and a capacitor having one end connected with a data voltage terminal and having the other end connected with a first node, which is connected with a control electrode of the first transistor and with a first conductive electrode of the second transistor.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 18, 2015
    Inventors: Ho-Jin Lee, Yong-Chan Kim, Sung-Young Seo
  • Patent number: 8667341
    Abstract: An apparatus and method for determining interleaved addresses of a turbo interleaver are disclosed. A new interleaving size of received data is compared with a previously-stored interleaving size. When the compared interleaving sizes are equal to each other, the received data is decoded using previously-stored interleaved addresses. When the compared interleaving sizes are different from each other, the received data is decoded using new interleaved addresses generated with the new interleaving size. The turbo interleaver generates interleaved addresses at minimum number of code blocks rather than every code block, resulting in reduction of decoding delay and improvement of decoding performance.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: March 4, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Jin Wook Han, Yong Chan Kim
  • Publication number: 20130230749
    Abstract: A cylindrical secondary battery is disclosed. The cylindrical secondary battery includes a jelly-roll type electrode assembly, a center pin inserted to penetrate the central portion of the jelly-roll type electrode assembly, a can accommodating the electrode assembly and the center pin, a cap assembly coupled to an upper opening of the can to seal the can, and a gasket interposed between the can and the cap assembly. In the jelly-roll type electrode assembly, a first electrode, a second electrode and a separator interposed between the two electrodes are wound together. An electrode tape is attached to at least one surface of an uncoated portion of the first electrode at a core of the jelly-roll type electrode assembly. The electrode tape includes a polymeric resin film having a melting point of at least 130° C.
    Type: Application
    Filed: April 18, 2013
    Publication date: September 5, 2013
    Applicant: LG CHEM, LTD.
    Inventors: Yong-Chan KIM, Duk-Hyun RYU, Cha-Hun KU, Nak-Gi SUNG
  • Publication number: 20130157363
    Abstract: The present invention provides methods for producing cell populations enriched for stable, regulatory T cells (Tregs). In particular, the invention relates to methods for culturing T cells such that the final culture is enriched for stable, regulatory T cells. It also relates to methods for stabilizing regulatory T cells. Also provided are compositions enriched for stable, regulatory T cells, which are useful for treating individuals in need of such treatment. The methods and compositions disclosed herein can also be used to treat an individual suffering from an immune-mediated disease.
    Type: Application
    Filed: December 17, 2012
    Publication date: June 20, 2013
    Applicant: The U.S.A., as represented by the Secretary, Department of Health and Human Service
    Inventors: Yong Chan Kim, Ethan Shevach
  • Patent number: 8356228
    Abstract: An apparatus and method for reducing power consumption in a mobile communication system are provided. The apparatus includes a time slicing processor. When a frame border of the last section for determining a burst reception end time is not detected during a burst reception operation, the time slicing processor receives a burst enough to restore the whole MPE-FEC frame to the former state or receives an early burst reception end request for notifying that it is impossible to restore the whole MPE-FEC frame to the former state, and terminates the burst reception process.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: January 15, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Yong-Chan Kim, Il-Ho Lee
  • Publication number: 20130010911
    Abstract: Provided are a probe and an apparatus for measuring a thickness of an oxide layer of a fuel rod, capable of testing claddings of inner and outer fuel rods of a nuclear fuel assembly without disassembling the nuclear fuel assembly. The probe includes a fuel rod transfer region on which an eddy current sensor capable of continuously testing claddings of outer fuel rods of a fixed nuclear fuel assembly is mounted. Further, the apparatus includes a frame in which a cylinder driven in upward and downward directions is mounted, a first probe connected to one side of the cylinder in order to test claddings of outer fuel rods of a nuclear fuel assembly, and a second probe connected to the other side of the cylinder in order to test claddings of inner fuel rods of the nuclear fuel assembly.
    Type: Application
    Filed: December 22, 2011
    Publication date: January 10, 2013
    Inventors: Jung Cheol SHIN, Sang Kyun WOO, Yong Chan KIM, Sung Min KIM, Chae Joon LIM
  • Patent number: 8018021
    Abstract: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: September 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Shik Kim, Oh-Kyum Kwon, Myung-Hee Kim, Yong-Chan Kim, Hye-Young Park, Joon-Suk Oh
  • Patent number: 7960785
    Abstract: A semiconductor integrated circuit device may include: a substrate that includes a high-voltage device region and a low-voltage device region defined on the substrate; a first buried impurity layer formed in at least a portion of the high-voltage device region and coupled to a first voltage; a second buried impurity layer formed in at least a portion of the low-voltage device region and coupled to a second voltage less than the first voltage; and a well formed on the second buried impurity layer in the low-voltage device region and coupled to a third voltage less than the second voltage.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: June 14, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Don Kim, Yong-Chan Kim, Joung-Ho Kim, Mueng-Ryul Lee, Eung-Kyu Lee, Jong-Wook Lim
  • Patent number: 7961012
    Abstract: An apparatus and for preventing a glitch in a clock switching circuit includes a select signal manager and a clock gate unit. The select signal manager generates a detect change signal, provides the detect change signal as an input signal for generating a clock gate signal to the clock gate unit, and changes a muxsel signal into a select signal using the clock gate signal to select a clock intending for switching. Upon receiving the detect change signal, the clock gate unit gates a received clock, generates the clock gate signal using a level of the detect change signal as an input signal, and provides the generated clock gate signal to the select signal manager.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: June 14, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Heon-Seok Hong, Yun-Ju Kwon, Yong-Chan Kim
  • Publication number: 20110041042
    Abstract: An apparatus and method for determining interleaved addresses of a turbo interleaver are disclosed. A new interleaving size of received data is compared with a previously-stored interleaving size. When the compared interleaving sizes are equal to each other, the received data is decoded using previously-stored interleaved addresses. When the compared interleaving sizes are different from each other, the received data is decoded using new interleaved addresses generated with the new interleaving size. The turbo interleaver generates interleaved addresses at minimum number of code blocks rather than every code block, resulting in reduction of decoding delay and improvement of decoding performance.
    Type: Application
    Filed: August 11, 2010
    Publication date: February 17, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin Wook HAN, Yong Chan Kim
  • Publication number: 20100229072
    Abstract: An apparatus and method for reducing power consumption in a mobile communication system are provided. The apparatus includes a time slicing processor. When a frame border of the last section for determining a burst reception end time is not detected during a burst reception operation, the time slicing processor receives a burst enough to restore the whole MPE-FEC frame to the former state or receives an early burst reception end request for notifying that it is impossible to restore the whole MPE-FEC frame to the former state, and terminates the burst reception process.
    Type: Application
    Filed: October 2, 2008
    Publication date: September 9, 2010
    Inventors: Yong-Chan Kim, Il-Ho Lee
  • Publication number: 20100200945
    Abstract: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.
    Type: Application
    Filed: April 19, 2010
    Publication date: August 12, 2010
    Inventors: Dae-Shik Kim, Oh-Kyum Kwon, Myung-Hee Kim, Yong-Chan Kim, Hye-Young Park, Joon-Suk Oh
  • Patent number: 7705409
    Abstract: Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate. A second well is formed on both sides of the gate electrode in the semiconductor substrate, and partially extends to a bottom surface of the device isolation film. The active region in the semiconductor substrate comprises a first active region disposed under the gate electrode, and separating the device isolation film and a second active region defined by the first active region and the device isolation film. Methods of manufacturing high voltage transistors are also provided.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: April 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Oh-kyum Kwon, Yong-chan Kim, Joon-suk Oh, Myung-hee Kim, Hye-young Park
  • Publication number: 20090267148
    Abstract: A semiconductor integrated circuit device may include: a substrate that includes a high-voltage device region and a low-voltage device region defined on the substrate; a first buried impurity layer formed in at least a portion of the high-voltage device region and coupled to a first voltage; a second buried impurity layer formed in at least a portion of the low-voltage device region and coupled to a second voltage less than the first voltage; and a well formed on the second buried impurity layer in the low-voltage device region and coupled to a third voltage less than the second voltage.
    Type: Application
    Filed: March 19, 2009
    Publication date: October 29, 2009
    Inventors: Yong-Don Kim, Yong-Chan Kim, Joung-Ho Kim, Mueng-Ryul Lee, Eung-Kyu Lee, Jong-Wook Lim
  • Patent number: D597515
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: August 4, 2009
    Assignee: Pantech&Curitel Communications, Inc.
    Inventor: Yong-chan Kim
  • Patent number: D699207
    Type: Grant
    Filed: August 3, 2012
    Date of Patent: February 11, 2014
    Assignee: Pantech Co., Ltd.
    Inventor: Yong-Chan Kim