Abstract: A cylindrical secondary battery is disclosed. The cylindrical secondary battery includes a jelly-roll type electrode assembly, a center pin inserted to penetrate the central portion of the jelly-roll type electrode assembly, a can accommodating the electrode assembly and the center pin, a cap assembly coupled to an upper opening of the can to seal the can, and a gasket interposed between the can and the cap assembly. In the jelly-roll type electrode assembly, a first electrode, a second electrode and a separator interposed between the two electrodes are wound together. An electrode tape is attached to at least one surface of an uncoated portion of the first electrode at a core of the jelly-roll type electrode assembly. The electrode tape includes a polymeric resin film having a melting point of at least 130° C.

Abstract: The present invention provides methods for producing cell populations enriched for stable, regulatory T cells (Tregs). In particular, the invention relates to methods for culturing T cells such that the final culture is enriched for stable, regulatory T cells. It also relates to methods for stabilizing regulatory T cells. Also provided are compositions enriched for stable, regulatory T cells, which are useful for treating individuals in need of such treatment. The methods and compositions disclosed herein can also be used to treat an individual suffering from an immune-mediated disease.

Abstract: An apparatus and method for reducing power consumption in a mobile communication system are provided. The apparatus includes a time slicing processor. When a frame border of the last section for determining a burst reception end time is not detected during a burst reception operation, the time slicing processor receives a burst enough to restore the whole MPE-FEC frame to the former state or receives an early burst reception end request for notifying that it is impossible to restore the whole MPE-FEC frame to the former state, and terminates the burst reception process.

Abstract: Provided are a probe and an apparatus for measuring a thickness of an oxide layer of a fuel rod, capable of testing claddings of inner and outer fuel rods of a nuclear fuel assembly without disassembling the nuclear fuel assembly. The probe includes a fuel rod transfer region on which an eddy current sensor capable of continuously testing claddings of outer fuel rods of a fixed nuclear fuel assembly is mounted. Further, the apparatus includes a frame in which a cylinder driven in upward and downward directions is mounted, a first probe connected to one side of the cylinder in order to test claddings of outer fuel rods of a nuclear fuel assembly, and a second probe connected to the other side of the cylinder in order to test claddings of inner fuel rods of the nuclear fuel assembly.

Abstract: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.

Abstract: A semiconductor integrated circuit device may include: a substrate that includes a high-voltage device region and a low-voltage device region defined on the substrate; a first buried impurity layer formed in at least a portion of the high-voltage device region and coupled to a first voltage; a second buried impurity layer formed in at least a portion of the low-voltage device region and coupled to a second voltage less than the first voltage; and a well formed on the second buried impurity layer in the low-voltage device region and coupled to a third voltage less than the second voltage.

Abstract: An apparatus and for preventing a glitch in a clock switching circuit includes a select signal manager and a clock gate unit. The select signal manager generates a detect change signal, provides the detect change signal as an input signal for generating a clock gate signal to the clock gate unit, and changes a muxsel signal into a select signal using the clock gate signal to select a clock intending for switching. Upon receiving the detect change signal, the clock gate unit gates a received clock, generates the clock gate signal using a level of the detect change signal as an input signal, and provides the generated clock gate signal to the select signal manager.

Abstract: An apparatus and method for determining interleaved addresses of a turbo interleaver are disclosed. A new interleaving size of received data is compared with a previously-stored interleaving size. When the compared interleaving sizes are equal to each other, the received data is decoded using previously-stored interleaved addresses. When the compared interleaving sizes are different from each other, the received data is decoded using new interleaved addresses generated with the new interleaving size. The turbo interleaver generates interleaved addresses at minimum number of code blocks rather than every code block, resulting in reduction of decoding delay and improvement of decoding performance.

Abstract: An apparatus and method for reducing power consumption in a mobile communication system are provided. The apparatus includes a time slicing processor. When a frame border of the last section for determining a burst reception end time is not detected during a burst reception operation, the time slicing processor receives a burst enough to restore the whole MPE-FEC frame to the former state or receives an early burst reception end request for notifying that it is impossible to restore the whole MPE-FEC frame to the former state, and terminates the burst reception process.

Abstract: A schottky diode may include a schottky junction including a well formed in a semiconductor substrate and a first electrode contacting the first well. The well may have a first conductivity type. A first ohmic junction may include a first junction region formed in the well and a second electrode contacting the first junction region. The first junction region may have a higher concentration of the first conductivity type than the well. A first device isolation region may be formed in the semiconductor substrate separating the schottky junction and the first ohmic junction. A well guard having a second conductivity type opposite to the first conductivity type may be formed in the well. At least a portion of the well guard may be formed under a portion of the schottky junction.

Abstract: Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate. A second well is formed on both sides of the gate electrode in the semiconductor substrate, and partially extends to a bottom surface of the device isolation film. The active region in the semiconductor substrate comprises a first active region disposed under the gate electrode, and separating the device isolation film and a second active region defined by the first active region and the device isolation film. Methods of manufacturing high voltage transistors are also provided.

Abstract: A semiconductor integrated circuit device may include: a substrate that includes a high-voltage device region and a low-voltage device region defined on the substrate; a first buried impurity layer formed in at least a portion of the high-voltage device region and coupled to a first voltage; a second buried impurity layer formed in at least a portion of the low-voltage device region and coupled to a second voltage less than the first voltage; and a well formed on the second buried impurity layer in the low-voltage device region and coupled to a third voltage less than the second voltage.

Abstract: An apparatus and for preventing a glitch in a clock switching circuit includes a select signal manager and a clock gate unit. The select signal manager generates a detect change signal, provides the detect change signal as an input signal for generating a clock gate signal to the clock gate unit, and changes a muxsel signal into a select signal using the clock gate signal to select a clock intending for switching. Upon receiving the detect change signal, the clock gate unit gates a received clock, generates the clock gate signal using a level of the detect change signal as an input signal, and provides the generated clock gate signal to the select signal manager.

Abstract: An address driver includes an energy recovery circuit and an output stage connected to the energy recovery circuit. The output stage is connected to the energy recovery circuit and is formed of a pull-up MOS transistor and a pull-down MOS transistor in series. A source terminal of the pull-up MOS transistor is connected to the energy recovery circuit, and a bulk terminal of the pull-up MOS transistor is connected to a node providing a reverse bias between the source terminal and the bulk terminal of the pull-up MOS transistor. A display device employing the address driver is also provided.

Abstract: Some embodiments of the present invention provide high voltage transistors including a semiconductor substrate and a device isolation film defining an active region in the semiconductor substrate. A gate electrode extends along a central portion of the active region while maintaining a predetermined width on the semiconductor substrate. A second well is formed on both sides of the gate electrode in the semiconductor substrate, and partially extends to a bottom surface of the device isolation film. The active region in the semiconductor substrate comprises a first active region disposed under the gate electrode, and separating the device isolation film and a second active region defined by the first active region and the device isolation film. Methods of manufacturing high voltage transistors are also provided.

Abstract: A semiconductor device includes pads disposed in a chip region of a semiconductor substrate and line patterns disposed in a scribe region of the semiconductor substrate and extending toward the pads. The line patterns each have a line-width that is less than a predetermined distance between adjacent pads. Thus, respective interconnection lines connected to the pads are not short-circuited to each-other through the line patterns in the remaining scribe region after the chip region is sawed into a semiconductor chip.