Abstract: A semiconductor device including a common delay circuit configured to delay an input signal in response to a delay control code to output a first delayed input signal and a second delayed input signal; a first delay circuit configured to delay the first delayed input signal in response to the delay control code and to output a first output signal; and a second delay circuit configured to delay the second delayed input signal in response to the delay control code and to output a second output signal.

Abstract: An internal clock signal generation circuit is capable of controlling a unit delay time depending on a frequency of an external clock signal. The internal clock signal generation circuit includes an internal clock signal generation unit configured to generate an internal clock signal corresponding to a plurality of unit delay cells enabled in response to a control signal, and a unit delay time control unit configured to detect a frequency of an external clock signal and control a unit delay time of each of the plurality of unit delay cells.

Abstract: A semiconductor device includes: an internal clock signal generation unit configured to receive an external clock signal and to generate an internal clock signal in response to a control signal; and a monitoring unit configured to monitor environmental elements reflected in a circuit response to the control signal.

Abstract: An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code.

Abstract: Provided are a light, thin, short and small, and multi-functional anisotropic particle-arranged structure including two electrodes having fine pitches that are repeatedly compressed to be connected to external elements, and a method of manufacturing the anisotropic particle-arranged structure. The anisotropic particle-arranged structure includes an elastic polymer layer, and elastic conductors or elastic thermal conductors formed in the elastic polymer layer so that upper and lower portions of the elastic conductors or elastic thermal conductors are exposed.

Abstract: An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code.

Abstract: An optical system and an SSD module that maintain optimal SI, PI and EMI characteristics without a shield based on a ground voltage and an impedance match. The optical system includes a solid state drive (SSD) module and an input/output (I/O) interface. The SSD module includes a plurality of solid state memory units. The input/output (I/O) interface receives data to be written to at least one of the solid state memory units from a main memory unit, the input/output (I/O) interface transmits data written in at least one of the solid state memory units to the main memory unit. The SSD module and the I/O interface transmit and receive data using an optical medium.

Abstract: A semiconductor device includes a buffer unit configured to include first and second buffers, connected to each other in a cross-coupled manner, to receive a reference voltage and to buffer an input signal applied to the first and second buffers based on the reference voltage to drive an output terminal with a current-driving capacity; and a drive power adjustor configured to adjust the current-driving capacity depending on a level of a power supply voltage applied to the buffering unit.

Abstract: A semiconductor device includes a buffer unit configured to include first and second buffers, connected to each other in a cross-coupled manner, to receive a reference voltage and to buffer an input signal applied to the first and second buffers based on the reference voltage to drive an output terminal with a current-driving capacity; and a drive power adjustor configured to adjust the current-driving capacity depending on a level of a power supply voltage applied to the buffering unit.

Abstract: A method of measuring a critical dimension may include forming an object pattern on a substrate and forming a plurality of reference patterns on the substrate, wherein each of the plurality of reference patterns has a different critical dimension. An optical property of each of the plurality of reference patterns may be measured to provide a respective measured optical property for each of the reference patterns, and an optical property of the object pattern may be measured to provide a measured optical property of the object pattern. The measured optical property of the object pattern may be compared with the measured optical properties of the reference patterns, and a critical dimension of the object pattern may be determined as being the same as the critical dimension of the reference pattern having the measured optical property that is closest to the measured optical property of the object pattern. Related devices are also discussed.

Abstract: A multilayer insulated wire has a conductor and two or more extrusion-insulating layers to cover the conductor, wherein at least one layer of the insulating layers other than an innermost layer is formed by a resin mixture containing a polyphenylene sulfide resin (A) as a continuous phase and an olefin-based copolymer ingredient (B) as a dispersed phase, or wherein at least one layer of the insulating layers other than an innermost layer is formed by a resin mixture containing a polyphenylene sulfide resin (A) as a continuous phase, and an olefin-based copolymer ingredient (B) and a polyamide (E) as a dispersed phase; a transformer is made by the multilayer insulated wire.

Abstract: A keyboard-input information-security apparatus and method are provided.

Abstract: A semiconductor package includes a main substrate, a semiconductor chip having a first side and a second side, the first side of the semiconductor chip disposed on the main substrate and electrically connected to the main substrate, and a conductive network formed on the second side of the semiconductor chip.

Abstract: Provided is a method of securing a Universal Serial Bus (USE) keyboard. According to the method, a keyboard security operation is performed at a host controller driver level, which is one level lower than a USE hub driver level. Thus, it is possible to rapidly and effectively prevent a malicious program from leaking information input from a keyboard that is in communication with a main frame and transfers data via a USB.

Abstract: A power-up signal generator of a semiconductor memory apparatus includes a power-up signal generating unit that includes a MOS transistor having a gate receiving a divided voltage of an external supply voltage, the power-up signal generating unit determining a level of a power-up signal according to a turn-ON state of the MOS transistor, and a bulk bias voltage generating unit that applies a bulk bias voltage to a bulk of the MOS transistor to adjust a threshold voltage of the MOS transistor, wherein the bulk bias voltage varies according to a temperature of the semiconductor memory device.

Abstract: Non-volatile memory devices according to embodiments of the present invention include an EEPROM transistor in a first portion of a semiconductor substrate, an access transistor in a second portion of the semiconductor substrate and an erase transistor in a third portion of the semiconductor substrate. The second portion of the semiconductor substrate extends adjacent a first side of the first portion of the semiconductor substrate and the third portion of the semiconductor substrate extends adjacent a second side of the first portion of the semiconductor substrate. The first and second sides of the first portion of the semiconductor substrate may be opposite sides of the first portion of the semiconductor substrate. The access transistor has a first source/drain terminal electrically connected to a first source/drain terminal of the EEPROM transistor and the erase transistor has a first source/drain terminal electrically connected to a second source/drain terminal of the access transistor.

Abstract: A thermoplastic resin foam which has both high reflectance and superior shape-retention properties, suitable for use in backlights and illumination boxes for illumination signboards, lighting fixtures, displays and the like. The thermoplastic resin foam is manufactured by a manufacturing method including a procedure for holding a resin sheet composed of thermoplastic resin (A) and thermoplastic resin (B), which has a functional group having an affinyty with thermoplastic resin (A), within a pressurized inert gas atmosphere to enable the resin sheet to contain inert gas, and a procedure for foaming by heating the resin sheet containing inert gas at a temperature higher than the softening temperature of thermoplastic resin, under normal pressure.

Abstract: A radiometer imaging system includes an antenna array having a plurality of sub-arrays, each being formed of a plurality of antenna elements arranged in a sub-Y-type, a receiver array having the same number of receivers as the antenna elements, each receiver being associated with one of the antenna elements in a one-to-one correspondence to thereby define a channel to generate a first signal and a second signal from an output of each antenna element, and a correlation processor for calculating a correlation for each correlated channel pair, by using the first signal and the second signal for each antenna element, to thereby obtain an 3-D image for the object.

Abstract: A photomask cleaning apparatus including a stage supporting a photomask, a cleaning fluid supplying unit configured to supply a cleaning fluid to remove contaminants from the photomask, a cleaning fluid absorbing unit configured to absorb the cleaning fluid supplied from the cleaning fluid supplying unit; and a contaminant removing structure configured to provide a path through which the cleaning fluid flows between the cleaning fluid supplying unit and the cleaning fluid absorbing unit through a surface of the photomask on the stage, and to have an opening aperture through which the cleaning fluid is exposed onto the surface of the photomask so as to remove at least some of the contaminants is provided. Methods of cleaning a photomask are also provided.

Abstract: A method of measuring a critical dimension may include forming an object pattern on a substrate and forming a plurality of reference patterns on the substrate, wherein each of the plurality of reference patterns has a different critical dimension. An optical property of each of the plurality of reference patterns may be measured to provide a respective measured optical property for each of the reference patterns, and an optical property of the object pattern may be measured to provide a measured optical property of the object pattern. The measured optical property of the object pattern may be compared with the measured optical properties of the reference patterns, and a critical dimension of the object pattern may be determined as being the same as the critical dimension of the reference pattern having the measured optical property that is closest to the measured optical property of the object pattern. Related devices are also discussed.