Abstract: Provided is a touch member includes a folding region folded around a folding axis and a non-folding region adjacent to the folding region. The touch member includes a first conductive pattern disposed in the folding region and a second conductive pattern disposed in the non-folding region. The touch member also includes an air gap defined inside the first conductive pattern.

Abstract: A flexible touch sensing unit may include a substrate including an active touch region and an inactive region surrounding the active touch region, a plurality of first sensing electrodes disposed on the active touch region and extending along a first direction, a plurality of second sensing electrodes disposed on the active touch region and extending along a second direction, and a plurality of sensing lines disposed on the inactive region and electrically connected to the first sensing electrodes and the second sensing electrodes. Each of the sensing lines may include a first metal layer, a first conductive layer disposed on the first metal layer, and a second metal layer disposed on the first conductive layer. Each of the first sensing electrodes may include a third metal layer, and each of the second sensing electrodes may include a fourth metal layer. The first conductive layer may include a self-assembled monolayer.

Abstract: A wire grid polarizer plate includes: a transparent substrate through which incident light is transmitted; and a partition wall member on the transparent substrate and at which first polarized light is transmitted and second polarized light perpendicular to the first polarized light is reflected. The partition wall member is defined by: first partition walls spaced apart from each other on the transparent substrate, the first partition walls formed of a first metal; second partition walls respectively on the first partition walls, the second partition walls formed of a second metal having strength greater than that of the first metal; and third reinforced partition walls respectively on the second partition walls and having a stepped cross-sectional structure, the third partition walls formed of an oxide of the first metal, the oxide of the first metal having strength greater than the strength of the second metal.

Abstract: A touch sensor includes a touch substrate including a touch sensing area and a non-sensing area outside the touch sensing area, touch electrodes disposed in the touch sensing area and configured to sense a touch, and touch wiring connected to the touch electrodes in the non-sensing area, in which the touch wiring includes a first wiring conductive layer, a second wiring conductive layer disposed on the first wiring conductive layer, and transparent layers disposed at first and second sides of the second wiring conductive layer and on the first wiring conductive layer.

Abstract: A liquid crystal display is provided. The liquid crystal display includes a substrate, a thin film transistor disposed on the substrate, a pixel electrode connected with a terminal of the thin film transistor, a microcavity disposed on the pixel electrode, the microcavity including a liquid crystal injection hole disposed at an edge of the microcavity, a supporting member disposed on the microcavity, a first hydrophobic layer disposed on an edge portion of the supporting member, and a capping layer disposed on the supporting member with the capping layer covering the liquid crystal injection hole.

Abstract: A method of forming a thin film transistor array panel includes: forming a first insulating layer on a substrate; forming an amorphous carbon layer on the first insulating layer; forming a second insulating layer on the amorphous carbon layer; forming an opening in the amorphous carbon layer by patterning the second insulating layer and the amorphous carbon layer; and forming a trench in the first insulating layer by etching the first insulating layer, the etching the first insulating layer using the amorphous carbon layer including the opening as a mask.

Abstract: A method of forming a thin film transistor array panel includes: forming a first insulating layer on a substrate; forming an amorphous carbon layer on the first insulating layer; forming a second insulating layer on the amorphous carbon layer; forming an opening in the amorphous carbon layer by patterning the second insulating layer and the amorphous carbon layer; and forming a trench in the first insulating layer by etching the first insulating layer, the etching the first insulating layer using the amorphous carbon layer including the opening as a mask.

Abstract: The present invention relates to a method for forming a trench that can remove residual particles in a trench using a metal mask, a method for forming a metal wire, and a method for manufacturing a thin film transistor array panel. The method for forming a trench includes: forming a first insulating layer on a substrate; forming a first metal layer on the first insulating layer; forming an opening by patterning the first metal layer; forming a trench by dry-etching the first insulating layer using the patterned first metal layer as a mask; and wet-etching the substrate. The dry-etching is performed using a main etching gas and a first auxiliary etching gas, and the first auxiliary etching gas includes argon.

Abstract: A display substrate includes a metal pattern, a first insulation layer pattern and a second insulation layer pattern. The metal pattern is on a base substrate. The first insulation pattern is on the metal pattern and includes one of a silicon nitride (SiNx) and a silicon oxide (SiOx). The second insulation pattern is on the first insulation pattern and includes a remaining one of the silicon nitride (SiNx) and the silicon oxide (SiOx).

Abstract: A liquid crystal display is provided. The liquid crystal display includes a substrate, a thin film transistor disposed on the substrate, a pixel electrode connected with a terminal of the thin film transistor, a microcavity disposed on the pixel electrode, the microcavity including a liquid crystal injection hole disposed at an edge of the microcavity, a supporting member disposed on the microcavity, a first hydrophobic layer disposed on an edge portion of the supporting member, and a capping layer disposed on the supporting member with the capping layer covering the liquid crystal injection hole.

Abstract: A method of forming a thin film transistor array panel includes: forming a first insulating layer on a substrate; forming an amorphous carbon layer on the first insulating layer; forming a second insulating layer on the amorphous carbon layer; forming an opening in the amorphous carbon layer by patterning the second insulating layer and the amorphous carbon layer; and forming a trench in the first insulating layer by etching the first insulating layer, the etching the first insulating layer using the amorphous carbon layer including the opening as a mask.

Abstract: The present invention relates to a method for forming a trench that can remove residual particles in a trench using a metal mask, a method for forming a metal wire, and a method for manufacturing a thin film transistor array panel. The method for forming a trench includes: forming a first insulating layer on a substrate; forming a first metal layer on the first insulating layer; forming an opening by patterning the first metal layer; forming a trench by dry-etching the first insulating layer using the patterned first metal layer as a mask; and wet-etching the substrate. The dry-etching is performed using a main etching gas and a first auxiliary etching gas, and the first auxiliary etching gas includes argon.

Abstract: A display substrate includes a metal pattern, a first insulation layer pattern and a second insulation layer pattern. The metal pattern is on a base substrate. The first insulation pattern is on the metal pattern and includes one of a silicon nitride (SiNx) and a silicon oxide (SiOx). The second insulation pattern is on the first insulation pattern and includes a remaining one of the silicon nitride (SiNx) and the silicon oxide (SiOx).

Abstract: A Thin Film Transistor (TFT) has a capping layer disposed on the surface of at least one of source and drain electrodes on a substrate, a protective film disposed on the capping layer, and a conductive layer electrically connected to the capping layer via a contact hole formed in the protective layer film.

Abstract: A method of fabricating a semiconductor device in which a plurality of conductive lines having a fine pitch and a uniform thickness can be formed is provided. The method includes forming a plurality of first conductive patterns in a insulation layer as closed curves, forming a plurality of mask patterns on the insulation layer, the mask patterns exposing end portions of each of the first conductive patterns, and forming a plurality of second conductive patterns in the insulation layer as lines by removing the end portions of each of the first conductive patterns.

Abstract: An example embodiment relates to a method of forming a pattern structure, including forming an object layer on a substrate, and forming a hard mask on the object layer. A plasma reactive etching process is performed on the object layer using an etching gas including a fluorine containing gas and ammonia (NH3) gas together with oxygen gas to form a pattern. The oxygen gas is used for suppressing the removal of the hard mask during the etching process.

Abstract: Methods of forming pattern structures and methods of manufacturing memory devices using the same are provided, the methods of forming pattern structures include forming an etching object layer on a substrate and performing a plasma reactive etching process on the etching object layer using an etching gas including at least ammonia (NH3) gas. The etching object layer includes a magnetic material or a phase change material.

Abstract: A method of fabricating a semiconductor device in which a plurality of conductive lines having a fine pitch and a uniform thickness can be formed is provided. The method includes forming a plurality of first conductive patterns in a insulation layer as closed curves, forming a plurality of mask patterns on the insulation layer, the mask patterns exposing end portions of each of the first conductive patterns, and forming a plurality of second conductive patterns in the insulation layer as lines by removing the end portions of each of the first conductive patterns.

Abstract: An example embodiment relates to a method of forming a pattern structure, including forming an object layer on a substrate, and forming a hard mask on the object layer. A plasma reactive etching process is performed on the object layer using an etching gas including a fluorine containing gas and ammonia (NH3) gas together with oxygen gas to form a pattern. The oxygen gas is used for suppressing the removal of the hard mask during the etching process.

Abstract: A method of fabricating a semiconductor device in which a plurality of conductive lines having a fine pitch and a uniform thickness can be formed is provided. The method includes forming a plurality of first conductive patterns in a insulation layer as closed curves, forming a plurality of mask patterns on the insulation layer, the mask patterns exposing end portions of each of the first conductive patterns, and forming a plurality of second conductive patterns in the insulation layer as lines by removing the end portions of each of the first conductive patterns.