Patents by Inventor Yong-Kwan Kim

Yong-Kwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8901526
    Abstract: A variable resistive memory device capable of reducing contact resistance by including a contact layer having low contact resistance, the variable resistive memory device including a substrate comprising an active region; a gate line on the substrate; a first contact layer electrically connected to the active region; a memory cell contact plug electrically connected to the first contact layer; and a variable resistive memory cell electrically connected to the memory cell contact plug, wherein the first contact layer has less contact resistance with respect to the active region than the memory cell contact plug.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-hyung Nam, Yong-kwan Kim, Ho-joong Lee, Pulunsol Cho
  • Publication number: 20140346473
    Abstract: An organic light-emitting display apparatus includes a flexible substrate. The organic light-emitting display apparatus includes a first plastic layer. A first barrier layer is formed on the first plastic layer. A second plastic layer is formed on the first barrier layer. An organic light-emitting device layer is formed on the second plastic layer. A thin film encapsulating layer encapsulates the organic light-emitting device layer. The first barrier layer is patterned to correspond to an area where the organic light-emitting device layer is formed.
    Type: Application
    Filed: March 14, 2014
    Publication date: November 27, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: YONG-HWAN PARK, Jae-Seob Lee, Yong-Kwan Kim, Chung Yl
  • Publication number: 20140322888
    Abstract: According to an example embodiment, a variable resistance memory device includes a lower electrode that includes a spacer-shaped first sub lower electrode and a second sub lower electrode covering a curved sidewall of the first sub lower electrode. The second sub lower electrode extends upward to protrude above the top of the first sub lower electrode. The lower electrode includes an upward-tapered shape.
    Type: Application
    Filed: July 10, 2014
    Publication date: October 30, 2014
    Inventors: Sanghyun HONG, Jaekyu LEE, Yong Kwan KIM
  • Publication number: 20140319493
    Abstract: A substrate for a display apparatus includes a barrier layer disposed on a base substrate. The barrier layer includes a silicon oxide layer, and the silicon oxide layer includes a first part and a second part along a thickness direction of the barrier layer. The amount of silicon in the first part is different from the amount of silicon in the second part.
    Type: Application
    Filed: April 28, 2014
    Publication date: October 30, 2014
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jae-Seob LEE, Jin-Gyu KANG, Yong-Kwan KIM, Sang-Ki KIM
  • Patent number: 8804400
    Abstract: According to an example embodiment, a variable resistance memory device includes a lower electrode that includes a spacer-shaped first sub lower electrode and a second sub lower electrode covering a curved sidewall of the first sub lower electrode. The second sub lower electrode extends upward to protrude above the top of the first sub lower electrode. The lower electrode includes an upward-tapered shape.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: August 12, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sanghyun Hong, Jaekyu Lee, Yong Kwan Kim
  • Publication number: 20140217383
    Abstract: A method for manufacturing a flexible display device includes: manufacturing a flexible substrate on a substrate by: forming a first organic layer on the substrate, removing foreign particles formed on the first organic layer and forming a recessed first repair groove in the first organic layer, forming a first inorganic layer on the first organic layer, forming a second organic layer on the first inorganic layer and forming a second inorganic layer on the second organic layer, forming a display for displaying an image on the flexible substrate and removing the substrate from the first organic layer.
    Type: Application
    Filed: February 6, 2014
    Publication date: August 7, 2014
    Inventors: Yong-Hwan PARK, Yong-Kwan KIM, Hyun-Joon KIM, In HUH, Sang-Ki KIM
  • Publication number: 20140160441
    Abstract: An illumination optical system for a beam projector includes: a light source; a color conversion unit having at least one fluorescent substance layer that reflects a light from the light source or converts the light emitted from the light source to a wavelength-converted light; and a dichroic mirror that causes the light emitted from the light source to be incident on the color conversion unit. Lights reflected or emitted by the conversion unit and having different wavelengths are incident on a display panel through the same path. In the illumination optical system, a light emitted from one light source can be processed to produce red, green and blue lights which can be in turn incident on the display panel through the same optical path of the light reflected or emitted by the conversion unit.
    Type: Application
    Filed: August 13, 2013
    Publication date: June 12, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yong-Kwan KIM, Seong-Ha PARK, Yong-Chan KEH, Jung-Kee LEE, Joong-Wan PARK
  • Patent number: 8710479
    Abstract: According to example embodiments, there is provided a semiconductor device including a substrate and an isolation layer structure. The substrate includes an active region having an upper active pattern and a lower active pattern on the upper active pattern. The active region has a first aspect ratio larger than about 13:1 and a second aspect ratio smaller than about 13:1. The first aspect ratio is defined as a ratio of a sum of heights of the upper active pattern and the lower active pattern with respect to a width of the upper active pattern. The second aspect ratio is defined as a ratio of the sum of the heights of the upper active pattern and the lower active pattern with respect to a width of the lower active pattern. The isolation layer structure is adjacent to the active region.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: April 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Won Kim, Yong-Kwan Kim
  • Publication number: 20140054721
    Abstract: A semiconductor device, and a method of fabricating the same, include a substrate including two-dimensionally arranged active portions, device isolation patterns extending along sidewalls of the active portions, each of the device isolation patterns including first and second device isolation patterns, gate patterns extending across the active portions and the device isolation patterns, each of the gate patterns including a gate insulating layer, a gate line and a gate capping pattern, and ohmic patterns on the active portions, respectively. Top surfaces of the first device isolation pattern and the gate insulating layer may be lower than those of the second device isolation pattern and the gate capping pattern, respectively, and the ohmic patterns may include an extending portion on the first insulating layer.
    Type: Application
    Filed: July 23, 2013
    Publication date: February 27, 2014
    Inventors: Ki-hyung NAM, Pulunsol CHO, Yong Kwan KIM
  • Patent number: 8642155
    Abstract: Provided is an information storage medium using nanocrystal particles, a method of manufacturing the information storage medium, and an information storage apparatus including the information storage medium. The information storage medium includes a conductive layer, a first insulating layer formed on the conductive layer, a nanocrystal layer that is formed on the first insulating layer and includes conductive nanocrystal particles that can trap charges, and a second insulating layer formed on the nanocrystal layer.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: February 4, 2014
    Assignee: Seagate Technology LLC
    Inventors: Seung-bum Hong, Simon Buehlmann, Shin-ae Jun, Sung-hoond Choa, Eun-joo Jang, Yong-kwan Kim
  • Publication number: 20140021551
    Abstract: Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes active portions defined in a semiconductor substrate, a device isolation pattern in a trench formed between the active portions, a gate electrode in a gate recess region crossing the active portions and the device isolation pattern, a gate dielectric layer between the gate electrode and an inner surface of the gate recess region, and a first ohmic pattern and a second ohmic pattern on each of the active portions at both sides of the gate electrode, respectively. The first and second ohmic patterns include a metal-semiconductor compound, and a top surface of the device isolation pattern at both sides of the gate recess region is recessed to be lower than a level of a top surface of the semiconductor substrate.
    Type: Application
    Filed: July 16, 2013
    Publication date: January 23, 2014
    Inventors: Ki-hyung NAM, Yong Kwan KIM, Chan Ho PARK, Pulunsol CHO
  • Patent number: 8633654
    Abstract: A light source driving apparatus is disclosed which includes a power supply including a power supply terminal connected to a first path through which a power source is supplied to a light source and including a feedback terminal for receiving a feedback of the power source supplied to the light source, a feedback resistor connected to the feedback terminal, and a current divider for branching a current flowing into the first path and supplying the branched current to the feedback resistor.
    Type: Grant
    Filed: March 15, 2010
    Date of Patent: January 21, 2014
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Yong-Chan Keh, Byeong-Hoon Park, Yong-Kwan Kim
  • Patent number: 8629494
    Abstract: A data storing device may include a substrate, transistors on the substrate that include gate line structures, and conductive isolation patterns defining active regions of the transistors. Each conductive isolation pattern includes at least one portion buried in the substrate and the conductive isolation patterns are electrically connected with each other.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: January 14, 2014
    Assignee: Samsung Electronics Co Ltd.
    Inventors: Yong Kwan Kim, Youngnam Hwang
  • Publication number: 20130221306
    Abstract: A variable resistive memory device capable of reducing contact resistance by including a contact layer having low contact resistance, the variable resistive memory device including a substrate comprising an active region; a gate line on the substrate; a first contact layer electrically connected to the active region; a memory cell contact plug electrically connected to the first contact layer; and a variable resistive memory cell electrically connected to the memory cell contact plug, wherein the first contact layer has less contact resistance with respect to the active region than the memory cell contact plug.
    Type: Application
    Filed: January 30, 2013
    Publication date: August 29, 2013
    Inventors: Ki-hyung NAM, Yong-kwan KIM, Ho-joong LEE, Pulunsol CHO
  • Publication number: 20130126814
    Abstract: According to example embodiments, there is provided a semiconductor device including a substrate and an isolation layer structure. The substrate includes an active region having an upper active pattern and a lower active pattern on the upper active pattern. The active region has a first aspect ratio larger than about 13:1 and a second aspect ratio smaller than about 13:1. The first aspect ratio is defined as a ratio of a sum of heights of the upper active pattern and the lower active pattern with respect to a width of the upper active pattern. The second aspect ratio is defined as a ratio of the sum of the heights of the upper active pattern and the lower active pattern with respect to a width of the lower active pattern. The isolation layer structure is adjacent to the active region.
    Type: Application
    Filed: July 9, 2012
    Publication date: May 23, 2013
    Inventors: Dae-Won Kim, Yong-Kwan Kim
  • Publication number: 20130044295
    Abstract: A projector for projecting out lights forming an image on an external screen includes at least one light source configured to output a light; a display unit having a plurality of pixel elements and configured to form an image by controlling the pixel elements according to a driving signal; an illumination optical system having at least one lens and mirror arranged on a first optical axis, and configured to output the light output from the light source to the display unit through the mirror; and a projection optical system having at least one lens arranged on a second optical axis intersecting the first optical axis, and configured to externally output the light output from the display unit. A preset offset is provided between the second optical axis of the projection optical system and the central axis of the display unit.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 21, 2013
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seong-Ha PARK, Yong-Kwan Kim, Dong-Hi Lee
  • Publication number: 20130043530
    Abstract: A data storing device may include a substrate, transistors on the substrate that include gate line structures, and conductive isolation patterns defining active regions of the transistors. Each conductive isolation pattern includes at least one portion buried in the substrate and the conductive isolation patterns are electrically connected with each other.
    Type: Application
    Filed: August 14, 2012
    Publication date: February 21, 2013
    Inventors: Yong Kwan KIM, Youngnam HWANG
  • Publication number: 20120294065
    Abstract: According to an example embodiment, a variable resistance memory device includes a lower electrode that includes a spacer-shaped first sub lower electrode and a second sub lower electrode covering a curved sidewall of the first sub lower electrode. The second sub lower electrode extends upward to protrude above the top of the first sub lower electrode. The lower electrode includes an upward-tapered shape.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 22, 2012
    Inventors: Sanghyun Hong, Jaekyu Lee, Yong Kwan Kim
  • Publication number: 20120294137
    Abstract: An apparatus can include a read head formed in a semiconductor layer of an air bearing surface, the read head comprising a channel region formed between a source and drain which are doped to a higher conductivity than the channel region; wherein the channel region is configured to generate a charge carrier depletion region in response to a first ferroelectric dipole direction, and to accumulate charge carriers in response to a second ferroelectric dipole direction.
    Type: Application
    Filed: July 25, 2012
    Publication date: November 22, 2012
    Applicant: SEAGATE TECHNNOLOGY INTERNATIONAL
    Inventors: Seung-bum HONG, Sung-hoon CHOA, Ju-hwan JUNG, Hyoung-soo KO, Yong Kwan KIM
  • Publication number: 20120267703
    Abstract: Provided is an information storage medium using nanocrystal particles, a method of manufacturing the information storage medium, and an information storage apparatus including the information storage medium. The information storage medium includes a conductive layer, a first insulating layer formed on the conductive layer, a nanocrystal layer that is formed on the first insulating layer and includes conductive nanocrystal particles that can trap charges, and a second insulating layer formed on the nanocrystal layer.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 25, 2012
    Applicant: Seagate Technology LLC
    Inventors: Seung-bum Hong, Simon Buehlmann, Shin-ae Jun, Sung-hoon Choa, Eun-joo Jang, Yong-kwan Kim