Abstract: A liquid crystal display having an outer layer such as a thin-film transistor layer and an inner layer such as a color filter layer may be mounted in a metal device housing. Transparent conductive coating material may be formed on display layers. The transparent conductive coating material may include a layer on the upper surface of the thin-film transistor layer, a layer on the lower surface of the color filter layer, and an edge coating that extends between the upper surface layer and lower surface layer. Electrostatic discharge protection structures for the display may include a conductive elastomeric gasket that couples the upper surface layer to an inner surface of the housing, a conductive tape that couples the lower surface layer to the inner surface, and a conductive material on the inner surface that contacts the edge coating.

Abstract: Display backplanes and pixel element structures are described. In an embodiment, a pixel electrode is located between two stacked data lines, with a left edge of the pixel electrode being separated from a first lower data line by approximately a same distance as a right edge of the pixel electrode is separated from a second lower data line.

Abstract: A semiconductor device may include a linear gate trench that crosses an active region of a substrate of the semiconductor device. The active region may include a plurality of gate areas at a bottom of the gate trench and junction areas at a surface of the substrate in a central portion and opposite end portions of the active region. A conductive line may be in a lower portion of the gate trench. The conductive line may include a gate line and a capping layer that at least partially isolates the gate line from an upper surface of the conductive line. A sealing line may be in an upper portion of the gate trench. The sealing line may cover the conductive line and a surface of the sealing line may be coplanar with the junction areas.

Abstract: In a method of manufacturing a semiconductor device, sacrificial layer patterns extending in a first direction are formed on an etch target layer. Preliminary mask patterns are formed on opposite sidewall surfaces of each of the sacrificial layer patterns. A filling layer is formed to fill a space between the preliminary mask patterns. Upper portions of the preliminary mask patterns are etched to form a plurality of mask patterns. Each of the mask patterns is symmetric with respect to a plane passing a center point of each of the mask patterns in a second direction substantially perpendicular to the first direction and extending in the first direction. The sacrificial layer patterns and the filling layer are removed. The etch target layer is etched using the mask patterns as an etching mask to form a plurality of target layer patterns.

Abstract: A method of fabricating a semiconductor device includes forming a mold structure including a lower support layer and an upper support layer sequentially stacked on a substrate, doping portions of the upper and lower support layers with impurities to divide each of the upper and lower support layers into first portions doped with the impurities and a second portion surrounding the first portions in a plan view, and removing the first portions of the upper and lower support layers to form an upper support pattern having first openings and a lower support pattern having second openings.

Abstract: A semiconductor device includes a substrate including a plurality of active areas. A conductive pattern is in contact with an active area. First and second conductive line structures face first and second side walls of the conductive pattern. An air spacer is disposed between the first and second side walls. The first and second conductive line structures include a conductive line and a conductive line mask layer. The conductive line mask layer includes a lower portion having a first width and an upper portion having a second width narrower than the first width. The air spacer includes a first air spacer disposed on a side wall of the lower portion of the conductive line mask layer and a second air spacer disposed on a side wall of the upper portion of the conductive line mask layer. The second air spacer is connected with the first air spacer.

Abstract: According to some embodiments, a semiconductor device may include gate structures on a substrate; first and second impurity regions formed in the substrate and at both sides of each of the gate structures; conductive line structures provided to cross the gate structures and connected to the first impurity regions; and contact plugs connected to the second impurity regions, respectively. For each of the conductive line structures, the semiconductor device may include a first air spacer provided on a sidewall of the conductive line structure; a first material spacer provided between the conductive line structure and the first air spacer; and an insulating pattern provided on the air spacer. The insulating pattern may include a first portion and a second portion, and the second portion may have a depth greater than that of the first portion and defines a top surface of the air spacer.

Abstract: In a method of forming active patterns, first patterns are formed in a first direction on a cell region of a substrate, and a second pattern is formed on a peripheral circuit region of the substrate. The first pattern extends in a third direction crossing the first direction. First masks are formed in the first direction on the first patterns, and a second mask is formed on the second pattern. The first mask extends in a fourth direction crossing the third direction. Third masks are formed between the first masks extending in the fourth direction. The first and second patterns are etched using the first to third masks to form third and fourth patterns. Upper portions of the substrate are etched using the third and fourth patterns to form first and second active patterns in the cell and peripheral circuit regions.

Abstract: A liquid crystal display may have a thin-film transistor layer with an array of pixel electrode structures for applying electric fields to a liquid crystal layer. The liquid crystal display may also have a color filter layer with an array of color filter elements. The color filter elements may allow the display to display color images. The color filter layer may be interposed between the thin-film transistor layer and a backlight. The liquid crystal layer may be sandwiched between the thin-film transistor layer and the color filter layer. The color filter layer may have a transparent substrate on which the color filter elements are formed. Black masking structures may be formed on a transparent overcoat layer that covers the color filter elements. Black column spacers may be formed from the same layer of material that forms the black masking structures.

Abstract: A projector includes a light source that emits a light beam, an illumination lens unit, a display device, a projection lens unit, a field lens, and a reflection member. The illumination lens unit shapes and focuses the light beam into an illumination light beam. The display device modulates the illumination light beam and forms an image. The projection lens unit projects the image on a screen. The field lens has a positive refractive power for focusing the illumination light beam on the display device, a first lens surface on which the illumination light beam is incident, and a second lens surface on which the image formed by the display device is incident. The reflection member changes an illumination light beam path into a direction of the field lens. The first lens surface reflects a portion of the illumination light beam into a path that avoids the projection lens unit.

Abstract: A touch screen having layers. The touch screen can include a substrate upon which the layers of the touch screen are disposed, and a touch region including a touch pixel electrode, a first display sub-pixel and a second display sub-pixel. The touch screen can also include a sense connection coupled to touch sensing circuitry. An intermediate connection can be disposed between the touch pixel electrode and the sense connection, and can be coupled to the sense connection at the first display sub-pixel and the touch pixel electrode at the second display sub-pixel. In some examples, the sense connection can be disposed at least partially underneath a structure in the first display sub-pixel, such as a data line. In some examples, the intermediate connection can be comprised of a same material type as a structure in the first display sub-pixel, such as a gate line material.

Abstract: Provided is a memory device. The memory device includes a substrate including a cell area and a peripheral area; gate line stacks and bit line stacks configured to vertically cross in the cell area; buried contacts disposed in areas, which are simultaneously shared by neighboring gate line stacks and neighboring bit line stacks; expanded landing pads including expanded portions connected to the buried contacts and expanded over adjacent bit line stacks, and disposed in a row; landing pads spaced apart from the expanded landing pads as a column, connected to the buried contacts, and having horizontal widths smaller than those of the expanded landing pads; and first storage nodes connected to the expanded portions of the expanded landing pads, and second storage nodes connected to the landing pads.

Abstract: In a method of forming active patterns, first patterns are formed in a first direction on a cell region of a substrate, and a second pattern is formed on a peripheral circuit region of the substrate. The first pattern extends in a third direction crossing the first direction. First masks are formed in the first direction on the first patterns, and a second mask is formed on the second pattern. The first mask extends in a fourth direction crossing the third direction. Third masks are formed between the first masks extending in the fourth direction. The first and second patterns are etched using the first to third masks to form third and fourth patterns. Upper portions of the substrate are etched using the third and fourth patterns to form first and second active patterns in the cell and peripheral circuit regions.

Abstract: A substrate for a display apparatus includes a barrier layer disposed on a base substrate. The barrier layer includes a silicon oxide layer, and the silicon oxide layer includes a first part and a second part along a thickness direction of the barrier layer. The amount of silicon in the first part is different from the amount of silicon in the second part.

Abstract: A semiconductor device, including an active region defined in a semiconductor substrate; a first contact plug on the semiconductor substrate, the first contact plug being connected to the active region; a bit line on the semiconductor substrate, the bit line being adjacent to the first contact plug; a first air gap spacer between the first contact plug and the bit line; a landing pad on the first contact plug; a blocking insulating layer on the bit line; and an air gap capping layer on the first air gap spacer, the air gap capping layer vertically overlapping the first air gap spacer, the air gap capping layer being between the blocking insulating layer and the landing pad, an upper surface of the blocking insulating layer being at a height equal to or higher than an upper surface of the landing pad.

Abstract: A display may have a liquid crystal layer sandwiched between a thin-film transistor layer and a color filter layer. An upper polarizer may be placed on top of the thin-film transistor layer. A lower polarizer may be placed under the color filter layer. Components may be bonded to bond pads on the inner surface of the thin-film transistor layer using anisotropic conductive film. Bond quality may be assessed by probing probe pads that are coupled to the bond pads or by visually inspecting the bond pads through the thin-film transistor layer. Opaque masking material in the inactive area may be provided with openings to accommodate the bond pads. Additional opaque masking material may be placed on the underside of the upper polarizer and on the upper surface of the thin-film transistor layer to block the openings from view following visual inspection.

Abstract: An illumination optical system for a beam projector includes: a light source; a color conversion unit having at least one fluorescent substance layer that reflects a light from the light source or converts the light emitted from the light source to a wavelength-converted light; and a dichroic mirror that causes the light emitted from the light source to be incident on the color conversion unit. Lights reflected or emitted by the conversion unit and having different wavelengths are incident on a display panel through the same path. In the illumination optical system, a light emitted from one light source can be processed to produce red, green and blue lights which can be in turn incident on the display panel through the same optical path of the light reflected or emitted by the conversion unit.

Abstract: An organic light-emitting display apparatus includes a flexible substrate. The organic light-emitting display apparatus includes a first plastic layer. A first barrier layer is formed on the first plastic layer. A second plastic layer is formed on the first barrier layer. An organic light-emitting device layer is formed on the second plastic layer. A thin film encapsulating layer encapsulates the organic light-emitting device layer. The first barrier layer is patterned to correspond to an area where the organic light-emitting device layer is formed.

Abstract: A method of manufacturing a substrate for a display device includes forming a first organic layer on a base substrate; forming an inorganic layer on the first organic layer; and forming a second organic layer on the inorganic layer, where the second organic layer includes transition metal particles.

Abstract: Provided are a magnetic memory device and a method of fabricating the same. The device may include a cell selection device, a magnetic tunnel junction (MTJ), and a lower electrode connecting them. The lower electrode may include a vertical portion and a horizontal portion laterally extending from a side surface of the vertical portion. In the lower electrode, the vertical portion has a top surface higher than the horizontal portion and has a top surface including at least two parallel sides and other side at an angle thereto. The MTJ may be provided on the vertical portion of the lower electrode.