Patents by Inventor Yong-Kyu Kim
Yong-Kyu Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090184783Abstract: A resonant structure is provided, including a first terminal, a second terminal which faces the first terminal, a wire unit which connects the first terminal and the second terminal, a third terminal which is spaced apart at a certain distance from the wire unit and which resonates the wire unit, and a potential barrier unit which is formed on the wire unit and which provides a negative resistance component. Accordingly, transduction efficiency can be enhanced.Type: ApplicationFiled: January 22, 2009Publication date: July 23, 2009Applicants: SAMSUNG ELECTRONICS CO., LTD., KOREA UNIVERSITY INDUSTRIAL AND ACADEMIC COLLABORATION FOUNDATIONInventors: Yun-kwon Park, Sung-Woo Hwang, Jea-Shik Shin, Byeoung-Ju Ha, Jae-Sung Rieh, In-Sang Song, Yong-Kyu Kim, Byeong-Kwon Ju, Hee-Tae Kim
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Publication number: 20090017595Abstract: A reliable gap-filling process is performed in the manufacturing of a semiconductor device. An apparatus for performing the gap-filling process includes a chamber in which a wafer chuck is disposed, a plasma generator for generating plasma used to etch the wafer, an end-point detection unit for detecting the point at which the etching of the wafer is to be terminated, and a controller connected to the end-point detection unit. The end-point detection unit monitors the structure being etched at a region outside the opening that is to be filled, and generates in real time data representative of the layer that is being etched. As soon as an underlying layer is exposed and begins to be etched, an end-point detection signal is generated and the etching process is terminated. In the case in which the layer being etched is an oxide layer, a uniform etching is achieved despite any irregularity that exists in the thickness to which the oxide layer is formed.Type: ApplicationFiled: September 18, 2008Publication date: January 15, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yong-kyu Kim, Jin-ho Jeon, Kyoung-soo Kwon
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Patent number: 7446367Abstract: A reliable gap-filling process is performed in the manufacturing of a semiconductor device. An apparatus for performing the gap-filling process includes a chamber in which a wafer chuck is disposed, a plasma generator for generating plasma used to etch the wafer, an end-point detection unit for detecting the point at which the etching of the wafer is to be terminated, and a controller connected to the end-point detection unit. The end-point detection unit monitors the structure being etched at a region outside the opening that is to be filled, and generates in real time data representative of the layer that is being etched. As soon as an underlying layer is exposed and begins to be etched, an end-point detection signal is generated and the etching process is terminated. In the case in which the layer being etched is an oxide layer, a uniform etching is achieved despite any irregularity that exists in the thickness to which the oxide layer is formed.Type: GrantFiled: May 30, 2006Date of Patent: November 4, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-kyu Kim, Jin-ho Jeon, Kyoung-soo Kwon
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Publication number: 20080234014Abstract: A sliding-type portable terminal is provided. The portable terminal includes a first housing, a first guide member fixed to the first housing, a slide member coupled to the first guide member while facing the first guide member, the slide member being adapted to slide in a first direction under guidance of the first guide member, a second guide member fixed to the slide member, a second housing having a guide recess extending in a second direction so as to receive the second guide member, the second housing being coupled to the second guide member so as to slide in the second direction under guidance of the second guide member and an elastic member having a first end supported on the first guide member and a second end supported on the second housing so as to provide elastic force in such a direction that the first and second ends move away from each other. The sliding-type portable terminal is adapted for convenient use of not only mobile communication services, but also multimedia services.Type: ApplicationFiled: March 7, 2008Publication date: September 25, 2008Applicant: SAMSUNG ELECTRONICS CO. LTD.Inventors: Yong-Kyu KIM, Jae-Gab LEE
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Publication number: 20080175088Abstract: The present invention provides a power voltage supplier for stably supplying a noise-free power voltage without increasing a size of a reservoir capacitor by employing a sharing scheme of the reservoir capacitor. The power voltage supplier of a semiconductor memory device includes: a first power voltage supply line for supplying a first power voltage; a second power voltage supply line for supplying a second power voltage; a first reservoir capacitor for supplying the first and the second power voltages stably; and a reservoir capacitor controller for selectively connecting the first reservoir capacitor to the first power voltage supply line or the second power voltage supply line.Type: ApplicationFiled: February 5, 2008Publication date: July 24, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Jun-Gi Choi, Yong-Kyu Kim
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Patent number: 7349282Abstract: The present invention provides a power voltage supplier for stably supplying a noise-free power voltage without increasing a size of a reservoir capacitor by employing a sharing scheme of the reservoir capacitor. The power voltage supplier of a semiconductor memory device includes: a first power voltage supply line for supplying a first power voltage; a second power voltage supply line for supplying a second power voltage; a first reservoir capacitor for supplying the first and the second power voltages stably; and a reservoir capacitor controller for selectively connecting the first reservoir capacitor to the first power voltage supply line or the second power voltage supply line.Type: GrantFiled: December 27, 2004Date of Patent: March 25, 2008Assignee: Hynix Semiconductor Inc.Inventors: Jun-Gi Choi, Yong-Kyu Kim
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Patent number: 7304531Abstract: Provided is an internal voltage generator for preventing an occurrence of leakage current while a charge pumping is not performed. The internal voltage generator includes: a charge pumping unit for pumping an external voltage to generate a high voltage higher than the external voltage; a level detecting unit for detecting a level drop of the high voltage with respect to a reference voltage and outputting a detection signal; an oscillating unit for generating an oscillation signal in response to the detection signal; a pumping control signal generating unit for controlling a driving of the charge pumping unit in response to the oscillation signal; and a charge pump controlling unit for precharging the charge pumping unit in response to the detection signal.Type: GrantFiled: July 12, 2005Date of Patent: December 4, 2007Assignee: Hynix Semiconductor Inc.Inventor: Yong-Kyu Kim
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Patent number: 7282986Abstract: The present invention is related to a negative voltage generating circuit for reliably providing the semiconductor integrated circuit (IC) with a negative voltage. An electric charge pumping device generates a negative voltage by pumping an electric charge to a predetermined level supplied to one of a first node and a second node. A controlling device provides first and second pumping clock signal being clocked alternately every predetermined interval in response to a level of the negative voltage. A pumping controller controls an amount of electric charge supplied to the first node and the second node in response to the first and second pumping clock signals. Further, a reset controller resets the first node and the second node of the electric charge pumping means as the level of the negative voltage when the first and second pumping clock signals are inactivated.Type: GrantFiled: July 27, 2005Date of Patent: October 16, 2007Assignee: Hynix Semiconductor, Ltd.Inventors: Sang-Hee Kang, Jun-Gi Choi, Yong-Kyu Kim
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Patent number: 7184331Abstract: A semiconductor memory device including a fuse control circuit for providing with a plurality of fail word line addresses written in its own circuit in advance and outputting a redundancy signal representing that an input address is the same as one of the fail word line addresses, and a normal word line interruption signal, a redundancy word line controller for inputting the redundancy signal and activating a designated redundancy word line; and a normal word line controller, for activating a word line corresponding to the input word line address, which is operated or interrupted in response to the normal word line interruption signal, wherein the normal word line interruption signal has a first logic state (logic low) at a pre-charge interval or when a same address as one of the fail word line addresses is inputted, and has a second logic state (logic high) when a normal address is inputted, and the redundancy signal has a first logic state (logic low) when a same address as one of the fail word line addressType: GrantFiled: June 30, 2005Date of Patent: February 27, 2007Assignee: Hynix Semiconductor Inc.Inventors: Yong-Kyu Kim, Sang-Hee Kang
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Patent number: 7174140Abstract: An RF system integrated with an RF switching unit and an RF modulator unit.Type: GrantFiled: April 30, 2004Date of Patent: February 6, 2007Assignee: LG Innotek Co., LtdInventors: Duck Su Oh, Yong Kyu Kim
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Publication number: 20070026630Abstract: A reliable gap-filling process is performed in the manufacturing of a semiconductor device. An apparatus for performing the gap-filling process includes a chamber in which a wafer chuck is disposed, a plasma generator for generating plasma used to etch the wafer, an end-point detection unit for detecting the point at which the etching of the wafer is to be terminated, and a controller connected to the end-point detection unit. The end-point detection unit monitors the structure being etched at a region outside the opening that is to be filled, and generates in real time data representative of the layer that is being etched. As soon as an underlying layer is exposed and begins to be etched, an end-point detection signal is generated and the etching process is terminated. In the case in which the layer being etched is an oxide layer, a uniform etching is achieved despite any irregularity that exists in the thickness to which the oxide layer is formed.Type: ApplicationFiled: May 30, 2006Publication date: February 1, 2007Inventors: Yong-kyu Kim, Jin-ho Jeon, Kyoung-soo Kwon
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Publication number: 20060278428Abstract: A portable terminal includes a first housing, a second housing, and a sliding module. The second housing is slidably connected to the first housing such that the second housing slides longitudinally on the first housing to open or close a face of the first housing. The sliding module is interposed between the first housing and the second housing to slidably combine the second housing to the first housing. The sliding module includes a pair of guide rods and a guide plate. The guide rods are mounted spaced apart on the rear face of the second housing along a sliding direction of the second housing. The guide plate is fixed to a face of the first housing. The guide plate is slidably connected to the guide rods.Type: ApplicationFiled: March 15, 2006Publication date: December 14, 2006Inventor: Yong-Kyu Kim
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Patent number: 7149131Abstract: A semiconductor memory device reduces power consumption with maintaining quality of an internal power voltage and a core voltage. The semiconductor memory device reduces power consumption with sufficiently maintaining a core voltage during precharge.Type: GrantFiled: December 30, 2004Date of Patent: December 12, 2006Assignee: Hynix Semiconductor Inc.Inventors: Jun-Gi Choi, Yong-Kyu Kim
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Publication number: 20060220729Abstract: Provided is an internal voltage generator for preventing an occurrence of leakage current while a charge pumping is not performed. The internal voltage generator includes: a charge pumping unit for pumping an external voltage to generate a high voltage higher than the external voltage; a level detecting unit for detecting a level drop of the high voltage with respect to a reference voltage and outputting a detection signal; an oscillating unit for generating an oscillation signal in response to the detection signal; a pumping control signal generating unit for controlling a driving of the charge pumping unit in response to the oscillation signal; and a charge pump controlling unit for precharging the charge pumping unit in response to the detection signal.Type: ApplicationFiled: July 12, 2005Publication date: October 5, 2006Inventor: Yong-Kyu Kim
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Publication number: 20060097773Abstract: The present invention is related to a negative voltage generating circuit for reliably providing the semiconductor integrated circuit (IC) with a negative voltage. An electric charge pumping device generates a negative voltage by pumping an electric charge to a predetermined level supplied to one of a first node and a second node. A controlling device provides first and second pumping clock signal being clocked alternately every predetermined interval in response to a level of the negative voltage. A pumping controller controls an amount of electric charge supplied to the first node and the second node in response to the first and second pumping clock signals. Further, a reset controller resets the first node and the second node of the electric charge pumping means as the level of the negative voltage when the first and second pumping clock signals are inactivated.Type: ApplicationFiled: July 27, 2005Publication date: May 11, 2006Inventors: Sang-Hee Kang, Jun-Gi Choi, Yong-Kyu Kim
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Publication number: 20060092743Abstract: A semiconductor memory device reduces power consumption with maintaining quality of an internal power voltage and a core voltage. The semiconductor memory device reduces power consumption with sufficiently maintaining a core voltage during precharge.Type: ApplicationFiled: December 30, 2004Publication date: May 4, 2006Applicant: Hynix Semiconductor, Inc.Inventors: Jun-Gi Choi, Yong-Kyu Kim
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Publication number: 20060050589Abstract: The present invention provides a power voltage supplier for stably supplying a noise-free power voltage without increasing a size of a reservoir capacitor by employing a sharing scheme of the reservoir capacitor. The power voltage supplier of a semiconductor memory device includes: a first power voltage supply line for supplying a first power voltage; a second power voltage supply line for supplying a second power voltage; a first reservoir capacitor for supplying the first and the second power voltages stably; and a reservoir capacitor controller for selectively connecting the first reservoir capacitor to the first power voltage supply line or the second power voltage supply line.Type: ApplicationFiled: December 27, 2004Publication date: March 9, 2006Applicant: Hynix Semiconductor, Inc.Inventors: Jun-Gi Choi, Yong-Kyu Kim
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Publication number: 20050237830Abstract: There is provided a semiconductor memory device comprising a fuse control circuit for providing with a plurality of fail word line addresses written in its own circuit in advance and outputting a redundancy signal representing that an input address is the same as one of the fail word line addresses, and a normal word line interruption signal, a redundancy word line controller for inputting the redundancy signal and activating a designated redundancy word line; and a normal word line controller, for activating a word line corresponding to the input word line address, which is operated or interrupted in response to the normal word line interruption signal, wherein the normal word line interruption signal has a first logic state (logic low) at a pre-charge interval or when a same address as one of the fail word line addresses is inputted, and has a second logic state (logic high) when a normal address is inputted, and the redundancy signal has a first logic state (logic low) when a same address as one of the faiType: ApplicationFiled: June 30, 2005Publication date: October 27, 2005Inventors: Yong-Kyu Kim, Sang-Hee Kang
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Publication number: 20040203546Abstract: An RF system integrated with an RF switching unit and an RF modulator unit.Type: ApplicationFiled: April 30, 2004Publication date: October 14, 2004Inventors: Duck Su Oh, Yong Kyu Kim
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Patent number: 5533138Abstract: Television images to be digitally recorded are divided into blocks and the discrete cosine transform DCT of each block is taken. The DC coefficient of each DCT block is scalar-quantized, and its AC coefficients are classified-vector-quantized (CVQ). The square of the value that part or all the AC coefficients among horizontal AC coefficients including a first AC coefficient and vertical AC coefficients including a second AC coefficient, according to the zigzag scanning sequence of DCT block, are subtracted from a representative value of a preset reference class. Using a multilevel compression method, lowest level codes are vector-partitioned by P-units at equal intervals with respect to each classified DCT block, and code books of representative vectors corresponding to the partitioned vectors are provided.Type: GrantFiled: May 9, 1994Date of Patent: July 2, 1996Assignee: SamSung Electronics Co., Ltd.Inventors: Yong-Kyu Kim, Tianmin Liu, Steven T. Jaffe, Christopher H. Strolle