Patents by Inventor Yong Lu

Yong Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12382567
    Abstract: An information handling system may include a processor, at least one visual indicator communicatively coupled to the processor and configured to visually indicate status information associated with the information handling system, and a motion sensor communicatively coupled to the at least one visual indicator and configured to detect for a presence of motion proximate to the information handling system and in the presence of motion proximate to the information handling system, cause the at least one visual indicator to be enabled to illuminate in order to visually indicate the status information.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: August 5, 2025
    Assignee: Dell Products L.P.
    Inventors: Lei Wang, Yong Lu, Rongbin Zhang
  • Patent number: 12376290
    Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate, a word line, and at least two dielectric layers. The word line is arranged in the substrate; the at least two dielectric layers are located between the word line and the substrate and have different dielectric constants.
    Type: Grant
    Filed: January 6, 2023
    Date of Patent: July 29, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yongli Zhao, Zhicheng Shi, Yachao Xu, Yong Lu
  • Publication number: 20250226380
    Abstract: A manufacturing system for an electrode of a battery cell includes a conveyor belt configured to receive a fiberized powder mixture including an active material, a conductive additive, and a binder. A powder dispensing stage is arranged adjacent to the conveyor belt and configured to dispense the fiberized powder mixture. A pre-forming stage is arranged adjacent to the conveyor belt and configured to receive the fiberized powder mixture dispensed by the powder dispensing stage and to press the fiberized powder mixture into a raw active material layer. N calendaring rollers configured to receive the raw active material layer from the conveyor belt and to calendar the raw active material layer to form an active material layer, where N is an integer greater than one. A pair of laminating rollers is configured to laminate the active material layer to a current collector to form an electrode.
    Type: Application
    Filed: February 28, 2024
    Publication date: July 10, 2025
    Inventors: Yong Lu, Meiyuan WU, Ming WANG, Haijing LIU
  • Publication number: 20250226378
    Abstract: A system for manufacturing an electrode for a battery cell includes N?1 pairs of rollers configured to press and calendar dry mixing materials to form an active material layer of the electrode, where N is an integer greater than one. The dry mixing materials include an active material, a conductive filler, and a binder. At least one of the N?1 pairs of rollers includes a first roller operating at a first line speed and a second roller operating at a second line speed different than the first line speed. An Nth pair of rollers including a third roller operating at a third line speed and a fourth roller operating at a fourth line speed that is the same as the third line speed to laminate the active material layer to a current collector.
    Type: Application
    Filed: February 27, 2024
    Publication date: July 10, 2025
    Inventors: Yong LU, Meiyuan WU, Dewen KONG, Haijing LIU
  • Patent number: 12356607
    Abstract: The present disclosure provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes a substrate and a word line (WL) structure, wherein the substrate includes trenches arranged in parallel intervals; the WL structure is located in the trenches, and includes a dielectric layer and a conductive layer; the dielectric layer covers a bottom surface and a sidewall of the conductive layer; the conductive layer includes a first conductive layer and a second conductive layer; and a first component is doped in the second conductive layer.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: July 8, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Renhu Li, Ming-Hung Hsieh, Yong Lu, Zhicheng Shi
  • Patent number: 12355049
    Abstract: The present disclosure provides a solid-state battery including at least one current collector that is in communication with one or more switches configured to move between open and closed positions, where the open position corresponds to a first operational state of the solid-state battery and the closed position corresponds to a second operational state of the solid-state battery; one or more electrodes disposed adjacent to the one or more current collectors; and one or more electrothermal material foils including a resistor material that is in electrical communication with that at least one current collector, where in the first operational state electrons may flow through the one or more electrothermal material foils during cycling of the solid-state battery so as to initiate a heating mode, and in the second operational state electrons may flow through the current collector during cycling of the solid-state battery so as to initiate a non-heating mode.
    Type: Grant
    Filed: March 1, 2022
    Date of Patent: July 8, 2025
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Zhe Li, Xiaochao Que, Haijing Liu, Yong Lu, Meiyuan Wu, Jingyuan Liu
  • Publication number: 20250220571
    Abstract: This disclosure describes a network management system configured to determine, for each AP of the plurality of APs and based on received signal strength indicators (RSSIs) of each AP of the plurality of APs, one or more strong neighbors of each AP. compute an AP redundancy score for each AP of the plurality of APs indicative of a redundancy of each AP; compute, based on the AP redundancy scores, at least one of: a switch redundancy score for each network switch associated with one or more of the plurality of APs, wherein the switch redundancy score is indicative of a redundancy of each network switch, or a site redundancy score, wherein the site redundancy score is indicative of an overall redundancy of the network site; and invoke, based on the AP redundancy scores, the switch redundancy score, or the site redundancy score, one or more actions.
    Type: Application
    Filed: December 5, 2024
    Publication date: July 3, 2025
    Inventors: Gaurav Kumar, Yong Lu, Daniel Wei Wei Chu, Wenfeng Wang, Jacob Thomas, Trishna Govind Belgal, Randall W. Frei, Vinod Peris
  • Patent number: 12347295
    Abstract: A method and device for smoke or fire recognition, a computer device and a storage medium are disclosed. The method includes: acquiring a to-be-recognized image in a smoke or fire monitoring region; recognizing a smoke or fire suspected region in the to-be-recognized image according to the to-be-recognized image, including recognizing a smoke or fire suspected region in a visible light image on the basis of colors, and recognizing a smoke or fire suspected region in an infrared image on the basis of brightness; and inputting the to-be-recognized image including the smoke or fire suspected region into a preset model, and recognizing a smoke or fire state in the to-be-recognized image according to an output result of the preset model, the preset model being obtained by training based on the visible light image pre-marked with a smoke or fire state or the infrared image pre-marked with a smoke or fire state.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: July 1, 2025
    Assignee: CSG POWER GENERATION CO., LTD.
    Inventors: Liqun Sun, Man Chen, Hao Zhang, Yong Lu, Tao Liu, Ming Xu, Jianhui Li, Miaogeng Wang, Zhipeng Lv, Kai Lin, Yulin Han, Yu Gong, Haifeng Guo, Xiaoyi Wang, Hanlong Wang, Rufei He
  • Publication number: 20250210621
    Abstract: A method for manufacturing a battery cell includes providing an anode electrode including a nonplanar silicon film arranged on an anode current collector; immersing the anode electrode in a solution comprising lithium metal, an arene, and an organic solvent for a predetermined period to form a pre-lithiation coating on the nonplanar silicon film; and heating the anode electrode to remove the organic solvent and the arene after the predetermined period.
    Type: Application
    Filed: February 6, 2024
    Publication date: June 26, 2025
    Inventors: Qili SU, Zhe LI, Yong LU, Haijing LIU, Lijiao QUAN, Lidan XING
  • Publication number: 20250170120
    Abstract: Provided are various Stimulator of Interferon Genes (STING) allosteric modulators as well as methods of making and use thereof. Specifically provided herein are highly active STING inhibitors (antagonists) and activators (agonists). The compounds provide herein may be prepared as pharmaceutical compositions and used in methods of treating conditions related to disrupted or defective STING signaling.
    Type: Application
    Filed: January 31, 2023
    Publication date: May 29, 2025
    Inventors: Yong LU, Liping LI, Jie LI, Xuewu ZHANG, Xiaochen BAI, Chuo CHEN
  • Publication number: 20250174849
    Abstract: A battery cell includes a cathode electrode including a cathode active material layer and a cathode current collector. An anode electrode includes an anode active material layer and an anode current collector. A solid electrolyte layer is arranged between the cathode active material layer and the anode active material layer. The cathode electrode and the anode electrode exchange lithium ions. A clad terminal comprises a first metal layer and a second metal layer and includes a first portion arranged in the solid electrolyte layer and a second portion extending from the solid electrolyte layer.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 29, 2025
    Inventors: Qili SU, Meiyuan WU, Zhe LI, Yong LU, Haijing LIU
  • Publication number: 20250149546
    Abstract: A battery cell includes C cathode electrodes including a cathode active material layer arranged on a cathode current collector, A anode electrodes including an anode active material layer arranged on an anode current collector, and S separators, where A, C and S are integers greater than one. The anode active material layer comprises silicon and a metal that are co-sputtered. The metal is different than the silicon.
    Type: Application
    Filed: May 3, 2024
    Publication date: May 8, 2025
    Inventors: Zhe LI, Qili Su, Yong Lu, Meiyuan Wu, Haijing Liu
  • Publication number: 20250149630
    Abstract: A battery cell includes A anode electrodes, C cathode electrodes, and S separators arranged between the A anode electrodes and the C cathode electrodes, where A, C, and S are integers greater than one. The S separators include a composite gel membrane that is cured in-situ using ultraviolet light and includes a polymer, a solid electrolyte comprising greater than 20 wt % of the composite gel membrane, an initiator, and a liquid electrolyte.
    Type: Application
    Filed: October 14, 2024
    Publication date: May 8, 2025
    Inventors: Yong LU, Zhe Li, Qili Su, Haijing Liu
  • Publication number: 20250149589
    Abstract: A battery cell includes A anode electrodes each including an anode active material layer including anode active material and an anode current collector, C cathode electrodes include a cathode active material layer including cathode active material and a cathode current collector, and S separators, where A, C, and S are integers greater than one. At least one of the anode active material layer of the A anode electrodes, the cathode active material layer of the C cathode electrodes, and the S separators includes a thermoplastic binder.
    Type: Application
    Filed: May 29, 2024
    Publication date: May 8, 2025
    Inventors: Yong LU, Zhe Li, Qili Su, Haijing LIU
  • Patent number: 12284800
    Abstract: A semiconductor structure and a method for manufacturing the semiconductor structure are provided. The semiconductor structure includes a substrate, a trench and a word line. The substrate includes an isolation structure and an active area. The active area includes irons of a first type. The trench is arranged in the active area, an inner surface of the trench includes an inversion doping layer and an oxide layer which are arranged adjacent to each other, and the inversion doping layer is arranged above the oxide layer. The word line is arranged in the trench. The inversion doping layer includes ions of a second type. The first type is contrary to the second type.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: April 22, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Gongyi Wu, Yong Lu, Longyang Chen
  • Patent number: 12283516
    Abstract: A semiconductor device manufacturing method includes: providing a semiconductor substrate, wherein the semiconductor substrate includes an array region and a peripheral region; word line structures and shallow trench isolation structures are formed in the array region, grooves are formed over word line structures, and a shallow trench isolation structure is formed in the peripheral region; depositing at least two insulating layers on a surface of the semiconductor substrate, each of the insulating layer has a different etch rate under a same etching condition; and removing part of the insulating layers located on surfaces of the array region and the peripheral region in sequence, wherein a lower insulating layer in the adjacent insulating layers is an etch stop layer of an upper insulating layer, and keeping all the insulating layers in the grooves located over the word line structures.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 22, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Gongyi Wu, Yong Lu, Youquan Yu
  • Patent number: 12278339
    Abstract: A solid-state battery cell, such as a lithium-ion cell, is assembled with a solid electrolyte layer member positioned between co-extensive surface layers of an anode active layer member and a cathode active material layer member. At least one of the engaging surfaces of the solid electrolyte layer is not flat. It is formed with a topographical pattern comprising recesses in a flat surface, or a surface of projections and recesses, and placed against a compatibly-shaped, mating surface of the anode layer and/or the cathode layer. The re-shaping of the surface(s) of the solid electrolyte layer and adjoining electrode layer(s) is to significantly increase the effective contact area with the facing layer of electrode material and improve the conduction of ions across the interface. A thin film of interlayer material may be placed between the surfaces of the facing cell members with the specially shaped adjacent faces.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: April 15, 2025
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Yong Lu, Zhe Li, Dewen Kong
  • Patent number: 12272788
    Abstract: A method for forming a bipolar solid-state battery includes preparing a mixture of gel precursor solution and solid electrolyte. The gel precursor includes a polymer, a first solvent, and a liquid electrolyte. The liquid electrolyte includes a second solvent, a lithium salt, and electrolyte additive. The method includes loading the mixture onto at least one of a first electrode, a second electrode, and a third electrode. Each of the first, second, and third electrodes includes a plurality of solid-state electroactive particles. The method includes removing at least a portion of the first solvent from the mixture to form a gel and positioning one of the first, second, and third electrodes with respect to another of the first, second, and third electrodes. The method includes applying a polymer blocker to a border of the first, second, or third electrodes.
    Type: Grant
    Filed: December 3, 2021
    Date of Patent: April 8, 2025
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Zhe Li, Meiyuan Wu, Yong Lu, Haijing Liu, Xiaochao Que
  • Patent number: 12266683
    Abstract: A capacitor structure and a method of manufacturing the same, and a memory are provided. The method includes the following operations. A substrate is provided. A first conductive structure with a shape of column is formed on the substrate. A second conductive structure is formed on the substrate. The second conductive structure surrounds the first conductive structure and is spaced with the first conductive structure. The first conductive structure and the second conductive structure together form a bottom electrode. A capacitor dielectric layer is formed. The capacitor dielectric layer covers the surface of the substrate and the surface of the bottom electrode. A top electrode covering the surface of the capacitor dielectric layer is formed.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: April 1, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yong Lu, Gongyi Wu, Hongkun Shen
  • Publication number: 20250095899
    Abstract: A CT energy extraction device is provided. A first accommodation cavity is provided in a first housing, and a second accommodation cavity is provided in a second housing. The first housing can be connected and joined with the second housing to form a ring shape, which is used to be placed on outside of a high-voltage line. A first iron core is disposed in the first accommodation cavity, and an energy-extraction coil is wound around the first iron core. A cable outlet is provided on the first housing, and the energy-extraction coil has pins extending from the cable outlet. A second iron core is disposed in the second accommodation cavity. When the first housing and the second housing are connected and joined, the first and second iron cores are joined to form a closed ring structure. An inflating assembly is provided on the first housing and/or the second housing.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 20, 2025
    Inventors: Xiangyu TAN, Wenyun LI, Guochao QIAN, Lijun TANG, Gang AO, Xiaowei XU, Yong LU, Fangrong ZHOU, Zonghan JIAO, Ming YUAN, Wenbin ZHANG