Patents by Inventor Yong Lu

Yong Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250093390
    Abstract: An apparatus for non-contact current and voltage composite measurement includes: a current signal detection device, a voltage signal detection device, a zero-crossing detection circuit, and a control unit. The current signal detection device generates a current-induced electromotive force based on current flowing on the transmission line to be measured when there is current-voltage passing through the transmission line to be measured; the voltage signal detection device generates a voltage-induced electromotive force based on voltage flowing on the transmission line to be measured when there is current-voltage passing through the transmission line to be measured. The zero-crossing detection circuit performs zero-crossing detection on the current-induced electromotive force and the voltage-induced electromotive force to determine the phase difference between them.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 20, 2025
    Inventors: Xiangyu TAN, Yong LU, Wenyun LI, Yi MA, Lijun TANG, Wenbin ZHANG, Xiaowei XU, Fangrong ZHOU, Xingmei ZHOU
  • Publication number: 20250087415
    Abstract: This application proposes a magnetic coupling coil optimization method. The method comprises: calculating an equivalent magnetic permeability of a magnetic coupling coil based on an air gap length of the magnetic coupling coil; calculating an effective cross-sectional area of the magnetic coupling coil based on the equivalent magnetic permeability and the power of the magnetic coupling coil; calculating a number of turns of the secondary winding of the magnetic coupling coil based on the effective cross-sectional area and the equivalent magnetic permeability; optimizing the magnetic coupling coil based on the number of turns of the secondary winding. The present application can reasonably configure the parameters of the magnetic coupling coil, effectively acquire energy from the power grid to provide stable power for detection or communication equipment in the power grid, and make the magnetic coupling coil more reliable while meeting the power demand.
    Type: Application
    Filed: August 30, 2023
    Publication date: March 13, 2025
    Inventors: Xiangyu TAN, Wenyun LI, Gang AO, Xiaowei XU, Yong LU, Wenbin ZHANG, Shan WANG
  • Publication number: 20250062308
    Abstract: A method of manufacturing an electrode-forming slurry includes mixing together an active material, an electrically conducting material and optionally a solid state electrolyte with a low-polar solvent. The low-polar solvent has a dipole moment of less than 4 and a boiling point greater than 100° C. to form a first slurry, where the active material is an anode active material or a cathode active material. A polymeric binder and an ether-based solvent are mixed to form second slurry. The first slurry and the second slurry are mixed to form the electrode-forming slurry.
    Type: Application
    Filed: October 4, 2023
    Publication date: February 20, 2025
    Inventors: Qili Su, Zhe Li, Yong Lu, Haijing Liu
  • Publication number: 20250062395
    Abstract: An electrolyte for use in an electrochemical cell. The electrolyte includes a first layer having a thickness of about 1 ?m to about 40 ?m and a second layer having a thickness of about 5 ?m to about 60 ?m. The first layer includes, based on a total weight of the first layer, about 10 wt. % to about 40 wt. % of first solid-state electrolyte particles, about 1 wt. % to about 15 wt. % of lithium, and about 1 wt. % to about 65 wt. % of fibrils including carbon and fluorine, The second layer includes second solid-state electrolyte particles.
    Type: Application
    Filed: September 26, 2023
    Publication date: February 20, 2025
    Inventors: Qili Su, Zhe Li, Haijing Liu, Yong Lu, Xiayin Yao, Dingcheng Guo
  • Publication number: 20250062081
    Abstract: A bipolar solid-state battery cell includes a plurality of battery cells, wherein each cell includes a separator, an anode disposed on a first side of the separator and a cathode disposed on a second side of the separator; where the second side is opposedly disposed to the first side. The anode is in electrical communication with an anode current collector and the cathode is in electrical communication with a cathode current collector. A capacitor wall is disposed parallel to at least one external surface of the anode or cathode, where the capacitor wall includes a capacitor active material.
    Type: Application
    Filed: October 4, 2023
    Publication date: February 20, 2025
    Inventors: Yong Lu, Meiyuan Wu, Zhe Li, Qili Su, Haijing Liu
  • Publication number: 20250062320
    Abstract: A solid state battery cell includes an anode, a cathode, and a solid state electrolyte disposed between the anode and the cathode. The anode is a lithium metal composite anode that comprises a lithium metal layer and a metal sulfide. A method of manufacturing a battery cell includes disposing a lithium metal composite anode on an anode current collector, where the lithium metal composite anode comprises a lithium metal layer and a metal sulfide. A solid state electrolyte is then disposed on the lithium metal composite anode. A cathode active layer is disposed on the solid state electrolyte and a cathode current collector is disposed on the cathode active layer.
    Type: Application
    Filed: October 4, 2023
    Publication date: February 20, 2025
    Inventors: Yong Lu, Zhe Li, Qili Su, Haijing Liu
  • Patent number: 12224323
    Abstract: A buried wordline structure fabrication method includes: providing a first trench in a semiconductor substrate, wherein the first trench has a tip on its bottom; performing epitaxial growth within the first trench to reduce the depth of the tip on the bottom of the first trench; and forming a gate dielectric layer on an inner wall of the first trench and filling a gate conductive layer within the first trench to form the buried wordline structure.
    Type: Grant
    Filed: August 21, 2021
    Date of Patent: February 11, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yong Lu, Hongkun Shen
  • Patent number: 12213309
    Abstract: The present disclosure provides a semiconductor device and a manufacturing method thereof. The method for manufacturing a semiconductor device includes: providing a semiconductor substrate, with a plurality of trench isolation structures and a plurality of functional regions between the trench isolation structures being formed; forming a buried bit line structure, the buried bit line structure being formed in the semiconductor substrate; and forming a word line structure and a plurality of active regions, the word line structures and the active regions being formed on a surface of the semiconductor substrate and located above the functional regions.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: January 28, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Gongyi Wu, Yong Lu, Xin Xin
  • Publication number: 20250007457
    Abstract: The present application provides an oscillation wave generating circuit and a construction method. The circuit includes: a high-voltage DC power supply, an energy storage capacitor, a thyristor, an isolation pulse transformer, a pulse control network, an LC resonant circuit, and a low-voltage DC power supply.
    Type: Application
    Filed: August 30, 2023
    Publication date: January 2, 2025
    Inventors: Xiangyu TAN, Xianping ZHAO, Wenyun LI, Guochao QIAN, Yong LU, Lijun TANG, Xiaowei XU, Wenbin ZHANG, Dada WANG, Zonghan JIAO
  • Publication number: 20240407068
    Abstract: An information handling system may include a processor, at least one visual indicator communicatively coupled to the processor and configured to visually indicate status information associated with the information handling system, and a motion sensor communicatively coupled to the at least one visual indicator and configured to detect for a presence of motion proximate to the information handling system and in the presence of motion proximate to the information handling system, cause the at least one visual indicator to be enabled to illuminate in order to visually indicate the status information.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 5, 2024
    Applicant: Dell Products L.P.
    Inventors: Lei WANG, Yong LU, Rongbin ZHANG
  • Publication number: 20240396077
    Abstract: A solid-state battery cell includes an anode electrode comprising an anode current collector, anode active material, a solid electrolyte, and a gel polymer electrolyte. A cathode electrode comprises a cathode current collector, a cathode active material, a solid electrolyte, and the gel polymer electrolyte. A separator layer comprises the gel polymer electrolyte and a solid electrolyte composite including a solid electrolyte coating arranged on an outer surface of an oxide core.
    Type: Application
    Filed: August 4, 2023
    Publication date: November 28, 2024
    Inventors: Zhe LI, Qili SU, Yong LU, Dave G. RICH, Haijing LIU
  • Publication number: 20240385964
    Abstract: The present application belongs to the field of chiplet technologies and discloses a method, device and storage medium for request processing under mixed cacheline granules. The method is applied to a processor, where a level 2 cache and a level 1 cache of the processor are integrated into a processor chiplet, and a level 3 cache of the processor is integrated into a fabric chiplet. The method includes: acquiring a level 1 cacheline granule of the level 1 cache and a level 3 cacheline granule of the level 3 cache; determining a cache working mode according to the level 1 cacheline granule and the level 3 cacheline granule; and receiving request information and processing the request information based on the cache working mode.
    Type: Application
    Filed: May 6, 2024
    Publication date: November 21, 2024
    Applicants: HEXIN Technologies (Suzhou) Co., Ltd., Shanghai HEXIN Digital Technologies Co., Ltd.
    Inventors: Yangfan LIU, Shi SHI, Pengfei GOU, Yong LU, Yue XU
  • Patent number: 12148654
    Abstract: Embodiments of the present application provide a semiconductor structure and its manufacturing method. The method for manufacturing a semiconductor structure includes: providing a substrate and a dielectric layer located on the substrate, the substrate being provided therein with a conductive structure; etching a certain thickness of the dielectric layer to form a first groove; performing an isotropic etching process on the dielectric layer located at the bottom of the first groove to form a second groove, a maximum width of the second groove being greater than a bottom width of the first groove in a direction parallel with a surface of the substrate; and etching the dielectric layer located at the bottom of the second groove to form a third groove exposing the conductive structure.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: November 19, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yong Lu, Minghung Hsieh
  • Publication number: 20240379997
    Abstract: A solid-state battery cell includes a cathode electrode includes a cathode current collector and a cathode active layer arranged on the cathode current collector and including cathode active material and a solid electrolyte. A separator layer comprises the solid electrolyte. An anode layer comprises an anode current collector and a silicon layer arranged on the anode current collector and including a plurality of concave spherical surfaces.
    Type: Application
    Filed: April 12, 2024
    Publication date: November 14, 2024
    Inventors: Zhe LI, Qili SU, Yong LU, Haijing LIU
  • Publication number: 20240379996
    Abstract: An oxide-based solid-state battery cell includes a cathode electrode comprising a cathode current collector. A cathode active layer is arranged adjacent to the cathode current collector and comprising cathode active material that exchanges lithium ions and a solid oxide electrolyte and an in-situ polymerization gel. A separator layer comprises a solid oxide electrolyte, a porous layer, and the in-situ polymerization gel. An anode electrode comprises an anode current collector, a silicon film, and the in-situ polymerization gel.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 14, 2024
    Inventors: Qili SU, Zhe Li, Yong Lu, Haijing Liu
  • Patent number: 12114478
    Abstract: A method for preparing a semiconductor structure includes: providing a semiconductor substrate; forming a groove in the semiconductor substrate; forming a first insulation layer, the first insulation layer at least covering an inner wall of the groove; forming a channel layer, the channel layer at least covering an inner wall of the first insulation layer; forming a second insulation layer, the second insulation layer at least covering an inner wall of the channel layer; filling the groove with a word line structure; removing part of the semiconductor substrate, part of the first insulation layer, and part of the channel layer, and forming a recess region in an outer side wall of the second insulation layer; and forming a source-drain in the recess region, the source-drain being electrically connected with the channel layer.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: October 8, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Gongyi Wu, Yong Lu, Longyang Chen
  • Patent number: 12100715
    Abstract: Example array substrates are provided. One example array substrate includes an underlying substrate, an antenna and a component layer, where the antenna and the component layer are located on a same side of the underlying substrate, where the component layer and the antenna are disposed at intervals, where the component layer includes a plurality of metal laminates and a plurality of dielectric laminates that are stacked, and where the plurality of metal laminates and the plurality of dielectric laminates are alternately disposed to form a plurality of thin film transistors.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: September 24, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Huajun Cao, Guozhong Ma, Yukun Guo, Yong Lu
  • Publication number: 20240283057
    Abstract: A solid-state battery cell includes an anode electrode comprising an anode current collector and an anode coating. A cathode electrode comprises a cathode current collector and a cathode coating, wherein the anode electrode and the cathode electrode exchange lithium ions. A separator layer is arranged between the anode electrode and the cathode electrode. A first capacitor electrode is arranged at least one of between the anode coating and a first side of the separator layer, between the anode coating and the anode current collector, between a second side of the separator layer and the cathode coating, and between the cathode coating and the cathode current collector.
    Type: Application
    Filed: July 27, 2023
    Publication date: August 22, 2024
    Inventors: Yong LU, Zhe Li, Qili SU, Dave G. RICH, Haijing LIU
  • Publication number: 20240282970
    Abstract: An electrode for a lithium-ion battery cell includes a first region having a first thickness and including an active material comprising a first wt % of the first region and a solid electrolyte comprising a second wt % of the first region. A second region has a second thickness and includes the active material comprising a third wt % of the second region and the solid electrolyte comprising a fourth wt % of the second region. The first region and the second region are arranged adjacent to one another. The first wt % is greater than the third wt % and the second wt % is less than the fourth wt %.
    Type: Application
    Filed: June 16, 2023
    Publication date: August 22, 2024
    Inventors: Qili SU, Zhe Li, Yong Lu, Haijing Liu, Dave G. Rich
  • Publication number: 20240283009
    Abstract: A method for preparing an electrolyte layer supported by a dry process electrode layer, the method includes providing a sulfide electrolyte layer; providing a first dry process electrode layer; arranging a first side of the sulfide electrolyte layer adjacent to a first side of the first dry process electrode layer; and calendaring the sulfide electrolyte layer and the first dry process electrode layer to reduce a thickness of the sulfide electrolyte layer to a predetermined thickness in a range from approximately 5 micrometers (?m) to approximately 50 ?m.
    Type: Application
    Filed: July 26, 2023
    Publication date: August 22, 2024
    Inventors: Qili SU, Zhe Li, Meiyuan Wu, Dave G. Rich, Yong Lu, Haijing Liu, Mark W. Verbrugge