Abstract: Disclosed therein are an apparatus for and a method of automatically welding a flange to a guide thimble tube in a nuclear fuel assembly. The automatic welding apparatus includes: a welding part located on an axially conveying line of a tube for welding a welded surface of the tube inserted thereinto and a welded surface of a flange; a flange supplying part for supplying the flange at a tube inlet of the welding part onto the axially conveying line; and a conveying part mounted on the axially conveying line in such a way as to move the tube and the flange on the axially conveying line, so that they are inserted into and drawn from the welding part.

Abstract: A scan driver and an organic light emitting display (OLED) for selectively performing progressive scanning and interlaced scanning. The scan driver includes a plurality of scan units. A scan unit generates an odd-number scan signal or an even-number scan signal and includes a flip-flop and a scan signal generator. The scan signal generator performs a logical operation on output signals from the flip-flop and a mode selection signal, and outputs a signal. A logical operation can be performed on the output signal of the scan unit and an impulse signal to form a scan signal and an emission control signal. The OLED, which selectively performs the progressive scanning and the interlaced scanning in response to a mode selection signal, includes an emission driver for outputting an emission control signal and a program driver for outputting a scan signal and a boost signal.

Abstract: A display device including plural pixels, plural scan lines for applying scan signals to the pixels, plural first data lines for transmitting first data currents to the pixels, a scan driver for outputting the scan signals, a demultiplexer including plural demultiplexing circuits for demultiplexing second data currents into the first data currents, and for transmitting the first data currents to the plural first data lines, and a data driver for transmitting the second data currents. A demultiplexing circuit demultiplexes one of the second data currents into at least two first data currents, and transmits them to at least two first data lines. The number of the at least two first data lines is an integer multiple of the number of sub-pixels in each pixel. A display device and a demultiplexer having a simple structure data driver, where a stationary pattern due to demultiplexing is reduced or eliminated, can be provided.

Abstract: Disclosed is a power transmission tower, which includes a tower body; first through sixth main insulation arms connected by one end thereof to the tower body with an angle with the tower body, respectively, and arranged radially and symmetrically about the tower body in a longitudinal direction; and first through eighth auxiliary insulation arms for selectively connecting the other end of the first through sixth main insulation arms and the tower body so that each of the auxiliary insulation arms constitutes each side of an octagon. Since the insulation arms are octagonally arranged, it is possible to reinforce a mechanical strength and enhance electric properties of the tower.

Abstract: A scan driving circuit includes a plurality of stages. Each stage receives three of four clocks that may be sequentially generated, receives and delays an input signal through an input terminal, and outputs an output signal through an output terminal. The input terminal of each stage is connected to the output terminal of a previous one of the stages. Each stage includes a transistor, a switch section, and a storage section. The transistor turns off/on a connection of the input terminal according to a second clock. The switch section transfers a first voltage to the output terminal according to a first clock and prevents the first voltage from being transferred to the output terminal according to the input signal. The storage section maintains a voltage of the output terminal for a predetermined time and transfers a voltage of a third clock to the output terminal according to the input signal.

Abstract: A data current sample and hold circuit having an input terminal of a current source type and an output terminal of a current sink type. The sample and hold circuit includes a first transistor, a capacitor, and a plurality of switches, for sampling and holding the data current sunk to an output terminal of a data driver. When the sampled and held data current is applied to the data line, the data current is sunk to an output terminal of the sample and hold circuit. The sample and hold circuit is used together with a data driver having an output terminal of the current sink type.

Abstract: In a flat display panel, a surface of at least one of a sustain electrode and an address electrode may be formed to have a curved surface. The surface of the electrode may be formed as a continuous curved surface. The sustain electrode and the address electrode may be elongated in a lengthwise direction thereof. These lengthwise directions may be perpendicular to each other. The electrode may be formed by transferring an electrode material onto the substrate using an electrode frame defined with electrode forming grooves each having a same sectional shape as the electrode. Therefore, the surface of the electrode may be formed as the curved surface.

Abstract: A driving device for a light emitting display, which includes a plurality of scan lines for transferring a selection signal, comprises: a first driver for shifting a first signal having a first integer multiple of first pulses by a first period, and sequentially outputting the first signal; a second driver for shifting a second signal having a second pulse by a second period, and sequentially outputting the second signal; and a third driver for sequentially outputting the selection signal having a second integer multiple of third pulses corresponding to at least one of the first integer multiple of first pulses, and a fourth pulse corresponding to the second pulse, in response to the first signal and the second signal.

Abstract: The present invention provides a liquid crystal display (LCD). The LCD includes: a liquid crystal panel that includes a plurality of gate lines; and a gate driver that includes a plurality of stages, which are connected to the gate lines, respectively, and sequentially provide a plurality of gate signals to the gate lines, respectively, and a first dummy stage and a second dummy stage that are separated from each other, wherein the first dummy stage is enabled by a carry signal of one of the stages, and the second dummy stage is enabled by a carry signal of the first dummy stage and initializes each of the stages.

Abstract: A shift register circuit comprising a plurality of stages dependently connected to an initial input signal or an output signal of a previous stage and connected to first and second clock signals which are mutually inverted. Each stage includes eight switching devices interconnected together with three capacitors and interfaced through eleven interface points. Some of the interface points are connected to the first and second clock signals according to whether the stage is an even numbered stage or an odd numbered stage. Other ones of the interface points are connectable to the first and second clock signals in alternative ways to reduce power consumption without changing an internal configuration of the stage.

Abstract: Scan driving circuit having a number of stages coupled together in series and coupled with first and second lock signal input lines. Each of the stages receives a start signal or an output signal of a previous stage and includes a transfer unit, an inversion unit, and a buffer unit and produces the output signal. The output signal of each of the stages includes a low level signal, the low level signal of each stage is sequentially shifted by one half of the clock signal period with respect to the low level signal of a previous stage. The series of shifted low level signals form the scan signals output by the scan driving circuit for driving an organic light emitting display device.

Abstract: A data current sample and hold circuit having an input terminal of a current source type and an output terminal of a current sink type. The sample and hold circuit includes a first transistor, a capacitor, and a plurality of switches, for sampling and holding the data current sunk to an output terminal of a data driver. When the sampled and held data current is applied to the data line, the data current is sunk to an output terminal of the sample and hold circuit. The sample and hold circuit is used together with a data driver having an output terminal of the current sink type.

Abstract: Disclosed is a method for acquiring synchronization in a mobile communication system using an Orthogonal Frequency Division Multiplexing (OFDM) scheme. The method includes modeling a power delay profile in time-varying frequency selective fading channel conditions by a specific function; detecting a log probability distribution function of a timing offset and a frequency offset in consideration of a correlation between a received signal and the received multi-path signal in the time-varying frequency selective fading channel conditions having the power delay profile modeled as the specific function; and estimating a timing offset and a frequency offset which maximize the log probability distribution function of the timing offset and the frequency offset.

Abstract: Disclosed is a display device using a demultiplexer. The demultiplexer sequentially samples data currents that are time-divided and applied by a data driver, and holds them to a plurality of data lines. Since the demultiplexer is to sample the data currents corresponding to N data lines during a horizontal period when performing 1:N demultiplexing, the data current corresponding to one data line is to be sampled during a 1/N horizontal period. According to one embodiment, a signal line coupled between the demultiplexer and the data driver is precharged with particular voltage before sampling the data current. The precharge voltage is sufficient to allow current transmitted to the signal line to be substantially sampled within a a given sampling time after the precharge voltage is applied.

Abstract: Provided is a display apparatus including an intermediate frame and a lower container which can be easily joined to or disjoined from each other without being deformed. The display apparatus includes: a display panel which displays images; an intermediate frame on which the display panel is placed and which is split into two or more frames; and a container which is split into two or more containers, is coupled to the intermediate frame, and includes a light source cover integrally formed on at least a side thereof, wherein a light source is inserted into the light source cover.

Abstract: A display device including a plurality of data lines for transmitting a data current corresponding to image signals, a plurality of scan lines for selecting select signals, and a plurality of pixel circuits coupled to the data lines and the scan lines. The display device includes a data driver for supplying the data current corresponding to the image signals, and a demultiplexer including first and second sample/hold circuit groups having input terminals coupled to the data driver. Each of the sample/hold circuit groups includes at least two sample/hold circuits. The display device also includes a switch unit for switching between output terminals of the first and second sample/hold circuit groups and the data lines, and a scan driver for supplying the select signals to the scan lines.

Abstract: A transmitter and/or receiver for performing frequency domain equalization is provided. A transmitter includes a pilot position determination unit for determining positions for inserting pilots in a frequency domain based on frequency spectrums of data, and a pilot insertion unit for inserting the pilots between the frequency spectrums of the data according to the determined positions for inserting the pilots.

Abstract: An apparatus and a method for efficient resource allocation using a cognitive radio communication in Orthogonal Frequency Division Multiple Access (OFDMA)-based moving networks are provided. The method includes determining a minimum transmit power value of the MRS, which enables the internal terminal to have a receive Signal to Interference and Noise Ratio (SINR) greater than a first threshold; determining a transmit power value of the MRS by taking into account the determined minimum transmit power value; determining a transmit power value of the MRS per cellular terminal, which is transmittable at maximum while exerting interference less than a second threshold on a corresponding cellular terminal; searching one or more cellular terminals having the maximum transmittable transmit power value determined per cellular terminal greater than the determined transmit power value; and borrowing and allocating a resource allocated to the searched cellular terminal to the internal terminal.

Abstract: A display having a touch panel capability is provided. The display includes a first substrate and a second substrate opposing each other, a thin-film transistor for pixel driving formed on the first substrate, and a thin-film transistor for touch position detection including a source electrode and a drain electrode formed on the first substrate, and a gate electrode formed on the second substrate.

Abstract: A scan driver that selectively performs progressive scanning and interlaced scanning and a display using the same. The scan driver includes a shift register having a plurality of flip-flops arranged in series, an odd line selection unit having a plurality of NAND gates, and an even line selection unit having a plurality of NAND gates. In response to an odd line control signal and an even line control signal input to the odd line selection unit and the even line selection unit, respectively, the scan driver performs progressive scanning or interlaced scanning. The scan driver may also include a mode selection unit to selectively perform progressive scanning or interlaced scanning in response to a mode selection signal.