Patents by Inventor Yong-Sun Ko

Yong-Sun Ko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200303182
    Abstract: A substrate processing apparatus includes a chamber providing a space in which a substrate is processed, a first substrate support within the chamber and configured to support the substrate when the substrate is loaded into chamber, a second substrate support within the chamber and configured to support the substrate in a height greater than the height in which the first substrate supports the substrate, a first supply port through which a supercritical fluid is supplied to a first space under the substrate of a chamber space, a second supply port through which the supercritical fluid is supplied to a second space above the substrate of the chamber space, and an exhaust port through which the supercritical fluid is exhausted from the chamber.
    Type: Application
    Filed: June 4, 2020
    Publication date: September 24, 2020
    Applicants: Samsung Electronics Co., Ltd., SEMES CO., LTD.
    Inventors: Won-Ho JANG, Jeong-Yong BAE, Woo-Young KIM, Hyun-Jung LEE, Se-Jin PARK, Yong-Sun KO, Dong-Gyun HAN, Woo-Gwan SHIM, Boong KIM
  • Patent number: 10707071
    Abstract: A substrate processing apparatus includes a chamber providing a space in which a substrate is processed, a first substrate support within the chamber and configured to support the substrate when the substrate is loaded into chamber, a second substrate support within the chamber and configured to support the substrate in a height greater than the height in which the first substrate supports the substrate, a first supply port through which a supercritical fluid is supplied to a first space under the substrate of a chamber space, a second supply port through which the supercritical fluid is supplied to a second space above the substrate of the chamber space, and an exhaust port through which the supercritical fluid is exhausted from the chamber.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: July 7, 2020
    Assignees: Samsung Electronics Co., Ltd., Semes Co., Ltd.
    Inventors: Won-Ho Jang, Hyun-Jung Lee, Se-Jin Park, Yong-Sun Ko, Dong-Gyun Han, Woo-Gwan Shim, Jeong-Yong Bae, Woo-Young Kim, Boong Kim
  • Publication number: 20200203195
    Abstract: A wet etching system operating method includes providing an etching apparatus having an Nth etching solution, loading Nth batch substrates into the etching apparatus and performing an Nth etching process, discharging some of the Nth etching solution, refilling the etching apparatus with an (N+1)th etching solution supplied from a supply apparatus connected to the etching apparatus, and loading (N+1)th batch substrates into the etching apparatus and performing an (N+1)th etching process, wherein the (N+1)th etching solution has a temperature within or higher than a temperature management range of the (N+1)th etching process, and wherein the (N+1)th etching solution has a concentration within or higher than a concentration management range of the (N+1)th etching solution, N being a positive integer.
    Type: Application
    Filed: July 3, 2019
    Publication date: June 25, 2020
    Inventors: Sang Hoon JEONG, Yong Sun KO, Dong Ha KIM, Tae Heon KIM, Chang Sup MUN, Woo Gwan SHIM, Jun Youl YANG, Se Ho CHA
  • Publication number: 20200194284
    Abstract: A substrate processing apparatus includes: a spin chuck, on which a substrate is mounted, the spin chuck rotating the substrate; At least one of a chemical liquid nozzle configured to provide a chemical liquid to a surface of the substrate and a deionzed water nozzle configured to provide a deionized water to a surface of the substrate; and a laser device configured to emit a pulse waver laser beam having a period of 10?9 seconds or less for etching an edge of the substrate.
    Type: Application
    Filed: June 13, 2019
    Publication date: June 18, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-jine Park, Seung-ho Lee, Bo-wo Choi, Yong-sun Ko, Woo-gwan Shim
  • Patent number: 10576582
    Abstract: A spot heater and a device for cleaning a wafer using the same are provided. The wafer cleaning device includes a heater chuck on which a wafer is mounted, the heater chuck configured to heat a bottom surface of the wafer; a chemical liquid nozzle configured to spray a chemical liquid on a top surface of the wafer for etching; and a spot heater configured to heat a spot of the top surface of the wafer.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: March 3, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hoo Kim, Il-Sang Lee, Yong-sun Ko, Chang-Gil Ryu, Kun-Tack Lee, Hyo-San Lee
  • Publication number: 20200013782
    Abstract: Semiconductor devices and methods of forming the same are provided. The methods may include forming first and second line patterns. The first line pattern has a first side facing the second line pattern, and the second line pattern has a second side facing the first line pattern. The methods may also include forming a first spacer structure on the first side of the first line pattern and a second spacer structure on the second side of the second line pattern. The first and the second spacer structures may define an opening. The methods may further include forming a first conductor in a lower part of the opening, forming an expanded opening by etching upper portions of the first and second spacer structures, and forming a second conductor in the expanded opening. The expanded opening may have a width greater than a width of the lower part of the opening.
    Type: Application
    Filed: September 16, 2019
    Publication date: January 9, 2020
    Inventors: Yoon Ho SON, Jae Uk SHIN, Yong Sun KO, Im Soo PARK, Sung Yoon CHUNG
  • Patent number: 10438799
    Abstract: A method of fabricating semiconductor devices includes sequentially forming a gate layer and a mandrel layer on a substrate, forming a first photoresist on the mandrel layer, forming a mandrel pattern by at least partially removing the mandrel layer using the first photoresist as a mask, forming a spacer pattern that comprises a first mandrel spacer located on a side of a first mandrel included in the mandrel pattern and a second mandrel spacer located on the other side of the first mandrel, forming a sacrificial layer that covers the first and second mandrel spacers after removing the mandrel pattern, forming a second photoresist including a bridge pattern overlapping parts of the first and second mandrel spacers on the sacrificial layer; and forming a gate pattern by at least partially removing the gate layer using the first and second mandrel spacers and the second photoresist as a mask.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: October 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Jine Park, Yong Sun Ko, In Seak Hwang
  • Patent number: 10438891
    Abstract: An integrated circuit device includes an insulating film on a substrate, a lower wiring layer penetrating at least a portion of the insulating film, the lower wiring layer including a first metal, a lower conductive barrier film surrounding a bottom surface and a sidewall of the lower wiring layer, the lower conductive barrier film including a second metal different from the first metal, a first metal silicide capping layer covering a top surface of the lower wiring layer, the first metal silicide capping layer including the first metal, and a second metal silicide capping layer contacting the first metal silicide capping layer and disposed on the lower conductive barrier film, the second metal silicide capping layer including the second metal.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: October 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-jine Park, Kee-sang Kwon, Jae-jik Baek, Yong-sun Ko, Kwang-wook Lee
  • Patent number: 10418366
    Abstract: Semiconductor devices and methods of forming the same are provided. The methods may include forming first and second line patterns. The first line pattern has a first side facing the second line pattern, and the second line pattern has a second side facing the first line pattern. The methods may also include forming a first spacer structure on the first side of the first line pattern and a second spacer structure on the second side of the second line pattern. The first and the second spacer structures may define an opening. The methods may further include forming a first conductor in a lower part of the opening, forming an expanded opening by etching upper portions of the first and second spacer structures, and forming a second conductor in the expanded opening. The expanded opening may have a width greater than a width of the lower part of the opening.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: September 17, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon Ho Son, Jae Uk Shin, Yong Sun Ko, Im Soo Park, Sung Yoon Chung
  • Publication number: 20190096712
    Abstract: Disclosed are a supercritical process chamber and an apparatus having the same. The process chamber includes a body frame having a protrusion protruding in an upward vertical direction from a first surface of the body frame and a recess defined by the protrusion and the first surface of the body frame; a cover frame; a buffer chamber arranged between the body frame and the cover frame; and a connector. The buffer chamber includes an inner vessel detachably coupled to the body frame providing a chamber space in the recess and an inner cover detachably coupled to the cover frame. The inner cover is in contact with a first surface of the inner vessel enclosing the chamber space from surroundings. The connector couples the body frame and the cover frame having the buffer chamber arranged therebetween such that the enclosed chamber space is transformed into a process space in which the supercritical process is performed.
    Type: Application
    Filed: May 14, 2018
    Publication date: March 28, 2019
    Inventors: Sang-Jine PARK, Byung-Kwon CHO, Yong-Jhin CHO, Yong-Sun KO, Yeon-Jin GIL, Kwang-Wook LEE
  • Publication number: 20180358242
    Abstract: A substrate processing apparatus includes a vessel providing a processing space for processing a substrate, a substrate support supporting the substrate loaded in the processing space, and a barrier between a side wall of the vessel and the substrate support and surrounding an edge of the substrate supported by the substrate support.
    Type: Application
    Filed: November 30, 2017
    Publication date: December 13, 2018
    Inventors: Young-hoo Kim, Sang-jine PARK, Yong-jhin CHO, Yeon-jin GIL, Ji-hoon JEONG, Byung-kwon CHO, Yong-sun KO, Kun-tack LEE
  • Publication number: 20180342521
    Abstract: Semiconductor devices and methods of forming the same are provided. The methods may include forming first and second line patterns. The first line pattern has a first side facing the second line pattern, and the second line pattern has a second side facing the first line pattern. The methods may also include forming a first spacer structure on the first side of the first line pattern and a second spacer structure on the second side of the second line pattern. The first and the second spacer structures may define an opening. The methods may further include forming a first conductor in a lower part of the opening, forming an expanded opening by etching upper portions of the first and second spacer structures, and forming a second conductor in the expanded opening. The expanded opening may have a width greater than a width of the lower part of the opening.
    Type: Application
    Filed: January 4, 2018
    Publication date: November 29, 2018
    Inventors: Yoon Ho Son, Jae Uk Shin, Yong Sun Ko, Im Soo Park, Sung Yoon Chung
  • Publication number: 20180311764
    Abstract: A spot heater and a device for cleaning a wafer using the same are provided. The wafer cleaning device includes a heater chuck on which a wafer is mounted, the heater chuck configured to heat a bottom surface of the wafer; a chemical liquid nozzle configured to spray a chemical liquid on a top surface of the wafer for etching; and a spot heater configured to heat a spot of the top surface of the wafer.
    Type: Application
    Filed: July 9, 2018
    Publication date: November 1, 2018
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hoo KIM, Il-Sang LEE, Yong-sun KO, Chang-Gil RYU, Kun-Tack LEE, Hyo-San LEE
  • Publication number: 20180267409
    Abstract: A composition for removing photoresist, including an alkyl ammonium fluoride salt in an amount ranging from about 0.5 weight percent to about 10 weight percent, based on a total weight of the composition; an organic sulfonic acid in an amount ranging from about 1 weight percent to about 20 weight percent, based on the total weight of the composition; and a lactone-based solvent in an amount ranging from about 70 weight percent to about 98.5 weight percent, based on the total weight of the composition.
    Type: Application
    Filed: May 23, 2018
    Publication date: September 20, 2018
    Applicant: DONGWOO FINE-CHEM
    Inventors: Jung-Min OH, Mi-Hyun PARK, Hyo-San LEE, Ji-Hoon JEONG, Yong-Sun KO, In-Gi KIM, Na-Rim KIM, Sang-Tae KIM, Seong-Min KIM, Kyong-Ho LEE
  • Publication number: 20180254246
    Abstract: An integrated circuit device includes an insulating film on a substrate, a lower wiring layer penetrating at least a portion of the insulating film, the lower wiring layer including a first metal, a lower conductive barrier film surrounding a bottom surface and a sidewall of the lower wiring layer, the lower conductive barrier film including a second metal different from the first metal, a first metal silicide capping layer covering a top surface of the lower wiring layer, the first metal silicide capping layer including the first metal, and a second metal silicide capping layer contacting the first metal silicide capping layer and disposed on the lower conductive barrier film, the second metal silicide capping layer including the second metal.
    Type: Application
    Filed: September 7, 2017
    Publication date: September 6, 2018
    Inventors: Sang-jine PARK, Kee-sang KWON, Jae-jik BAEK, Yong-sun KO, Kwang-wook LEE
  • Patent number: 10029332
    Abstract: A spot heater and a device for cleaning a wafer using the same are provided. The wafer cleaning device includes a heater chuck on which a wafer is mounted, the heater chuck configured to heat a bottom surface of the wafer; a chemical liquid nozzle configured to spray a chemical liquid on a top surface of the wafer for etching; and a spot heater configured to heat a spot of the top surface of the wafer.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: July 24, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hoo Kim, Il-Sang Lee, Yong-sun Ko, Chang-Gil Ryu, Kun-Tack Lee, Hyo-San Lee
  • Patent number: 10025192
    Abstract: A composition for removing photoresist, including an alkyl ammonium fluoride salt in an amount ranging from about 0.5 weight percent to about 10 weight percent, based on a total weight of the composition; an organic sulfonic acid in an amount ranging from about 1 weight percent to about 20 weight percent, based on the total weight of the composition; and a lactone-based solvent in an amount ranging from about 70 weight percent to about 98.5 weight percent, based on the total weight of the composition.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: July 17, 2018
    Assignees: SAMSUNG ELECTRONICS CO., LTD., DONGWOO FINE-CHEM
    Inventors: Jung-Min Oh, Mi-Hyun Park, Hyo-San Lee, Ji-Hoon Jeong, Yong-Sun Ko, In-Gi Kim, Na-Rim Kim, Sang-Tae Kim, Seong-Min Kim, Kyong-Ho Lee
  • Publication number: 20180197861
    Abstract: A first conductivity type finFET device can include first embedded sources/drains of a first material that have a first etch rate. The first embedded sources/drains can each include an upper surface having a recessed portion and an outer raised portion relative to the recessed portion. A second conductivity type finFET device can include second embedded sources/drains of a second material that have a second etch rate than is greater that the first etch rate. The second embedded sources/drains can each include an upper surface that is at a different level than the outer raised portions of the first conductivity type finFET device.
    Type: Application
    Filed: March 9, 2018
    Publication date: July 12, 2018
    Inventors: Sang Jine Park, KI HYUNG KO, KEE SANG KWON, JAE JIK BAEK, BO UN YOON, YONG SUN KO
  • Publication number: 20180190485
    Abstract: A substrate processing apparatus includes a chamber providing a space in which a substrate is processed, a first substrate support within the chamber and configured to support the substrate when the substrate is loaded into chamber, a second substrate support within the chamber and configured to support the substrate in a height greater than the height in which the first substrate supports the substrate, a first supply port through which a supercritical fluid is supplied to a first space under the substrate of a chamber space, a second supply port through which the supercritical fluid is supplied to a second space above the substrate of the chamber space, and an exhaust port through which the supercritical fluid is exhausted from the chamber.
    Type: Application
    Filed: November 30, 2017
    Publication date: July 5, 2018
    Applicants: Samsung Electronics Co., Ltd., SEMES CO., LTD.
    Inventors: Won-Ho JANG, Hyun-Jung LEE, Se-Jin PARK, Yong-Sun KO, Dong-Gyun HAN, Woo-Gwan SHIM, Jeong-Yong BAE, Woo-Young KIM, Boong KIM
  • Patent number: 9985106
    Abstract: Semiconductor devices may include a field insulating layer that is on a substrate, a gate structure that is on the substrate and separated from the field insulating layer, a first spacer structure that is on sidewalls and a lower surface of the gate structure and is separated from the field insulating layer, and a second spacer structure that is on a part of an upper surface of the field insulating layer that is overlapped by the gate structure.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: May 29, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Jine Park, Yong Sun Ko, In Seak Hwang