Patents by Inventor Yong-Sup Hwang

Yong-Sup Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020180900
    Abstract: An array substrate and a method of manufacturing thereof are disclosed for a liquid crystal display device. The array substrate includes a substrate, a gate line disposed along a first direction on the substrate, a common line parallel to the gate line and spaced apart from the gate line, wherein the common line is made of the same material as the gate line. The array substrate also includes a gate insulating layer on the gate and common lines, a semiconductor layer on the gate insulating layer and a pixel electrode of transparent conductive material including a drain electrode portion. The drain electrode portion overlaps the semiconductor layer and a source electrode of transparent conductive material is spaced apart from the drain electrode portion. A passivation layer includes a first contact hole and an open portion over the pixel and source electrodes, the first contact hole exposing the source electrode and the open portion exposing the pixel electrode, respectively.
    Type: Application
    Filed: December 28, 2001
    Publication date: December 5, 2002
    Inventors: Gee-Sung Chae, Jae-Kyun Lee, Yong-Sup Hwang
  • Patent number: 6057228
    Abstract: The present invention relates to a method of forming an interconnection for a semiconductor device using copper. The method of the invention, including the steps of forming an insulating layer having a groove on a semiconductor substrate containing active elements; forming and depositing a copper thin film on the insulating layer including the groove; and reflowing the copper thin film, may reflow the copper thin film deposited on the semiconductor substrate having a high-step surface for less than 30 min. below 450.degree. C., which show improved annealing conditions as compared with the conventional art. In addition, by reducing consumption of thermal energy in accordance with a low-temperature process, copper is restrained from being rapidly diffused through a silicon substrate, electrodes, etc. when forming the interconnection for the semiconductor device, thus improving productivity of the semiconductor devices.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: May 2, 2000
    Assignee: LG Semicon Co., Ltd.
    Inventors: Seung-Yun Lee, Yong-Sup Hwang, Chong-Ook Park, Dong-Won Kim, Sa-Kyun Rha, Jun-Ki Kim