Patents by Inventor Yong-Won Cha

Yong-Won Cha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240092141
    Abstract: An air conditioning device for a vehicle includes: a housing having an inside divided into an inflow space, a heat exchange space, and an outflow space, which are straightly arranged, and having a plurality of discharge ports, which communicates with an interior, at the inflow space; a blowing unit disposed at the inflow space of the housing and configured to blow air; a heat exchange unit disposed at the heat exchange space of the housing and configured to adjust a temperature of conditioned air by exchanging heat with air; and an opening-closing door disposed at the outflow space of the housing and configured to open and close the plurality of discharge ports such that conditioned air at an adjusted temperature selectively flows to the plurality of discharge ports. The air conditioning device adjusts the temperature of conditioned air for respective modes and reduces a flow resistance of air.
    Type: Application
    Filed: March 8, 2023
    Publication date: March 21, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, DOOWON CLIMATE CONTROL CO., LTD.
    Inventors: Kwang Ok Han, Young Tae Song, Yong Chul Kim, Gee Young Shin, Su Yeon Kang, Jae Sik Choi, Dae Hee Lee, Byeong Moo Jang, Ung Hwi Kim, Jae Won Cha, Won Jun Joung, Byung Guk An
  • Publication number: 20220052018
    Abstract: The present invention relates to a substrate aligning device for bonding a first substrate (100) and a second substrate (200), wherein the first substrate (100) and the second substrate (200) have respective bonding surfaces via which the first substrate (100) and the second substrate (200) are bonded face-to-face with each other, and respective non-bonding surfaces which are located on the reverse sides from the bonding surfaces.
    Type: Application
    Filed: July 19, 2019
    Publication date: February 17, 2022
    Applicant: L TRIN.CO.,LTD
    Inventors: Yong Won CHA, Mi Ok CHO, Ji Soo CHO, Dae Hyeon KIM
  • Patent number: 8999099
    Abstract: A substrate attachment system, including a portable chamber for receiving a pair of substrates which are aligned; a conveyor transportation device which continuously moves the portable chamber and to which a vacuum generator that is connected to a vacuum port of the portable chamber to evacuate the inside of the portable chamber is provided; and a heating device for performing a heating process in which the aligned substrates are attached to each other in the portable chamber, wherein the conveyor transportation device is arranged to pass through the heating device. The substrate attachment system may contribute to high attachment accuracy, and also, since the size of a chamber is reduced, a spatial utilization rate may be high, and also, since an attachment process is continuously performed by using a conveyor transportation device, a process time may be reduced.
    Type: Grant
    Filed: November 26, 2010
    Date of Patent: April 7, 2015
    Assignee: Ltrin. Co., Ltd.
    Inventors: Yong-Won Cha, Sang Wook Yoo, Gun-Woo Park, Seung-Hee Jung
  • Publication number: 20140322834
    Abstract: An apparatus for bonding substrates and a method of bonding substrates are provided. In accordance with one exemplary embodiment of the present invention, a first plate to mount a first substrate is provided. A chamber body movably connected to the first plate is provided. A second plate that is placed opposite to the first plate and a second substrate is mounted on the second plate is provided. A chamber lead having the second plate mounted inside is provided which is movably connected to the chamber body to move rotationally or linearly to open or close the chamber space with the chamber body. A pair of first alignment cameras is placed outside of the chamber space to scan the first substrate or the second substrate. A stage control unit is provided to move the first plate or the second plate to align the first substrate and the second substrate.
    Type: Application
    Filed: April 28, 2014
    Publication date: October 30, 2014
    Applicant: LTrin Co., Ltd
    Inventors: Yong Won CHA, Chang Woo RYOO, Sang Jun OH, Gun Woo PARK, Jae In PARK
  • Publication number: 20120298306
    Abstract: A substrate attachment system, including a portable chamber for receiving a pair of substrates which are aligned; a conveyor transportation device which continuously moves the portable chamber and to which a vacuum generator that is connected to a vacuum port of the portable chamber to evacuate the inside of the portable chamber is provided; and a heating device for performing a heating process in which the aligned substrates are attached to each other in the portable chamber, wherein the conveyor transportation device is arranged to pass through the heating device. The substrate attachment system may contribute to high attachment accuracy, and also, since the size of a chamber is reduced, a spatial utilization rate may be high, and also, since an attachment process is continuously performed by using a conveyor transportation device, a process time may be reduced.
    Type: Application
    Filed: November 26, 2010
    Publication date: November 29, 2012
    Applicant: LTRIN. CO., LTD
    Inventors: Yong-Won Cha, Sang Wook Yoo, Gun-Woo Park, Seung-Hee Jung
  • Patent number: 8278186
    Abstract: The present invention relates to a wafer cleaning and a wafer bonding method using the same that can improve a yield of cleaning process and bonding property in bonding the cleaned wafer by cleaning the wafer using atmospheric pressure plasma and cleaning solution. The wafer cleaning method includes the steps of providing a process chamber with a wafer whose bonding surface faces upward, cleaning and surface-treating the bonding surface of the wafer by supplying atmospheric pressure plasma and a cleaning solution to the bonding surface of the wafer, and withdrawing out the wafer from the process chamber.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: October 2, 2012
    Assignee: Ltrin Co., Ltd.
    Inventors: Yong Won Cha, Dong Chul Kim
  • Patent number: 7781302
    Abstract: Methods of fabricating a semiconductor device include forming a mask pattern on a semiconductor substrate and which exposes defined regions of the semiconductor substrate. Oxygen ions are implanted into the defined regions of the semiconductor substrate using the mask pattern as an ion implantation mask. The oxygen ion implanted regions of the semiconductor substrate are annealed at one or more temperatures in a range that is sufficiently high to form silicon oxide substantially throughout the oxygen ion implanted regions by reacting the implanted oxygen ions with silicon in the oxygen ion implanted regions, and that is sufficiently low to substantially prevent oxidation of the semiconductor substrate adjacent to the oxygen ion implanted regions.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: August 24, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Won Cha, Dae-Lok Bae
  • Patent number: 7605022
    Abstract: A method of fabricating a three-dimensional semiconductor device is provided along with a three-dimensional semiconductor device fabricated thereby. The method includes forming a heat conductive plug to channel heat away from devices on a substrate, while high temperature processes are performed on a stacked semiconductor layer. The ability to use high temperature processes on the stacked semiconductor layer without adversely effecting devices on the substrate allows the formation of a high quality single-crystalline stacked semiconductor layer. The high quality single-crystalline semiconductor layer can then be used to fabricate improved thin film transistors.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: October 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Won Cha, Dong-Chul Suh, Dae-Lok Bae
  • Patent number: 7598177
    Abstract: Methods of filling trenches/gaps defined by circuit elements on an integrated circuit substrate are provided. The methods include forming a first high-density plasma layer on an integrated circuit substrate including at least one trench thereon using a first reaction gas. The first high-density plasma layer is etched using an etch gas including nitrogen fluoride gas (NF3). A second high-density plasma layer is formed on the etched first high-density plasma layer using a second reaction gas including nitrogen fluoride.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: October 6, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Won Cha, Kyu-tae Na
  • Publication number: 20090221133
    Abstract: Methods of fabricating SOI wafers are provided including providing a donor wafer and forming a hydrogen ion implantation layer in the donor wafer. A circumference portion of one side of the donor wafer is recessed to form a height difference. The one side of the donor wafer and a handle wafer are bonded to form a bonded wafer. The bonded wafer is heat treated to separate the bonded wafer along the hydrogen ion implantation layer.
    Type: Application
    Filed: February 13, 2009
    Publication date: September 3, 2009
    Inventors: Seung-Woo Choi, Dae-Lok Bae, Jong-Wook Lee, Yong-Won Cha, Pil-Kyu Kang, Jung-Ho Kim
  • Patent number: 7560383
    Abstract: In a method of forming a thin layer having a desired composition, a source gas is provided onto a substrate loaded in a chamber for a first time, and the source gas is chemisorbed onto the substrate. While the source gas is provided, a plasma is generated in the chamber for a second time to change the chemisorbed source gas into the thin layer having the desired composition. The thin layer may have a stoichiometrical composition or a non-stoichiometrical composition.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: July 14, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyong-Hee Joo, Yong-Won Cha, Seung-Hyun Lim, In-Seok Yeo, Kyu-Tae Na
  • Patent number: 7470603
    Abstract: Methods of fabricating a semiconductor device are provided. A semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A thin layer is formed on the semiconductor substrate. The thin layer is patterned to form a plurality of spaced apart field structures and to expose therebetween portions of the semiconductor substrate having the single crystalline structure. A non-crystalline layer is formed on the exposed portions of the semiconductor substrate having the single crystalline structure. The non-crystalline layer is planarized to expose upper surfaces of the field structures and define non-crystalline active structures from the non-crystalline layer between the field structures. A laser beam is generated that heats the non-crystalline active structures to change them into single crystalline active structures having substantially the same single crystalline structure as the defined region of the semiconductor substrate.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: December 30, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Won Cha, Sung-Kwan Kang, Pil-Kyu Kang, Yong-Hoon Son, Jong-Wook Lee
  • Patent number: 7332409
    Abstract: A method of forming a trench isolation layer can include forming an isolation layer in a trench using High Density Plasma Chemical Vapor Deposition (HDPCVD) with a carrier gas comprising hydrogen. Other methods are disclosed.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: February 19, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Won Cha, Kyu-Tae Na, Yong-Soon Choi, Eunkee Hong, Ju-Seon Goo
  • Publication number: 20080014726
    Abstract: Methods of fabricating a semiconductor device are provided. A semiconductor substrate is provided that includes a single crystalline structure within at least a defined region thereof. A thin layer is formed on the semiconductor substrate. The thin layer is patterned to form a plurality of spaced apart field structures and to expose therebetween portions of the semiconductor substrate having the single crystalline structure. A non-crystalline layer is formed on the exposed portions of the semiconductor substrate having the single crystalline structure. The non-crystalline layer is planarized to expose upper surfaces of the field structures and define non-crystalline active structures from the non-crystalline layer between the field structures. A laser beam is generated that heats the non-crystalline active structures to change them into single crystalline active structures having substantially the same single crystalline structure as the defined region of the semiconductor substrate.
    Type: Application
    Filed: February 2, 2007
    Publication date: January 17, 2008
    Inventors: Yong-Won Cha, Sung-Kwan Kang, Pil-Kyu Kang, Yong-Hoon Son, Jong-Wook Lee
  • Publication number: 20070269957
    Abstract: Methods of fabricating a semiconductor device include forming a mask pattern on a semiconductor substrate and which exposes defined regions of the semiconductor substrate. Oxygen ions are implanted into the defined regions of the semiconductor substrate using the mask pattern as an ion implantation mask. The oxygen ion implanted regions of the semiconductor substrate are annealed at one or more temperatures in a range that is sufficiently high to form silicon oxide substantially throughout the oxygen ion implanted regions by reacting the implanted oxygen ions with silicon in the oxygen ion implanted regions, and that is sufficiently low to substantially prevent oxidation of the semiconductor substrate adjacent to the oxygen ion implanted regions.
    Type: Application
    Filed: February 7, 2007
    Publication date: November 22, 2007
    Inventors: Yong-Won Cha, Dae-Lok Bae
  • Publication number: 20070158831
    Abstract: A method of fabricating a three-dimensional semiconductor device is provided along with a three-dimensional semiconductor device fabricated thereby. The method includes forming a heat conductive plug to channel heat away from devices on a substrate, while high temperature processes are performed on a stacked semiconductor layer. The ability to use high temperature processes on the stacked semiconductor layer without adversely effecting devices on the substrate allows the formation of a high quality single-crystalline stacked semiconductor layer. The high quality single-crystalline semiconductor layer can then be used to fabricate improved thin film transistors.
    Type: Application
    Filed: January 9, 2007
    Publication date: July 12, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong-Won CHA, Dong-Chul SUH, Dae-Lok BAE
  • Publication number: 20060246661
    Abstract: In a method of forming a thin layer having a desired composition, a source gas is provided onto a substrate loaded in a chamber for a first time, and the source gas is chemisorbed onto the substrate. While the source gas is provided, a plasma is generated in the chamber for a second time to change the chemisorbed source gas into the thin layer having the desired composition. The thin layer may have a stoichiometrical composition or a non-stoichiometrical composition.
    Type: Application
    Filed: April 5, 2006
    Publication date: November 2, 2006
    Inventors: Kyong-Hee Joo, Yong-Won Cha, Seung-Hyun Lim, In-Seok Yeo, Kyu-Tae Na
  • Publication number: 20060183320
    Abstract: Methods of filling trenches/gaps defined by circuit elements on an integrated circuit substrate are provided. The methods include forming a first high-density plasma layer on an integrated circuit substrate including at least one trench thereon using a first reaction gas. The first high-density plasma layer is etched using an etch gas including nitrogen fluoride gas (NF3). A second high-density plasma layer is formed on the etched first high-density plasma layer using a second reaction gas including nitrogen fluoride.
    Type: Application
    Filed: April 11, 2006
    Publication date: August 17, 2006
    Inventors: Yong-Won Cha, Kyu-tae Na
  • Patent number: 7056827
    Abstract: Methods of filling trenches/gaps defined by circuit elements on an integrated circuit substrate are provided. The methods include forming a first high-density plasma layer on an integrated circuit substrate including at least one trench thereon using a first reaction gas. The first high-density plasma layer is etched using an etch gas including nitrogen fluoride gas (NF3). A second high-density plasma layer is formed on the etched first high-density plasma layer using a second reaction gas including nitrogen fluoride.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: June 6, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-Won Cha, Kyu-tae Na
  • Publication number: 20060102940
    Abstract: The present invention is directed to a semiconductor device having a photodetector and a method of fabricating the same. The photodetector includes a visible ray absorbing pattern disposed on a top and/or bottom surface of an interconnection formed at a light shielding area between adjacent photodetectors, which prevents obliquely incident light from reaching an adjacent photodetector.
    Type: Application
    Filed: November 15, 2005
    Publication date: May 18, 2006
    Inventors: Yong-Won Cha, Eun-Kyung Baek, Kyu-Tae Na