Patents by Inventor Yonglian QI

Yonglian QI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984546
    Abstract: A method for manufacturing a side wire for a substrate and a substrate structure are provided. The method includes: forming a plurality of first pattern structures on a side surface of the substrate, wherein a gap between any adjacent two of the plurality of first pattern structures connects a top surface and a bottom surface of the substrate to each other; forming a conductive material film covering the side surface of the substrate; and removing the plurality of first pattern structures and a portion of the conductive material film that is attached on the plurality of first pattern structures, and maintaining a portion of the conductive material film that is located between any adjacent two of the plurality of first pattern structures as the side wire.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: May 14, 2024
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yonglian Qi, Lianjie Qu, Shan Zhang, Hebin Zhao, Xiaoling Xu, Guangdong Shi
  • Patent number: 11942485
    Abstract: A substrate includes a driving backplane, a plurality of first connecting lines and a plurality of second connecting lines. The driving backplane includes a base substrate, at least one first lead group and at least one second lead group. Each first lead group includes a plurality of first leads, and each second lead group includes a plurality of second leads. A first lead group and a corresponding second lead group is disposed in a peripheral region. The plurality of first connecting lines are disposed on at least one side face of the driving backplane, each first connecting line is electrically connected to at least one first lead. The plurality of second connecting lines are disposed on the at least one side face of the driving backplane, each second connecting line is electrically connected to at least one second lead, and is in contact with a corresponding first connecting line.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: March 26, 2024
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yonglian Qi, Hong Yang, Lianjie Qu, Shan Zhang, Hebin Zhao, Yun Qiu
  • Patent number: 11830763
    Abstract: A method of manufacturing thin film transistor(s) includes: providing a monocrystalline silicon wafer, the monocrystalline silicon wafer including a first surface and a second surface that are opposite to each other; forming a bubble layer between the first surface and the second surface of the monocrystalline silicon wafer, the bubble layer dividing the monocrystalline silicon wafer into two portions arranged side by side in a direction perpendicular to the second surface, and a portion of the monocrystalline silicon wafer that is located between the bubble layer and the second surface being a monocrystalline silicon film having a target thickness; providing a substrate, and transferring the monocrystalline silicon film onto the substrate by breaking the monocrystalline silicon wafer at the bubble layer; and patterning the monocrystalline silicon film transferred to the substrate to form active layer(s) of the thin film transistor(s).
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: November 28, 2023
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shan Zhang, Lianjie Qu, Yonglian Qi, Hebin Zhao
  • Patent number: 11670702
    Abstract: Provided is a thin film transistor including a highly-textured dielectric layer, an active layer, a gate electrode and a source/drain electrode that are stacked on a base substrate. The source/drain electrode includes a source electrode and a drain electrode. The gate electrode and the active layer are insulated from each other. The source electrode and the drain electrode are electrically connected to the active layer. Constituent particles of the active layer are of monocrystalline silicon-like structures. According to the present disclosure, the highly-textured dielectric layer is adopted to replace an original buffer layer to induce the active layer to grow into a monocrystalline silicon-like structure, such that the performance of the thin film transistor is improved.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: June 6, 2023
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bingqiang Gui, Lianjie Qu, Yonglian Qi, Hebin Zhao, Yun Qiu
  • Patent number: 11567387
    Abstract: A peeping prevention structure, a display device and a display method are provided. The peeping prevention structure includes: a first electrode and a second electrode opposite to each other; a plurality of transparent columnar cavities between the first electrode and the second electrode, wherein a plurality of opening regions are defined between the plurality of transparent columnar cavities, and each of the plurality of transparent columnar cavities is filled with charged light-absorbing particles; wherein, the charged light-absorbing particles are configured to, under a control of an electric field between the first electrode and the second electrode, be uniformly diffused in the transparent columnar cavity or be concentrated at an end of the transparent columnar cavity.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: January 31, 2023
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lianjie Qu, Bingqiang Gui, Yonglian Qi, Hebin Zhao, Yun Qiu
  • Patent number: 11482545
    Abstract: A method of forming an array substrate, the array substrate and a display device are provided. The method of forming the array substrate includes: in a case that a display unit is formed on one of two opposite surfaces of a base substrate and a driving circuit is formed on the other of the two opposite surfaces of the base substrate, performing a roughening treatment on edge regions of the two opposite surfaces of the base substrate and a side surface of the base substrate connecting the edge regions of the two opposite surfaces, to form a roughened region; and forming, at the roughened region, a metal wiring connecting a signal input terminal of the display unit and a signal output terminal of the driving circuit.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: October 25, 2022
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., Beijing BOE Technology Development Co., Ltd.
    Inventors: Yonglian Qi, Chao Liu, Lianjie Qu, Hebin Zhao, Shan Zhang, Ning Jia, Guangdong Shi, Shuai Liu
  • Patent number: 11320574
    Abstract: A light guide plate, a backlight module and a display device are provided. A plurality of blind holes is arranged at a surface of the light guide plate; the blind hole is filled with a light-converting unit; the light-converting unit includes an accommodating cavity made of a light-transmitting material, and a light-converting material located in the accommodating cavity; and a gap is between an outer wall of the accommodating cavity and an inner wall of the blind hole.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: May 3, 2022
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yonglian Qi, Xue Dong, Huijuan Wang, Zezhou Yang, Hebin Zhao, Lianjie Qu, Shuai Liu
  • Patent number: 11271016
    Abstract: An array substrate is disclosed. The array substrate may include a base substrate, gate lines and data lines intersecting the gate lines on the base substrate. The gate lines and the data lines may define a plurality of pixel regions. Each of at least some of the plurality of the pixel regions may be provided with an image sensor. The image sensor may include a sensitive element, a first electrode at one end of the sensitive element, and a second electrode at the other end of the sensitive element. The image sensor may be configured to sense light having image information.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: March 8, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Zhaokun Yang, Xiang Feng, Ruizhi Yang, Yonglian Qi
  • Patent number: 11257995
    Abstract: The present application provides an optical modulating device having a light transmissive region and a light blocking region. The optical modulating device includes a base substrate; a plurality of protrusions on the base substrate in the light transmissive region and configured to allow light emitting out of a side of the optical modulating device; and a reflective layer on the base substrate in the light blocking region and configured to block light from emitting out of the side of the optical modulating device.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: February 22, 2022
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventors: Yonglian Qi, Lianjie Qu, Hebin Zhao, Bingqiang Gui, Xianxue Yang, Shuai Liu, Guangdong Shi
  • Publication number: 20220037198
    Abstract: A method of manufacturing thin film transistor(s) includes: providing a monocrystalline silicon wafer, the monocrystalline silicon wafer including a first surface and a second surface that are opposite to each other; forming a bubble layer between the first surface and the second surface of the monocrystalline silicon wafer, the bubble layer dividing the monocrystalline silicon wafer into two portions arranged side by side in a direction perpendicular to the second surface, and a portion of the monocrystalline silicon wafer that is located between the bubble layer and the second surface being a monocrystalline silicon film having a target thickness; providing a substrate, and transferring the monocrystalline silicon film onto the substrate by breaking the monocrystalline silicon wafer at the bubble layer; and patterning the monocrystalline silicon film transferred to the substrate to form active layer(s) of the thin film transistor(s).
    Type: Application
    Filed: July 24, 2020
    Publication date: February 3, 2022
    Inventors: Shan ZHANG, Lianjie QU, Yonglian QI, Hebin ZHAO
  • Patent number: 11237450
    Abstract: The present disclosure relates to a display panel. The display panel includes a light switching layer, and a color film layer located on the light switching layer, wherein the color film layer includes a diffraction grating. The color film layer further includes a collimating layer located on a side of the diffraction grating facing away from the light switching layer. The color film layer further includes a light splitting layer located between the diffraction grating and the light switching layer.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: February 1, 2022
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lianjie Qu, Kang Guo, Yonglian Qi, Hebin Zhao
  • Patent number: 11233106
    Abstract: The present application discloses an array substrate, a display apparatus and a method of fabricating an array substrate. The array substrate has a plurality of first bottom-gate type thin film transistors each of which including a metal oxide active layer and a plurality of second bottom-gate type thin film transistors each of which including a silicon active layer.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: January 25, 2022
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventors: Lianjie Qu, Xiaogai Chun, Xue Gao, Hebin Zhao, Guangdong Shi, Shuai Liu, Yonglian Qi, Bingqiang Gui
  • Patent number: 11182008
    Abstract: This disclosure provides a liquid crystal display panel. The liquid crystal display panel comprises: a first substrate and a second substrate arranged oppositely, a plurality of main spacers located between the first substrate and the second substrate for supporting cell gap of the liquid crystal display panel, a plurality of auxiliary spacers located between the first substrate and the second substrate, and a plurality of pressure sensing electrodes in one-to-one correspondence with the plurality of auxiliary spacers; wherein a height of the auxiliary spacer is smaller than a height of the main spacer; a material of the auxiliary spacer is a piezoelectric material. This disclosure also discloses a manufacturing method of the liquid crystal display panel and a display device comprising the liquid crystal display panel.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: November 23, 2021
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lianjie Qu, Hebin Zhao, Yonglian Qi, Bingqiang Gui, Minqi Chen, Tao Liu
  • Publication number: 20210333459
    Abstract: A light guide plate, a backlight module and a display device are provided. A plurality of blind holes is arranged at a surface of the light guide plate; the blind hole is filled with a light-converting unit; the light-converting unit includes an accommodating cavity made of a light-transmitting material, and a light-converting material located in the accommodating cavity; and a gap is between an outer wall of the accommodating cavity and an inner wall of the blind hole.
    Type: Application
    Filed: September 14, 2018
    Publication date: October 28, 2021
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yonglian QI, Xue DONG, Huijuan WANG, Zezhou YANG, Hebin ZHAO, Lianjie QU, Shuai LIU
  • Patent number: 11152436
    Abstract: A display panel, fabrication method thereof, and a display device. The display panel includes a substrate and a plurality of pixels disposed on the substrate; each pixel includes a pixel circuit disposed on the substrate; the display panel further includes a pixel defining layer covering the pixel circuit; a surface of the pixel defining layer facing away from the pixel circuit is provided with a plurality of grooves; the plurality of grooves are in one-to-one correspondence with the plurality of pixels; each of the grooves is provided with a light emitting diode electrically connected to the pixel circuit.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: October 19, 2021
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shuai Liu, Yun Qiu, Hebin Zhao, Lianjie Qu, Yonglian Qi, Weiwei Tong, Guangdong Shi, Bin Yan, Tao Liu
  • Patent number: 11131930
    Abstract: A method for manufacturing a female mold is provided in the embodiments of the disclosure, comprising: providing a substrate; forming a substrate layer of the female mold on the substrate; forming on the substrate layer of the female mold a mask layer which is adapted to exposure by an X-ray; and exposing the substrate layer of the female mold to the X-ray from a side of the mask layer away from the substrate. A direction in which the X-ray irradiates is inclined at a predetermined oblique angle to the substrate layer of the female mold, in the process of exposing to the X-ray. Besides, a female mold is also provided.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: September 28, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Lianjie Qu, Fei Wang, Yonglian Qi, Hebin Zhao
  • Patent number: 11127764
    Abstract: The present disclosure provides a circuit substrate, a method for manufacturing the same, a display substrate and a tiled display device. The circuit substrate includes: a base substrate; a driving circuit on the base substrate; and conductive connection portions. A plurality of grooves is defined in a lateral side of the base substrate; each of the plurality of grooves extends through a top surface and an opposite bottom surface of the base substrate. The driving circuit includes signal lines on the top surface of the base substrate and signal-line leads on the bottom surface of the base substrate. The plurality of conductive connection portions are corresponding to the plurality of grooves in a one-to-one manner; at least one part of the conductive connection portion is in the corresponding groove. The conductive connection portion is connected with the corresponding signal line and the corresponding signal-line lead, respectively.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: September 21, 2021
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lianjie Qu, Yonglian Qi, Hebin Zhao, Yun Qiu, Xiaoling Xu, Ruizhi Yang, Guangdong Shi, Shiyu Xu, Shan Zhang
  • Patent number: 11107843
    Abstract: An array substrate includes a substrate, a dual-gate oxide thin film transistor TFT, an electrode for display and a polycrystalline silicon TFT. The dual-gate oxide thin film transistor TFT and the electrode for display are located in a sub-pixel on the substrate, and a drain electrode of the dual-gate oxide TFT is electrically connected to the electrode for display.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: August 31, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Lianjie Qu, Bingqiang Gui, Yonglian Qi, Hebin Zhao, Yun Qiu, Dan Wang
  • Patent number: 11101368
    Abstract: A method of forming a crystallized semiconductor layer includes forming an insulating crystallization inducing layer on a base substrate; forming a semiconductor material layer on a side of the insulating crystallization inducing layer away from the base substrate by depositing a semiconductor material on the insulating crystallization inducing layer, the semiconductor material being deposited at a deposition temperature that induces crystallization of the semiconductor material; forming an alloy crystallization inducing layer including an alloy on a side of the semiconductor material layer away from the insulating crystallization inducing layer; and annealing the alloy crystallization inducing layer to further induce crystallization of the semiconductor material to form the crystallized semiconductor layer.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: August 24, 2021
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE Technology Group Co., Ltd.
    Inventors: Lianjie Qu, Hebin Zhao, Yonglian Qi, Yun Qiu, Dan Wang
  • Patent number: 11094799
    Abstract: A thin film transistor includes: a bottom gate electrode; a bottom gate electrode insulating layer, a semiconducting active layer and a first insulating layer which are disposed on the bottom gate electrode in sequence; a source electrode and a drain electrode which are disposed at a side of the first insulating layer away from the bottom gate electrode; vias disposed in the first insulating layer at positions which correspond to the source electrode and the drain electrode respectively; and ohmic contact layers disposed on and covering the semiconducting active layer at positions corresponding to the vias respectively. Each of the source electrode and the drain electrode is in contact with a corresponding one of the ohmic contact layers through a corresponding one of the vias.
    Type: Grant
    Filed: September 30, 2017
    Date of Patent: August 17, 2021
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Bingqiang Gui, Lianjie Qu, Yonglian Qi, Hebin Zhao