Abstract: This application provide a positioning method, including: obtaining, by a first electronic device, a first location of a second electronic device; determining a plurality of candidate locations by using the first location as a center point; selecting a plurality of candidate positioning locations from the plurality of candidate locations based on elevations and azimuths of a plurality of satellites relative to the candidate locations, grid data corresponding to the plurality of candidate locations, and signal parameters of broadcast signals received by the second electronic device from the plurality of satellites; and correcting the first location based on the plurality of candidate positioning locations, to output a corrected second location.

Abstract: An image processing method includes: acquiring an input image of a teaching scenario; performing detection on the input image to determine a rectangular detection area that includes a blackboard-writing area; analyzing the rectangular detection area to determine a target area corresponding to the blackboard-writing area; determining four vertices of the target area; and according to the four vertices of the target area, performing coordinate transformation on the target area to obtain a corrected blackboard-writing area image.

Abstract: A die steel with a high thermal diffusion coefficient includes 0.30-0.40 wt. % of C, 0.05-0.10 wt. % of Si, 2.50-3.40 wt. % of Mo, 0.01-0.05 wt. % of Nb, 0.30-0.50 wt. % of Co, 0.01-0.05 wt. % of RE, the rest is Fe and unavoidable impurities, wherein in the die steel, P?0.15 wt. %, S?0.025 wt. %. A preparation method of the die steel includes steps of melting, electroslag remelting, electroslag ingot annealing, forging, spheroidizing annealing, quenching and tempering.

Abstract: A method and a device for producing medium-thickness plates with high thickness precision through a CVC steckel mill. The method includes the following: heating a blank in the heating furnace, and roughly descaling by the descaling machine; enabling the blank to enter the rolling mill, after multi-pass flat rolling, carrying out multi-pass rolling, carrying out linkage rolling of the rolling mill and the coiler furnaces in the rolling process, and enabling the rolling tension to reach a set value; controlling the temperatures of the coiler furnace to a set value in the coiling process; and in the rolling process, starting 30-70% of the original flow of cooling water of the working roll of the rolling mill; and after rolling is finished, finishing the production process through the laminar cooling system and the hot straightening machine respectively.

Abstract: A semiconductor device and a method for manufacturing the same. The semiconductor device includes: a first gate-all-around (GAA) transistor disposed in the first region, including a first nanowire or nanosheet of at least one first layer, the at least one first layer and the substrate form a first group, among which all pairs of adjacent layers are separated by first distances, respectively; and a second GAA transistor disposed in the second region, including a second nanowire or nanosheet of at least two second layers, the at least two second layers and the substrate form a second group, among which the second layers are separated by second distances, respectively; where a minimum first distance is greater than a maximum second distance, and a quantity of the at least one first layer is less than a quantity of the at least two second layers.

Abstract: A semiconductor device and a method of manufacturing the same are disclosed. The semiconductor device includes: a substrate and a channel portion. The channel portion includes a first portion including a fin-shaped structure protruding with respect to the substrate and a second portion located above the first portion and spaced apart from the first portion. The second portion includes one or more nanowires or nanosheets spaced apart from each other. Source/drain portions are arranged on two opposite sides of the channel portion in a first direction and in contact with the channel portion. A gate stack extends on the substrate in a second direction intersecting with the first direction, so as to intersect with the channel portion.

Abstract: The present disclosure provides a cooperative access method, system, and architecture of an external storage.

Abstract: A system, method, and computer-readable medium are disclosed for management of a distributed web application firewall (WAF) cluster that supports one or more protected applications. A WAF cluster infrastructure is configured for the protected applications. The WAF cluster includes one or more WAFs that are used to route traffic directed to the protected applications. The WAF cluster infrastructure is validated as to be current and updated. The validated WAF cluster infrastructure is then used as routing service.

Abstract: A stacked nanowire or nanosheet gate-all-around device, including: a silicon substrate; stacked nanowires or nanosheets located on the silicon substrate, extending along a first direction gate stacks and including multiple nanowires or nanosheets that are stacked; a gate stack, surrounding each of the stacked nanowires or nanosheets, and extending along a second direction, where first spacers are located on two sidewalls of the gate stack in the first direction; source-or-drain regions, located at two sides of the gate stack along the first direction; a channel region, including a portion of the stacked nanowires or nanosheets that is located between the first spacers. A notch structure recessed inward is located between the stacked nanowires or nanosheets and the silicon substrate, and includes an isolator that isolates the stacked nanowires or nanosheets from the silicon substrate. A method for manufacturing the stacked nanowire or nanosheet gate-all-around device is further provided.

Abstract: The present disclosure provides a cooperative access method, system, and architecture of an external storage.

Abstract: A web application firewall (WAF) receives an application request from a router, wherein the application request is directed to a web application, and wherein the web application firewall is associated with the web application. The WAF updates the application request to include a first header, wherein the first header includes a copy of a uniform resource locator of the application request, and updates the uniform resource locator to indicate an address of the web application firewall. The WAF analyzes the application request to determine whether the application request is secure, wherein the analysis is based on a rule, and in response to a determination that the application request is secure, updates the application request to include a second header, wherein the second header includes an encrypted signature.

Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.

Abstract: A stacked nanowire or nanosheet gate-all-around device, including: a silicon substrate; stacked nanowires or nanosheets located on the silicon substrate, extending along a first direction gate stacks and including multiple nanowires or nanosheets that are stacked; a gate stack, surrounding each of the stacked nanowires or nanosheets, and extending along a second direction, where first spacers are located on two sidewalls of the gate stack in the first direction; source-or-drain regions, located at two sides of the gate stack along the first direction; a channel region, including a portion of the stacked nanowires or nanosheets that is located between the first spacers. A notch structure recessed inward is located between the stacked nanowires or nanosheets and the silicon substrate, and includes an isolator that isolates the stacked nanowires or nanosheets from the silicon substrate. A method for manufacturing the stacked nanowire or nanosheet gate-all-around device is further provided.

Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.

Abstract: The disclosure provides a method for fabricating a semiconductor device, in which a core device of the semiconductor device employs a stacked nanowires or nanosheets structure, and an input/output device of the semiconductor device employs FinFET structure. The disclosure also provides a FinFET with an input/output device compatible with the stacked nanowires or nanosheets. The solution of the disclosure solves the problem that if the input/output device employs stacked nanowires or nanosheets device, it is difficult to fill a metal gate between two nanowires or nanosheets due to the thicker dielectric layer, and even if the metal gate is filled partially, the electrical performance of the input/output device is still poor.

Abstract: A system, method, and computer-readable medium are disclosed for management of a distributed web application firewall (WAF) cluster that supports one or more protected applications. A WAF cluster infrastructure is configured for the protected applications. The WAF cluster includes one or more WAFs that are used to route traffic directed to the protected applications. The WAF cluster infrastructure is validated as to be current and updated. The validated WAF cluster infrastructure is then used as routing service.

Abstract: A web application firewall (WAF) receives an application request from a router, wherein the application request is directed to a web application, and wherein the web application firewall is associated with the web application. The WAF updates the application request to include a first header, wherein the first header includes a copy of a uniform resource locator of the application request, and updates the uniform resource locator to indicate an address of the web application firewall. The WAF analyzes the application request to determine whether the application request is secure, wherein the analysis is based on a rule, and in response to a determination that the application request is secure, updates the application request to include a second header, wherein the second header includes an encrypted signature.

Abstract: The disclosure provides a semiconductor device, a manufacturing method thereof, and an electronic device including the device. The semiconductor device includes: a substrate, the substrate being a silicon substrate or an SOI substrate; a SiGe Fin formed on the substrate, wherein the SiGe Fin is a sandwich-like SixGe1-x/SiyGe1-y/SizGe1-z structure with different Ge contents in the horizontal direction, where x is 0.05˜0.95, y is 0.1˜0.9, and z is 0.05˜0.95; and a shallow trench isolation region disposed on the substrate and adjacent to all sides of the SiGe Fin, wherein a top surface of the SiGe Fin facing away from the substrate protrudes from the shallow trench isolation region. The disclosure proposes a device structure of a sandwich-like SixGe1-x/SiyGe1-y/SizGe1-z Fin structure with different Ge contents, which can adjust the Ge content to change the band gap, thereby adjusting the threshold, and improving electrical properties such as mobility (effective mass change) and leakage.

Abstract: The invention provides a device and the use thereof in a cell experiment in vitro. This device has a polydopamine layer-carboxymethyl chitosan layer-peptide layer structure, which is capable of regulating behaviors of human pluripotent stem cells and is useful in cell culture or a cell experiment in vitro.

Abstract: Provided are techniques for movement readiness checking. It is determined whether each content object in a set of content objects is ready for movement. For each content object in the set of content objects that is determined to be ready for movement, an associated movement readiness indicator is set to indicate that the content object is ready to be moved. Then, each content object in the set of content objects is moved that has the associated movement readiness indicator set to indicate that the content object is ready to be moved.