Patents by Inventor Yongliang Li

Yongliang Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11446885
    Abstract: Disclosed is a friction-reducing and anti-wear composite material for a wading kinematic pair and a method of preparing the same. The friction-reducing and anti-wear composite material is prepared from carbon fiber (CF) among inorganic fillers, polyimide (PI) and polyether ether ketone (PEEK). These three materials are wet-mixed, dried and placed in a mold followed by curing by a heat press. The cured product is cooled and demolded to obtain the CF/PI/PEEK friction-reducing and anti-wear composite material for a wading kinematic pair. Tribological properties of the PEEK material are enhanced due to synergistic effect arising from hybrid organic-inorganic filling. The friction-reducing and anti-wear composite material provided in the invention has significantly reduced friction coefficient and wear volume loss under the seawater environment.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: September 20, 2022
    Assignee: Wuhan Research Institute Of Materials Protection
    Inventors: Haitao Duan, Tian Yang, Jian Li, Meng Yi, Jiesong Tu, Dan Jia, Shengpeng Zhan, Yongliang Jin, Jianwei Qi
  • Publication number: 20220283318
    Abstract: This application provide a positioning method, including: obtaining, by a first electronic device, a first location of a second electronic device; determining a plurality of candidate locations by using the first location as a center point; selecting a plurality of candidate positioning locations from the plurality of candidate locations based on elevations and azimuths of a plurality of satellites relative to the candidate locations, grid data corresponding to the plurality of candidate locations, and signal parameters of broadcast signals received by the second electronic device from the plurality of satellites; and correcting the first location based on the plurality of candidate positioning locations, to output a corrected second location.
    Type: Application
    Filed: February 2, 2022
    Publication date: September 8, 2022
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Wei Li, Yongliang Wang, Chengyu Li
  • Publication number: 20220270260
    Abstract: A video segmentation method and apparatus, an electronic device, and a computer-readable storage medium, related to the technical field of video processing. The method comprises: acquiring a video frame to be processed in a target-video, and information to be segmented in the video frame to be processed; determining a tilt angle corresponding to the video frame to be processed according to the information to be segmented; performing correction processing on the video frame to be processed according to the tilt angle, to obtain a corrected video frame; and performing image segmentation on the corrected video frame according to the information to be segmented, to determine an image to be played.
    Type: Application
    Filed: March 29, 2021
    Publication date: August 25, 2022
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Peng Li, Wenjuan Li, Guangyu Shao, Shuyi Li, Yang Qin, Yongliang Han, Hong Wang, Yiming Lei
  • Publication number: 20220255426
    Abstract: A circuit includes a first passive device between supply and bias nodes, a first switching device and a second passive device between the bias and a reference node, a transistor between the supply and an output node, a third passive device and a second switching device between the output and a feedback node, a fourth passive device between the feedback and reference nodes, a third switching device between the supply and output nodes, and an amplifier controlling the transistor based on bias node and feedback node voltages. In a first mode, the first and second switching devices are off, the third switching device is on, and the supply node receives a first voltage level. In a second mode, the first and second switching devices are on, the third switching device is off, and a second voltage level greater than the first voltage level is received on the supply node.
    Type: Application
    Filed: April 23, 2021
    Publication date: August 11, 2022
    Inventors: Wei LI, Yongliang JIN, Yaqi MA
  • Publication number: 20220004522
    Abstract: The present disclosure provides a cooperative access method, system, and architecture of an external storage.
    Type: Application
    Filed: December 2, 2019
    Publication date: January 6, 2022
    Applicants: VeriSilicon Microelectronics (Chengdu) Co., Ltd., VeriSilicon Microelectronics (Shanghai) Co., Ltd., VeriSilicon Holdings Co., Ltd., VeriSilicon Microelectronics (Nanjing) Co., Ltd.
    Inventor: Yongliang LI
  • Patent number: 11218445
    Abstract: A web application firewall (WAF) receives an application request from a router, wherein the application request is directed to a web application, and wherein the web application firewall is associated with the web application. The WAF updates the application request to include a first header, wherein the first header includes a copy of a uniform resource locator of the application request, and updates the uniform resource locator to indicate an address of the web application firewall. The WAF analyzes the application request to determine whether the application request is secure, wherein the analysis is based on a rule, and in response to a determination that the application request is secure, updates the application request to include a second header, wherein the second header includes an encrypted signature.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: January 4, 2022
    Assignee: Dell Products L.P.
    Inventors: Mark D. Owens, Frank DiRosa, Rene Herrero, Yongliang Li, Everton Schäfer
  • Patent number: 11024708
    Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: June 1, 2021
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Yongliang Li, Xiaohong Cheng, Qingzhu Zhang, Huaxiang Yin, Wenwu Wang
  • Publication number: 20210151561
    Abstract: A stacked nanowire or nanosheet gate-all-around device, including: a silicon substrate; stacked nanowires or nanosheets located on the silicon substrate, extending along a first direction gate stacks and including multiple nanowires or nanosheets that are stacked; a gate stack, surrounding each of the stacked nanowires or nanosheets, and extending along a second direction, where first spacers are located on two sidewalls of the gate stack in the first direction; source-or-drain regions, located at two sides of the gate stack along the first direction; a channel region, including a portion of the stacked nanowires or nanosheets that is located between the first spacers. A notch structure recessed inward is located between the stacked nanowires or nanosheets and the silicon substrate, and includes an isolator that isolates the stacked nanowires or nanosheets from the silicon substrate. A method for manufacturing the stacked nanowire or nanosheet gate-all-around device is further provided.
    Type: Application
    Filed: March 20, 2020
    Publication date: May 20, 2021
    Inventors: Yongliang LI, Xiaohong CHENG, Qingzhu ZHANG, Huaxiang YIN, Wenwu WANG
  • Publication number: 20210151557
    Abstract: A semiconductor device, including: a silicon substrate; multiple fin structures, formed on the silicon substrate, where each extends along a first direction; a shallow trench insulator, located among the multiple fin structures; a gate stack, intersecting with the multiple fin structures and extending along a second direction, where first spacers are formed on two sidewalls in the first direction of the gate stack; source-or-drain regions, formed on the multiple fin structures, and located at two sides of the gate stack along the first direction; and a channel region, including a portion of the multiple fin structures located between the first spacers. and notch structures. A notch structure recessed inward is located between each of the multiple fin structures and the silicon substrate. The notch structure includes an isolator that isolates each of the multiple fin structures from the silicon substrate.
    Type: Application
    Filed: March 20, 2020
    Publication date: May 20, 2021
    Inventors: Yongliang LI, Xiaohong CHENG, Qingzhu ZHANG, Huaxiang YIN, Wenwu WANG
  • Publication number: 20210125873
    Abstract: The disclosure provides a method for fabricating a semiconductor device, in which a core device of the semiconductor device employs a stacked nanowires or nanosheets structure, and an input/output device of the semiconductor device employs FinFET structure. The disclosure also provides a FinFET with an input/output device compatible with the stacked nanowires or nanosheets. The solution of the disclosure solves the problem that if the input/output device employs stacked nanowires or nanosheets device, it is difficult to fill a metal gate between two nanowires or nanosheets due to the thicker dielectric layer, and even if the metal gate is filled partially, the electrical performance of the input/output device is still poor.
    Type: Application
    Filed: July 8, 2020
    Publication date: April 29, 2021
    Inventors: Yongliang LI, Hong YANG, Xiahong CHENG, Xiaolei WANG, Xueli MA, Wenwu WANG
  • Publication number: 20210112032
    Abstract: A system, method, and computer-readable medium are disclosed for management of a distributed web application firewall (WAF) cluster that supports one or more protected applications. A WAF cluster infrastructure is configured for the protected applications. The WAF cluster includes one or more WAFs that are used to route traffic directed to the protected applications. The WAF cluster infrastructure is validated as to be current and updated. The validated WAF cluster infrastructure is then used as routing service.
    Type: Application
    Filed: October 15, 2019
    Publication date: April 15, 2021
    Applicant: Dell Products L.P.
    Inventors: Frank DiRosa, Rene Herrero, Poul C. Frederiksen, Yongliang Li, Rashmi Krishnamurthy
  • Publication number: 20210036991
    Abstract: A web application firewall (WAF) receives an application request from a router, wherein the application request is directed to a web application, and wherein the web application firewall is associated with the web application. The WAF updates the application request to include a first header, wherein the first header includes a copy of a uniform resource locator of the application request, and updates the uniform resource locator to indicate an address of the web application firewall. The WAF analyzes the application request to determine whether the application request is secure, wherein the analysis is based on a rule, and in response to a determination that the application request is secure, updates the application request to include a second header, wherein the second header includes an encrypted signature.
    Type: Application
    Filed: July 29, 2019
    Publication date: February 4, 2021
    Inventors: Mark D. Owens, Frank DiRosa, Rene Herrero, Yongliang Li, Everton Schäfer
  • Publication number: 20200381540
    Abstract: The disclosure provides a semiconductor device, a manufacturing method thereof, and an electronic device including the device. The semiconductor device includes: a substrate, the substrate being a silicon substrate or an SOI substrate; a SiGe Fin formed on the substrate, wherein the SiGe Fin is a sandwich-like SixGe1-x/SiyGe1-y/SizGe1-z structure with different Ge contents in the horizontal direction, where x is 0.05˜0.95, y is 0.1˜0.9, and z is 0.05˜0.95; and a shallow trench isolation region disposed on the substrate and adjacent to all sides of the SiGe Fin, wherein a top surface of the SiGe Fin facing away from the substrate protrudes from the shallow trench isolation region. The disclosure proposes a device structure of a sandwich-like SixGe1-x/SiyGe1-y/SizGe1-z Fin structure with different Ge contents, which can adjust the Ge content to change the band gap, thereby adjusting the threshold, and improving electrical properties such as mobility (effective mass change) and leakage.
    Type: Application
    Filed: April 10, 2020
    Publication date: December 3, 2020
    Inventors: Yongliang Li, Anyan Du, Zhenhua Wu, Chaolei Li, Wenwu Wang
  • Patent number: 10597634
    Abstract: The invention provides a device and the use thereof in a cell experiment in vitro. This device has a polydopamine layer-carboxymethyl chitosan layer-peptide layer structure, which is capable of regulating behaviors of human pluripotent stem cells and is useful in cell culture or a cell experiment in vitro.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: March 24, 2020
    Assignee: Peking University School and Hospital of Stomatology
    Inventors: Shicheng Wei, Ping Zhou, Xiaohong Zhang, Yongliang Li, Mengke Wang
  • Patent number: 10114844
    Abstract: Provided are techniques for movement readiness checking. It is determined whether each content object in a set of content objects is ready for movement. For each content object in the set of content objects that is determined to be ready for movement, an associated movement readiness indicator is set to indicate that the content object is ready to be moved. Then, each content object in the set of content objects is moved that has the associated movement readiness indicator set to indicate that the content object is ready to be moved.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: October 30, 2018
    Assignee: International Business Machines Corporation
    Inventors: Gerald E. Kozina, Yongliang Li, Masoud Madani, George F. Silva
  • Patent number: 10107838
    Abstract: The present invention provides an online monitoring circuit of the series compensation spark gap divider return circuit. Said series compensation spark gap divider return circuit includes a voltage equalization link and a voltage sampling link. Said voltage link includes the capacitor C which series said voltage equalization link. Said online monitoring circuit includes the voltage sampling input module, series compensation current input module and the compare module. Said sampling voltage input module after amplified the voltage of the two ends of the series capacitor C converts it into direct current signal.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: October 23, 2018
    Assignees: STATE GRID COOPERATION OF CHINA, CHINA ELECTRIC POWER RESEARCH INSTITUTE
    Inventors: Guofu Li, Hui Yu, Zhiyuan Li, Yongliang Li
  • Patent number: 10056753
    Abstract: This document discusses, among other things, an electro-static discharge (EDS) filtering circuit and method, a reset circuit, and an electronic device. The ESD filtering circuit comprises a first current dividing circuit and a second current dividing circuit which respectively share a current of a first power source signal and aggregate the shared currents to form a second power source signal upon filtering, wherein a voltage drop of the first current dividing circuit is constant and the second current dividing circuit is a pure resistor element circuit.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: August 21, 2018
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Peng Zhu, Lei Huang, Yongliang Li
  • Publication number: 20180142205
    Abstract: The invention provides a device and the use thereof in a cell experiment in vitro. This device has a polydopamine layer-carboxymethyl chitosan layer-peptide layer structure, which is capable of regulating behaviors of human pluripotent stem cells and is useful in cell culture or a cell experiment in vitro.
    Type: Application
    Filed: December 9, 2015
    Publication date: May 24, 2018
    Applicant: Peking University School And Hospital of Stomatology
    Inventors: Shicheng Wei, Ping Zhou, Xiaohong Zhang, Yongliang Li, Mengke Wang
  • Patent number: 9934256
    Abstract: End of retention processing is provided. Included is: creating, using a content manager (CM), an end of retention policy for a content in a database management system (DBMS; and creating, based on the end of retention policy, a stored procedure in the DBMS for managing the end of retention policy.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Tawei Hu, Iun V. Leong, Yongliang Li, Phong K. Truong
  • Patent number: 9934255
    Abstract: End of retention processing is provided. Included is: creating, using a content manager (CM), an end of retention policy for a content in a database management system (DBMS; and creating, based on the end of retention policy, a stored procedure in the DBMS for managing the end of retention policy.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Tawei Hu, Iun V. Leong, Yongliang Li, Phong K. Truong