Abstract: A voltage dropping apparatus may include: a voltage dropping unit receiving an input voltage, outputting the input voltage in a first mode, and dropping a level of the input voltage in a second mode; a voltage output unit connected to the voltage dropping unit, receiving and outputting the input voltage in the first mode, and receiving and outputting the dropped voltage in the second mode; and a control unit receiving a mode signal and controlling a mode change of the voltage dropping unit and the voltage output unit based on a value of the mode signal.

Abstract: A low-drop-output type voltage regulator may include an error amplifier providing a gate signal depending on a voltage difference between a reference voltage and a feedback voltage, a semiconductor switch adjusting a current between an input terminal receiving a battery voltage and a ground, in response to the gate signal, a feedback circuit dividing and detecting a detection voltage in a detection node between the semiconductor switch and the ground and providing the feedback voltage, a voltage sensor sensing the battery voltage, and a feedback voltage controller adjusting a level of the feedback voltage depending on the sensed battery voltage.

Abstract: A radio frequency switch circuit may include: a first switch circuit unit connected between a first signal port for transmitting and receiving a signal and a common connection node and operated by a first gate signal; a second switch circuit unit connected between a second signal port for transmitting and receiving a signal and the common connection node and operated by a second gate signal; a first shunt circuit unit including first and second shunt units connected to each other in series between a first connection node connected to the first signal port and a ground, the first shunt unit being operated by the first gate signal and the second shunt unit being operated by the second gate signal; and a second shunt circuit unit connected between a second connection node connected to the second signal port and the ground and operated by the first gate signal.

Abstract: A radio frequency (RF) switching circuit may include: a first switching circuit unit connected between a first signal port for signal transmission and reception and a common connection node connected to an antenna port and operated according to a first gate signal; a second switching circuit unit connected between a second signal port for signal transmission and reception and the common connection node and operated according to a second gate signal; a negative voltage generating unit generating a negative voltage using a voltage of an RF signal from the common connection node; and a gate signal generating unit generating the first and second gate signals using the negative voltage from the negative voltage generating unit and an operating voltage.

Abstract: A radio frequency switching circuit may include a first switching circuit unit including first to nth (n is a natural number greater than at least 2) transistors M1 to Mn connected in series between a first signal port for transmission and reception of signals and a common connection node connected to an antenna port and operated according to a first gate signal; a second switching circuit unit connected in series between the common connection node and a second signal port for transmission and reception of signals and operated according to a second gate signal; and a first impedance adjuster forming an alternating current (AC) ground path between a ground and a gate of the first transistor of the first switching circuit unit when the first switching circuit unit is in an off-state.

Abstract: A RF switch may include: a common port coupled to an antenna to transmit and receive first and second high frequency signals; a transmitting switching unit coupled between a transmitting port transferring the first high frequency signal and the common port and including a plurality of switching devices coupled to each other in series; and a receiving switching unit coupled between a receiving port transferring the second high frequency signal and the common port and including a first switching unit including a first switching device. The first switching unit may further include a second switching device having a first terminal coupled to a first terminal of the first switching device and a second terminal coupled to a control terminal of the first switching device.

Abstract: A radio frequency switch may include: a common port transmitting and receiving a radio frequency signal; a receive switch unit including a first switch unit having a plurality of first switch elements and a second switch unit having a plurality of second switch elements; and a transmit switch unit including a third switch unit having a plurality of third switch elements and a fourth switch unit having a plurality of fourth switch elements. The receive switch unit may further include a plurality of first capacitors connected between a first terminal and a body terminal of each of the plurality of first switch elements. The transmit switch unit may further include a plurality of second capacitors connected between a second terminal and a body terminal of each of the plurality of third switch elements.

Abstract: A radio frequency switch may include: a common port transmitting and receiving a radio frequency signal; a receive switch unit including a first switch unit having a plurality of first switch elements and a second switch unit having a plurality of second switch elements; and a transmit switch unit including a third switch unit having a plurality of third switch elements and a fourth switch unit having a plurality of fourth switch elements. The receive switch unit may further include a plurality of first capacitors connected between a first terminal and a body terminal of each of the plurality of first switch elements. The transmit switch unit may further include a plurality of second capacitors connected between a second terminal and a body terminal of each of the plurality of third switch elements.

Abstract: A radio frequency switch may include a common port transmitting and receiving a radio frequency signal, a first switching unit including a plurality of first switch elements connected in series and opening or closing a signal transfer path between a first port inputting and outputting the radio frequency signal and the common port, and a second switching unit having a plurality of second switch elements connected in series and opening or closing a signal transfer path between a second port inputting and outputting the radio frequency signal and the common port. The second switching unit further includes a first filter circuit unit connected to a control terminal of at least one second switch element among the plurality of second switch elements to remove at least one preset frequency band signal.

Abstract: A radio frequency (RF) switching circuit may include: a first switching circuit unit connected between a first signal port for signal transmission and reception and a common connection node connected to an antenna port and operated according to a first gate signal; a second switching circuit unit connected between a second signal port for signal transmission and reception and the common connection node and operated according to a second gate signal; a negative voltage generating unit generating a negative voltage using a voltage of an RF signal from the common connection node; and a gate signal generating unit generating the first and second gate signals using the negative voltage from the negative voltage generating unit and an operating voltage.

Abstract: A radio frequency (RF) switch may include: a common port; a first switching unit; and a second switching unit. The first switching unit further includes a third switching device having one end coupled to a body of one of the plurality of first switching devices and the other end coupled to a first ground terminal, and the second switching unit further includes a fourth switching device having one end coupled to a body of one of the plurality of second switching devices and the other end coupled to a second ground terminal.

Abstract: A RF switch may include: a common port coupled to an antenna to transmit and receive first and second high frequency signals; a transmitting switching unit coupled between a transmitting port transferring the first high frequency signal and the common port and including a plurality of switching devices coupled to each other in series; and a receiving switching unit coupled between a receiving port transferring the second high frequency signal and the common port and including a first switching unit including a first switching device. The first switching unit may further include a second switching device having a first terminal coupled to a first terminal of the first switching device and a second terminal coupled to a control terminal of the first switching device.

Abstract: A radio frequency switching circuit may include a first switching circuit unit including first to nth (n is a natural number greater than at least 2) transistors M1 to Mn connected in series between a first signal port for transmission and reception of signals and a common connection node connected to an antenna port and operated according to a first gate signal; a second switching circuit unit connected in series between the common connection node and a second signal port for transmission and reception of signals and operated according to a second gate signal; and a first impedance adjuster forming an alternating current (AC) ground path between a ground and a gate of the first transistor of the first switching circuit unit when the first switching circuit unit is in an off-state.

Abstract: Disclosed herein is a circuit for preventing an element from being damaged although output impedance of a final transistor is changed in a power amplifier. The power amplifier includes: a power stage amplifying a signal; a transformer connected to an output terminal of the power stage and coupling a signal output from the power stage; and a controller controlling a bias voltage from the power stage according to the coupled signal. Although output impedance is changed, damage to the power amplifier can be prevented. Also, the power amplifier can be automatically controlled to maintain performance thereof by sensing an operational state in which output impedance is normal.

Abstract: There are provided an analog-to-digital signal conversion method and apparatus therefor, and a digital phase locked loop circuit including the same. The analog-to-digital signal conversion method may include: generating a first digital output signal having N number of bits by comparing each of N number of delay signals detected from output terminals of N number of delay cells with a reference signal; generating a second digital output signal by comparing an auxiliary delay signal generated by an (N+1)th delay cell with the reference signal; and determining a change in a delay time of each of the N number of delay cells based on the first digital output signal and the second digital output signal.

Abstract: There is provided a digitally controlled oscillator. The digitally controlled oscillator includes a resonance circuit unit generating a resonance signal according to an equivalent capacitance formed by a parallel connection between a first capacitance varied depending on a digital control code and a second capacitance varied depending on an inverted digital control code generated by inverting the digital control code, and preset inductance; and an oscillation circuit unit providing negative resistance to the resonance circuit unit and forming oscillation conditions in the resonance circuit unit.

Abstract: There are provided an analog-to-digital signal conversion method and apparatus therefor, and a digital phase locked loop circuit including the same. The analog-to-digital signal conversion method may include: generating a first digital output signal having N number of bits by comparing each of N number of delay signals detected from output terminals of N number of delay cells with a reference signal; generating a second digital output signal by comparing an auxiliary delay signal generated by an (N+1)th delay cell with the reference signal; and determining a change in a delay time of each of the N number of delay cells based on the first digital output signal and the second digital output signal.

Abstract: The present invention includes: a temperature compensation circuit for generating a digital signal corresponding to a temperature of a transistor and outputting a compensation bias current obtained by adding a control current to a reference bias current or by subtracting the control signal from the reference bias current using the generated digital signal; a characteristics compensation circuit for detecting a characteristics error of a mirror transistor connected to the transistor in parallel and for outputting a compensation signal to compensate the characteristics error; and a bias compensation circuit for compensating a bias power applied to the transistor using the compensation bias current and the compensation signal to output the compensated bias power. The present invention is capable of improving the performance of the transistor.

Abstract: The present invention includes: a temperature compensation circuit for generating a digital signal corresponding to a temperature of a transistor and outputting a compensation bias current obtained by adding a control current to a reference bias current or by subtracting the control signal from the reference bias current using the generated digital signal; a characteristics compensation circuit for detecting a characteristics error of a mirror transistor connected to the transistor in parallel and for outputting a compensation signal to compensate the characteristics error; and a bias compensation circuit for compensating a bias power applied to the transistor using the compensation bias current and the compensation signal to output the compensated bias power. The present invention is capable of improving the performance of the transistor.

Abstract: There is provided a multi-mode power amplifier having increased isolation, including: a high power mode amplifying unit amplifying an input signal by a pre-set gain when the input signal has a power level higher than a pre-set reference level; a low power mode amplifying unit amplifying the input signal by a pre-set gain when the input signal has a power level lower than the pre-set reference level; a switch unit including one or more switches selectively proving a signal transmission path to the high power mode amplifying unit and the low power mode amplifying unit; and a controller providing a control signal having a pre-set voltage level for switching the one or more switches of the switch unit on or off, the voltage level of the control signal for switching the one or more switches off being set to be a negative voltage.