Patents by Inventor Yorito Sakano

Yorito Sakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200365629
    Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.
    Type: Application
    Filed: August 7, 2020
    Publication date: November 19, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
  • Patent number: 10777597
    Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: September 15, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Jun Ogi, Yoshiaki Tashiro, Takahiro Toyoshima, Yorito Sakano, Yusuke Oike, Hongbo Zhu, Keiichi Nakazawa, Yukari Takeya, Atsushi Okuyama, Yasufumi Miyoshi, Ryosuke Matsumoto, Atsushi Horiuchi
  • Patent number: 10777602
    Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: September 15, 2020
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yorito Sakano
  • Patent number: 10757350
    Abstract: A solid-state image pickup device and an electronic apparatus that enable the performance of a logarithmic sensor in a solar-cell mode to improve. After Signal (S) is read, a P-phase signal (N) is read in a conducted state in which RST is ON, and a P-phase signal (N?) is read in a non-conducted state in which the RST is OFF. Thus, in a case where sufficient incident light illuminance is provided (Bright), S-N being the difference with respect to the P phase acquired in the conducted state in which the RST is ON, is selected and output. In a case where capacitance is insufficiently charged in a low-illuminance condition in which the incident light is less in amount (Dark), S-N? being the difference with respect to the P phase acquired in the conducted state in which the RST is OFF, is selected and output.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: August 25, 2020
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshiaki Tashiro, Yorito Sakano
  • Publication number: 20200235151
    Abstract: The present disclosure relates to a solid-state image pickup device that is capable of increasing an area efficiency of a Si interface on the transistor element side, and an electronic apparatus. A PD unit has a Tr-side Si/SiO2 interface formed to be p-type, and has an embedded PD. The PD, which is n-type, performs photoelectric conversion, and accumulates an electrical charge. A TG transfers the electrical charge accumulated in the PD to an FD. An Amp is connected to the FD. An RST is connected to a Reset Drain (RD), and resets the FD. An FDG is a conversion-efficiency switching switch. An FC is a MOS capacitance (gate electrode) that is connected to the FDG. A SEL selects a pixel that outputs a signal. The present disclosure can be applied to a CMOS solid-state image pickup device used for, for example, an image pickup device such as a camera.
    Type: Application
    Filed: August 26, 2016
    Publication date: July 23, 2020
    Inventors: RYOJI SUZUKI, YORITO SAKANO
  • Publication number: 20200186732
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device capable of effectively preventing blooming. Provided is a solid-state imaging device including: a pixel array portion in which a plurality of pixels is two-dimensionally arranged, in which the pixels each include an in-pixel capacitance and a counter electrode of the in-pixel capacitance, the in-pixel capacitance being provided on a side opposite to a light incident surface of a photoelectric conversion element provided in a semiconductor substrate, the counter electrode being provided in the semiconductor substrate. The present disclosure can be applied to, for example, a back-illuminated CMOS image sensor.
    Type: Application
    Filed: May 18, 2018
    Publication date: June 11, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masaaki TAKIZAWA, Yorito SAKANO
  • Patent number: 10609318
    Abstract: The present technology relates to an imaging device, a driving method, and an electronic apparatus capable of more quickly acquiring a high-quality image. In a pixel of a solid-state imaging device, a photoelectric conversion unit that performs a photoelectric conversion of incident light is disposed. An electric charge/voltage converting unit converts electric charge acquired by the photoelectric conversion unit into a voltage signal. A signal comparator compares a supplied reference signal with the voltage signal acquired by the electric charge/voltage converting unit and outputs a result of the comparison. A storage unit adaptively changes the conversion efficiency of the electric charge/voltage converting unit on the basis of a control signal acquired on the basis of a result of the comparison output from the signal comparator. The present technology can be applied to a solid-state imaging device.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: March 31, 2020
    Assignee: SONY CORPORATION
    Inventors: Masaki Sakakibara, Yorito Sakano
  • Publication number: 20200083262
    Abstract: The present technology relates to a solid-state image sensing device and an electronic device for reducing noises. The solid-state image sensing device includes: a photoelectric conversion unit; a charge holding unit for holding charges transferred from the photoelectric conversion unit; a first transfer transistor for transferring charges from the photoelectric conversion unit to the charge holding unit; and a light blocking part including a first light blocking part and a second light blocking part, in which the first light blocking part is arranged between a second surface opposite to a first surface as a light receiving surface of the photoelectric conversion unit and the charge holding unit, and covers the second surface, and is formed with a first opening, and the second light blocking part surrounds the side surface of the photoelectric conversion unit. The present technology is applicable to solid-state image sensing devices of backside irradiation type, for example.
    Type: Application
    Filed: November 14, 2019
    Publication date: March 12, 2020
    Inventors: HIROSHI TAYANAKA, KENTARO AKIYAMA, YORITO SAKANO, TAKASHI OINOUE, YOSHIYA HAGIMOTO, YUSUKE MATSUMURA, NAOYUKI SATO, YUKI MIYANAMI, YOICHI UEDA, RYOSUKE MATSUMOTO
  • Publication number: 20200066773
    Abstract: The present disclosure relates to a solid-state imaging element and an electronic apparatus which are capable of utilizing almost all photoelectrically converted charges for signals during high capacitance. A pixel includes a selection transistor that is disposed on a drain side of an amplification transistor and selects a read-out row, the selection transistor selects the read-out row after reset by a reset transistor, and a transfer transistor performs reference potential read-out during high capacitance prior to reference potential read-out during low capacitance. For example, the present disclosure is applicable to a lamination-type solid-state imaging element.
    Type: Application
    Filed: November 30, 2017
    Publication date: February 27, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshiaki TASHIRO, Satoko IIDA, Yorito SAKANO
  • Publication number: 20200059615
    Abstract: The present technology relates to a solid-state imaging device, a method for driving the solid-state imaging device, and an electronic apparatus, the solid-state imaging device being capable of expanding the dynamic range without deteriorating the image quality. The solid-state imaging device includes a pixel array section having a plurality of unit pixels and a drive section. Each of the unit pixels includes a first photoelectric conversion section, a second photoelectric conversion section which is less sensitive than the first photoelectric conversion section, a charge storage section configured to store charges generated by the second photoelectric conversion section, a charge-voltage conversion section, a first transfer gate section configured to transfer charges from the first photoelectric conversion section, and a second transfer gate section configured to combine the potential of the charge-voltage conversion section with the potential of the charge storage section.
    Type: Application
    Filed: October 25, 2019
    Publication date: February 20, 2020
    Applicant: SONY CORPORATION
    Inventors: Yorito SAKANO, Isao HIROTA, Motonobu TORII, Masaaki TAKIZAWA, Junichiro AZAMI, Motohashi YUICHI, Atsushi SUZUKI
  • Publication number: 20200029036
    Abstract: The present disclosure relates to a solid-state imaging device and a method of controlling a solid-state imaging device, and an electronic device for enabling appropriate expansion of a dynamic range with respect to an object moving at a high speed or an object having a large luminance difference between bright and dark to reduce motion distortion (motion artifact). Exposure of a plurality of pixels is individually controlled in units of pixels. The present disclosure can be applied to a solid-state imaging device.
    Type: Application
    Filed: March 30, 2018
    Publication date: January 23, 2020
    Inventors: SATOKO IIDA, MASAKI SAKAKIBARA, YORITO SAKANO, NAOSUKE ASARI, MASAAKI TAKIZAWA, TOMOHIKO ASATSUMA, SHOGO FURUYA
  • Publication number: 20200021755
    Abstract: To reduce variations in switching timing from linear reading to logarithmic reading and perform reading with high accuracy in a solid state imaging device. A first photoelectric conversion unit converts incident light into charges and accumulates the charges in a first region. A second photoelectric conversion unit converts incident light into charges and accumulates the charges in a second region having a smaller area than the first region. A charge-voltage conversion unit accumulates charges photoelectrically converted by the first and second photoelectric conversion units for converting the charges into a voltage. First and second charge transfer units transfer charges accumulated in the first photoelectric conversion unit and charges accumulated in the second photoelectric conversion unit to the charge-voltage conversion unit, respectively. A charge reset unit resets charges accumulated in the charge-voltage conversion unit.
    Type: Application
    Filed: December 12, 2017
    Publication date: January 16, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takuya TOYOFUKU, Yorito SAKANO
  • Patent number: 10515988
    Abstract: The present technology relates to a solid-state image sensing device and an electronic device capable of reducing noises. The solid-state image sensing device includes a photoelectric conversion unit, a charge holding unit for holding charges transferred from the photoelectric conversion unit, a first transfer transistor for transferring charges from the photoelectric conversion unit to the charge holding unit, and a light blocking part including a first light blocking part and a second light blocking part. The first light blocking part is arranged between a second surface opposite to a first surface as a light receiving surface of the photoelectric conversion unit and the charge holding unit, and covers the second surface, and is formed with a first opening, and the second light blocking part surrounds the side surface of the photoelectric conversion unit. The present technology is applicable to solid-state image sensing devices of backside irradiation type.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: December 24, 2019
    Assignee: SONY CORPORATION
    Inventors: Hiroshi Tayanaka, Kentaro Akiyama, Yorito Sakano, Takashi Oinoue, Yoshiya Hagimoto, Yusuke Matsumura, Naoyuki Sato, Yuki Miyanami, Yoichi Ueda, Ryosuke Matsumoto
  • Patent number: 10498983
    Abstract: The present technology relates to a solid-state imaging device, a method for driving the solid-state imaging device, and an electronic apparatus, the solid-state imaging device being capable of expanding the dynamic range without deteriorating the image quality. The solid-state imaging device includes a pixel array section having a plurality of unit pixels and a drive section. Each of the unit pixels includes a first photoelectric conversion section, a second photoelectric conversion section which is less sensitive than the first photoelectric conversion section, a charge storage section configured to store charges generated by the second photoelectric conversion section, a charge-voltage conversion section, a first transfer gate section configured to transfer charges from the first photoelectric conversion section, and a second transfer gate section configured to combine the potential of the charge-voltage conversion section with the potential of the charge storage section.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: December 3, 2019
    Assignee: Sony Corporation
    Inventors: Yorito Sakano, Isao Hirota, Motonobu Torii, Masaaki Takizawa, Junichiro Azami, Motohashi Yuichi, Atsushi Suzuki
  • Publication number: 20190333958
    Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.
    Type: Application
    Filed: May 13, 2019
    Publication date: October 31, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yorito SAKANO
  • Patent number: 10412329
    Abstract: An imaging apparatus with logarithmic characteristics includes: a photodiode that receives light; a well tap unit that fixes the potential of an N-type region of the photodiode; and a resetting unit that resets the photodiode, a P-type region of the photodiode outputting a voltage signal equivalent to a photocurrent subjected to logarithmic compression. The first potential to be supplied to the well tap unit is made lower than the second potential to be supplied to the resetting unit, so that the capacitance formed with the PN junction of the photodiode is charged when the resetting unit performs a reset operation. The present technology can be applied to unit pixels having logarithmic characteristics.
    Type: Grant
    Filed: November 27, 2015
    Date of Patent: September 10, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yorito Sakano, Tsutomu Imoto, Hideo Nomura, Yoshiaki Tashiro, Toshiyuki Nishihara, Muriel Cohen, Frederick Brady
  • Publication number: 20190273883
    Abstract: An increase in memory capacity is suppressed in a solid-state imaging element that performs correlated double sampling processing. A pixel circuit sequentially generates each of a predetermined reset level and a plurality of signal levels corresponding to the exposure amount. An analog-to-digital converter converts a predetermined reset level into digital data and outputs the data as reset data, converts each of the plurality of pieces of signal data into digital data, and outputs the data as signal data. An arithmetic circuit holds a difference between the reset data and the signal data output first, as held data in a memory, and then adds the held data and the signal data output second and subsequent times together and causes the memory to hold the added data as new held data.
    Type: Application
    Filed: October 10, 2017
    Publication date: September 5, 2019
    Inventors: MASAKI SAKAKIBARA, YORITO SAKANO, SATOKO IIDA
  • Patent number: 10319777
    Abstract: A pixel circuit includes a floating diffusion layer of a first conductivity-type between a drain/source of a second conductivity-type and a source/drain of the second conductivity-type. The source/drain and the drain/source touch the floating diffusion layer. A cathode of a photoelectric converter is electrically connected to the floating diffusion layer. An anode of the photoelectric converter touches the cathode. The cathode is of the first conductivity-type and the anode is of the second conductivity-type.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: June 11, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yorito Sakano
  • Patent number: 10306166
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: May 28, 2019
    Assignee: Sony Corporation
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Publication number: 20190157323
    Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.
    Type: Application
    Filed: March 20, 2018
    Publication date: May 23, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI