Patents by Inventor Yoshiaki Inada
Yoshiaki Inada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240414450Abstract: In a solid-state imaging element that performs exposure in all pixels at the same time, image quality is improved. A solid-state imaging element includes a previous-stage circuit, a plurality of capacitive elements, a selection circuit, and a subsequent-stage circuit. In the solid-state imaging element, the previous-stage circuit converts charges into a voltage using each of a plurality of conversion efficiencies and outputs it to the previous-stage node. One ends of the plurality of capacitive elements are connected to the previous-stage node in common. The selection circuit connects the other end of one of the plurality of capacitive elements to a subsequent-stage node. The subsequent-stage circuit reads the voltage via the subsequent-stage node.Type: ApplicationFiled: September 2, 2022Publication date: December 12, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Ryoto YOSHITA, Takashi MACHIDA, Luonghung ASAKURA, Yoshiaki INADA, Yoshimichi KUMAGAI, Toru SHIRAKATA
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Publication number: 20240414451Abstract: The present invention improves image quality while preventing a decrease in frame rate in a solid-state imaging element in which all pixels are exposed simultaneously. The solid-state imaging element includes a comparison unit, a pre-stage circuit, a capacitor unit, and a post-stage circuit. The comparison unit compares a signal level corresponding to an exposure amount with a predetermined threshold and outputs a comparison result. The pre-stage circuit converts charges into a voltage at a conversion efficiency selected from among a plurality of different conversion efficiencies on the basis of the comparison result and outputs the voltage. The capacitor unit holds the voltage. The post-stage circuit reads the voltage thus held and outputs the voltage to a vertical signal line.Type: ApplicationFiled: August 22, 2022Publication date: December 12, 2024Inventors: RYOTO YOSHITA, LUONGHUNG ASAKURA, YOSHIAKI INADA
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Publication number: 20240373143Abstract: To improve the image quality in a solid-state imaging element that performs exposure by a rolling shutter scheme or a global shutter scheme. A pixel circuit outputs a pixel signal as an input signal and, in a case where a rolling shutter mode to start exposure sequentially row by row is selected, outputs the pixel signal as a first output signal. A sample-hold circuit holds the input signal and outputs the input signal as a second output signal in a case where a global shutter mode to start exposure simultaneously for all pixels is selected. A changeover switch selects any one of the first and second output signals and outputs the selected one to an analog-to-digital converter.Type: ApplicationFiled: August 17, 2022Publication date: November 7, 2024Inventors: Hiromu Kato, Luonghung Asakura, Yoshiaki Inada
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Publication number: 20240340551Abstract: Solid-state imaging elements are disclosed. In one example, an upstream circuit sequentially generates a predetermined reset level and a signal level corresponding to an exposure amount, and causes first and second capacitive elements to hold the reset level and the signal level. A selection circuit sequentially connects one of the capacitive elements to a predetermined downstream node, disconnects both capacitive elements from the downstream node, and connects the other capacitive element to the downstream node. A downstream reset transistor initializes a level of the downstream node when both capacitive elements are disconnected from the downstream node. A downstream circuit sequentially reads the reset level and the signal level from the first and second capacitive elements via the downstream node and outputs the reset level and the signal level.Type: ApplicationFiled: June 18, 2024Publication date: October 10, 2024Inventors: Luonghung Asakura, Yoshiaki Inada
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Patent number: 12047701Abstract: Solid-state imaging elements are disclosed. In one example, an upstream circuit sequentially generates a predetermined reset level and a signal level corresponding to an exposure amount, and causes first and second capacitive elements to hold the reset level and the signal level. A selection circuit sequentially connects one of the capacitive elements to a predetermined downstream node, disconnects both capacitive elements from the downstream node, and connects the other capacitive element to the downstream node. A downstream reset transistor initializes a level of the downstream node when both capacitive elements are disconnected from the downstream node. A downstream circuit sequentially reads the reset level and the signal level from the first and second capacitive elements via the downstream node and outputs the reset level and the signal level.Type: GrantFiled: February 24, 2021Date of Patent: July 23, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Luonghung Asakura, Yoshiaki Inada
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Patent number: 12028618Abstract: The present disclosure includes a video transmission apparatus, a video reception apparatus, an image transmission apparatus, an image reception apparatus, and a system. The image transmission apparatus includes a detection circuitry, a generation circuitry, and a transmission circuitry. The generation circuitry is configured to generate a first image based on a first piece of positional information from a plurality of pieces of positional information, the first image including the overlap region and corresponding to a first region of interest of two or more regions of interest. The generation circuitry is also configured to generate one or more second images based on an overlap region and the plurality of pieces of positional information, the one or more second images excluding the overlap region and corresponding to regions of interest other than the first region of interest of the two or more regions of interest.Type: GrantFiled: April 21, 2022Date of Patent: July 2, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Tatsuya Sugioka, Tomohiro Takahashi, Hiroki Ui, Yoshiaki Inada, Masatsugu Kobayashi, Masaru Takamoto
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Patent number: 11924403Abstract: An imaging element of the present disclosure includes a first substrate on which a pixel circuit connected to a light receiving part is formed and a second substrate on which a pixel control part that controls the pixel circuit is formed, the first substrate and the second substrate being stacked. Then, the first substrate includes a first wiring formed corresponding to a first pixel row or pixel column, a second wiring formed corresponding to a second pixel row or pixel column, a first connection part that connects the first wiring and the pixel control part, a second connection part that connects the second wiring and the pixel control part, a switch part that controls connection between the first wiring and the second wiring, a first electrode connected to the first wiring via the switch part, and a second electrode connected to the second wiring via the switch part.Type: GrantFiled: May 14, 2019Date of Patent: March 5, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventor: Yoshiaki Inada
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Patent number: 11895415Abstract: A solid-state imaging device including a photoelectric conversion film provided over a plurality of pixels, a first electrode electrically coupled to the photoelectric conversion film and provided to each pixel, a second electrode opposed to the first electrode, the photoelectric conversion film being interposed between the second electrode and the first electrode, a first electric charge accumulation section, a reset transistor that is provided to each pixel, and an electric potential generator that applies, during a period in which the signal electric charges are accumulated in the first electric charge accumulation section, an electric potential VPD to the first electrode of each of at least one or more pixels, an electric potential difference between the first electrode and the second electrode when the electric potential VPD is applied to the first electrode being smaller than an electric potential difference when a reset electric potential is applied to the first electrode.Type: GrantFiled: January 12, 2023Date of Patent: February 6, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Shunsuke Maruyama, Yoshiaki Inada
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Publication number: 20230188867Abstract: Solid-state imaging elements are disclosed. In one example, an upstream circuit sequentially generates a predetermined reset level and a signal level corresponding to an exposure amount, and causes first and second capacitive elements to hold the reset level and the signal level. A selection circuit sequentially connects one of the capacitive elements to a predetermined downstream node, disconnects both capacitive elements from the downstream node, and connects the other capacitive element to the downstream node. A downstream reset transistor initializes a level of the downstream node when both capacitive elements are disconnected from the downstream node. A downstream circuit sequentially reads the reset level and the signal level from the first and second capacitive elements via the downstream node and outputs the reset level and the signal level.Type: ApplicationFiled: February 24, 2021Publication date: June 15, 2023Inventors: Luonghung Asakura, Yoshiaki Inada
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Publication number: 20230145375Abstract: A solid-state imaging device including a photoelectric conversion film provided over a plurality of pixels, a first electrode electrically coupled to the photoelectric conversion film and provided to each pixel, a second electrode opposed to the first electrode, the photoelectric conversion film being interposed between the second electrode and the first electrode, a first electric charge accumulation section, a reset transistor that is provided to each pixel, and an electric potential generator that applies, during a period in which the signal electric charges are accumulated in the first electric charge accumulation section, an electric potential VPD to the first electrode of each of at least one or more pixels, an electric potential difference between the first electrode and the second electrode when the electric potential VPD is applied to the first electrode being smaller than an electric potential difference when a reset electric potential is applied to the first electrode.Type: ApplicationFiled: January 12, 2023Publication date: May 11, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Shunsuke MARUYAMA, Yoshiaki INADA
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Patent number: 11606527Abstract: There is provided is a transmitter including an image processor that sets region information corresponding to a region set for an image for each row in the image and that transmits the set region information and region data corresponding to the region for each row, in which the image processor sets the region by analyzing the image or on a basis of externally acquired region-designating information, and the region information includes information indicating a position of a row and information indicating a position of a column of the region included in the row.Type: GrantFiled: August 27, 2018Date of Patent: March 14, 2023Assignee: Sony Semiconductor Solutions CorporationInventors: Tomohiro Takahashi, Tatsuya Sugioka, Naoki Yoshimochi, Yoshiaki Inada, Masatsugu Kobayashi, Koji Yoda, Takahiro Iinuma
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Patent number: 11595596Abstract: A solid-state imaging device including a photoelectric conversion film provided over a plurality of pixels, a first electrode electrically coupled to the photoelectric conversion film and provided to each pixel, a second electrode opposed to the first electrode, the photoelectric conversion film being interposed between the second electrode and the first electrode, a first electric charge accumulation section, a reset transistor that is provided to each pixel, and an electric potential generator that applies, during a period in which the signal electric charges are accumulated in the first electric charge accumulation section, an electric potential VPD to the first electrode of each of at least one or more pixels, an electric potential difference between the first electrode and the second electrode when the electric potential VPD is applied to the first electrode being smaller than an electric potential difference when a reset electric potential is applied to the first electrode.Type: GrantFiled: January 17, 2019Date of Patent: February 28, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Shunsuke Maruyama, Yoshiaki Inada
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Publication number: 20220247925Abstract: The present disclosure includes a video transmission apparatus, a video reception apparatus, an image transmission apparatus, an image reception apparatus, and a system. The image transmission apparatus includes a detection circuitry, a generation circuitry, and a transmission circuitry. The generation circuitry is configured to generate a first image based on a first piece of positional information from a plurality of pieces of positional information, the first image including the overlap region and corresponding to a first region of interest of two or more regions of interest. The generation circuitry is also configured to generate one or more second images based on an overlap region and the plurality of pieces of positional information, the one or more second images excluding the overlap region and corresponding to regions of interest other than the first region of interest of the two or more regions of interest.Type: ApplicationFiled: April 21, 2022Publication date: August 4, 2022Inventors: Tatsuya Sugioka, Tomohiro Takahashi, Hiroki Ui, Yoshiaki Inada, Masatsugu Kobayashi, Masaru Takamoto
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Patent number: 11323617Abstract: The present disclosure includes a video transmission apparatus, a video reception apparatus, an image transmission apparatus, an image reception apparatus, and a system. The image transmission apparatus includes a detection circuitry, a generation circuitry, and a transmission circuitry. The generation circuitry is configured to generate a first image based on a first piece of positional information from a plurality of pieces of positional information, the first image including the overlap region and corresponding to a first region of interest of two or more regions of interest. The generation circuitry is also configured to generate one or more second images based on an overlap region and the plurality of pieces of positional information, the one or more second images excluding the overlap region and corresponding to regions of interest other than the first region of interest of the two or more regions of interest.Type: GrantFiled: February 13, 2018Date of Patent: May 3, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Tatsuya Sugioka, Tomohiro Takahashi, Hiroki Ui, Yoshiaki Inada, Masatsugu Kobayashi, Masaru Takamoto
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Patent number: 11074023Abstract: There is provided a transmission device including: an image processing unit that sets region information corresponding to a region set in an image for each of rows in the image and causes the set region information and region data corresponding to the region to be transmitted for each row. The region information includes information indicating a position of the row and information indicating a position of a column of the region included in the row.Type: GrantFiled: October 15, 2018Date of Patent: July 27, 2021Assignee: Sony Semiconductor Solutions CorporationInventors: Naoki Yoshimochi, Tatsuya Sugioka, Tomohiro Takahashi, Takahiro Iinuma, Koji Yoda, Miho Ozawa, Yoshiaki Inada
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Publication number: 20210176458Abstract: An imaging element of the present disclosure includes a first substrate on which a pixel circuit connected to a light receiving part is formed and a second substrate on which a pixel control part that controls the pixel circuit is formed, the first substrate and the second substrate being stacked. Then, the first substrate includes a first wiring formed corresponding to a first pixel row or pixel column, a second wiring formed corresponding to a second pixel row or pixel column, a first connection part that connects the first wiring and the pixel control part, a second connection part that connects the second wiring and the pixel control part, a switch part that controls connection between the first wiring and the second wiring, a first electrode connected to the first wiring via the switch part, and a second electrode connected to the second wiring via the switch part.Type: ApplicationFiled: May 14, 2019Publication date: June 10, 2021Inventor: YOSHIAKI INADA
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Publication number: 20210029309Abstract: A solid-state imaging device including a photoelectric conversion film provided over a plurality of pixels, a first electrode electrically coupled to the photoelectric conversion film and provided to each pixel, a second electrode opposed to the first electrode, the photoelectric conversion film being interposed between the second electrode and the first electrode, a first electric charge accumulation section, a reset transistor that is provided to each pixel, and an electric potential generator that applies, during a period in which the signal electric charges are accumulated in the first electric charge accumulation section, an electric potential VPD to the first electrode of each of at least one or more pixels, an electric potential difference between the first electrode and the second electrode when the electric potential VPD is applied to the first electrode being smaller than an electric potential difference when a reset electric potential is applied to the first electrode.Type: ApplicationFiled: January 17, 2019Publication date: January 28, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Shunsuke MARUYAMA, Yoshiaki INADA
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Publication number: 20200333993Abstract: There is provided a transmission device including: an image processing unit that sets region information corresponding to a region set in an image for each of rows in the image and causes the set region information and region data corresponding to the region to be transmitted for each row. The region information includes information indicating a position of the row and information indicating a position of a column of the region included in the row.Type: ApplicationFiled: October 15, 2018Publication date: October 22, 2020Inventors: Naoki Yoshimochi, Tatsuya Sugioka, Tomohiro Takahashi, Takahiro Iinuma, Koji Yoda, Miho Ozawa, Yoshiaki Inada
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Publication number: 20200275046Abstract: There is provided is a transmitter including an image processor that sets region information corresponding to a region set for an image for each row in the image and that transmits the set region information and region data corresponding to the region for each row, in which the image processor sets the region by analyzing the image or on a basis of externally acquired region-designating information, and the region information includes information indicating a position of a row and information indicating a position of a column of the region included in the row.Type: ApplicationFiled: August 27, 2018Publication date: August 27, 2020Inventors: Tomohiro Takahashi, Tatsuya Sugioka, Naoki Yoshimochi, Yoshiaki Inada, Masatsugu Kobayashi, Koji Yoda, Takahiro Ilnuma
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Patent number: 10681294Abstract: A solid-state imaging device includes a pixel array with unit pixels each having a photoelectric conversion device arranged in a matrix. Column signal lines are wired with respect to one column in the pixel arrangement and pixels are regularly connected to the column signal lines in accordance with rows in which pixels are positioned. A pixel signal reading unit has a column processing unit that reads pixel signals in units of plural pixels from the pixel array and performs column processing to read signals on a column basis, wherein the pixel signal reading unit includes a column input unit which can connect one or plural column signal lines arranged at a corresponding column to an input of one column processing unit through plural capacitors connected in parallel The column input unit has switches which can change a connection state between capacitors and column signal lines corresponding to the column.Type: GrantFiled: July 10, 2018Date of Patent: June 9, 2020Assignee: SONY CORPORATIONInventors: Masamichi Ito, Tsuyoshi Hara, Yoshiaki Inada