Abstract: There is provided a shot length calculating unit 2 for, when a result of determination by a cut point determination part 16 in a cut point detecting unit 1 shows that a frame is a cut point, calculating the shot length of a shot starting from a cut point immediately preceding the cut point. Whether or not the shot starting from the cut point immediately preceding the cut point is an important shot is determined with the shot length calculated by the shot length calculating unit 2 being used as a criterion of the determination.

Abstract: This connector-mounting configuration comprises: a latching claw that is provided at a connector and latches to a substrate, whereby the substrate is equipped with the connector; a protruding portion that is provided so as to protrude from the latching claw and latches to the substrate, whereby the latching claw latches to the substrate; and a flexing portion that is formed from a first plate member that is a plate-like component and that is disposed at a position closer to the base end side of the latching claw than the protruding portion thereof. The flexing portion is disposed so that the plate thickness direction of the first plate member coincides with the protruding direction of the protruding portion.

Abstract: A protective sheet for preventing scratches which comprises a substrate (1) having one face exhibiting the self-sticking property and a foam rubber layer (3) disposed on the other face of the substrate (1) and, in particular, the protective sheet for preventing scratches described above which further comprises a sheet layer (5) which is disposed on the foam rubber layer (3) and exhibits releasing property from the face exhibiting the self-sticking property of the substrate (1). The protective sheet is used for protecting the surface of various articles, in particular, for preventing scratches on coated portions of panels of the body in the assembly step of vehicles.

Abstract: A connector, comprising: a terminal that is an elongated member connected to a wire harness, the axial direction of the wire harness intersecting with the longitudinal direction of the terminal at a connecting portion therebetween; a housing, including a terminal retaining socket that retains the terminal, the terminal being inserted into the terminal retaining socket from a back face side of the housing and retained, with the leading end portion of the terminal protruding to a front face side of the housing, and the terminal being connected to a power supply point by the front face side of the housing being fitted together with a body to be fitted to; and a cover that is substantially plate shaped and covers the back face side of the housing, is provided.

Abstract: A semiconductor device in which an E-FET and a D-FET are integrated on the same substrate, wherein an epitaxial layer includes, in the following order from the semiconductor substrate: a first threshold adjustment layer that adjusts a threshold voltage of a gate of the E-FET and a threshold voltage of a gate of the D-FET; a first etching-stopper layer that stops etching performed from an uppermost layer to a layer abutting on the first etching-stopper layer; a second threshold adjustment layer that adjusts the threshold voltage of the gate of the D-FET; and a second etching-stopper layer that stops the etching performed from the uppermost layer to a layer abutting on the second etching-stopper layer, and at least one of the first etching-stopper layer and the second threshold adjustment layer includes an n-type doped region.

Abstract: An image encoding apparatus includes a converter 1 for receiving an image signal, and for converting the image signal of individual blocks to DC components and AC components by orthogonal transformation of the individual blocks of an image frame; a predicted reference value generator 2 for receiving the image signal, and for generating a predicted reference value of each image frame from DC components resulting from the orthogonal transformation of left-edge blocks of the image frame; and a differential unit 3 for obtaining difference values between the DC components output from the converter 1 and the predicted reference value generated by the predicted reference value generator 2. The image encoding apparatus outputs a bit stream by quantizing and variable-length encoding the AC components and difference values obtained by the differential unit 3, and by quantizing and variable-length encoding the predicted reference value to be added to a header.

Abstract: Vertical transfer portions for transferring signal charges from photoelectric conversion portions in a vertical direction and a horizontal transfer portion for transferring them in a horizontal direction are provided, and each of a plurality of vertical transfer stages constituting the vertical transfer portion is provided with a plurality of phases of transfer electrodes. The transfer electrodes at a vertical last stage include independent transfer electrodes (V3R, V5R) for at least two phases, that are independent of the other vertical transfer stages, have identical configurations repeated in a unit of n columns, and are in common among corresponding columns in a plurality of the units of n columns and independent of the independent transfer electrodes belonging to the other columns in the unit of n columns.

Abstract: An objective of the present invention is to provide the solid-state imaging device and the driving method thereof which can control: a poor picture quality, such as blooming, to maximize a dynamic range of the photodiode; and a poor picture quality resulted from an incomplete read-out operation. A solid-state imaging device in the present invention includes: a solid-state imaging element; and a driving pulse controlling unit applying a driving pulse to each of read-out gates of a column CCD. The driving pulse controlling unit transfers in a column direction signal charge within a charge transfer region of the column CCD by applying a column transfer clock having a LOW level voltage and a MIDDLE level voltage, and the LOW level voltage and the MIDDLE level voltage are minus voltages.

Abstract: A process for producing a molded ceiling for a vehicle that, after molding of a molded ceiling, can allow a mill end to be easily separated from a skin material by a nonwoven fabric layer and can easily conduct edge treatment of a base material to improve productivity. In this process for producing a molded ceiling for a vehicle, a base material together with a skin material is set in a mold in which a molding face is formed in a required curved surface, followed by heating and pressing to bond the base material and the skin material to each other and thus to prepare a molded ceiling. A nonwoven fabric layer for facilitating the separation between the base material and the skin material even after molding is previously interposed between the base material and the skin material.

Abstract: An analysis display GJ1 has a coordinate plane of which coordinate axes are elapsed time and PCR (Program Clock Reference) time calculated using PCR extracted from header information of a transport stream packet. A box indicator representing an access unit is provided on the coordinate plane and sides of the box indicator indicate an arrival time of the access unit AU and time of time stamps PTS/DTS. It analyzes the PCR in a transport stream layer and the time stamps PTS/DTS in a PES layer in a manner of over layers, and displays an analysis result that allows easily understanding a relationship between system timing and them. Therefore, it makes it easier to check a problem on the PCR and the time stamps PTS/DTS.

Abstract: An image discrimination apparatus includes an inter-frame distance calculating unit 2 for calculating an inter-frame distance which is a distance between features from the feature of a current frame extracted by a feature extracting unit 1 and the feature of an immediately-preceding frame stored in a feature buffer 3, and a cut-point-determination data calculating unit 4 for calculating statistics values of inter-frame distances and calculating a threshold for determination of cut points from the statistics values. The image discrimination apparatus compares the inter-frame distance of the current frame with the threshold for determination of cut points to determine a cut point from the comparison result.

Abstract: A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.

Abstract: This connector comprises: a connector main body mounted on a substrate; a latching piece that is attached to the connector main body and which temporarily joins the connector main body to the substrate by temporarily latching to an edge portion of an attachment hole formed in the substrate; and a rib having a width wider than the latching piece and which is attached to the connector main body. The rib is inserted into the attachment hole, and when external force in a direction of moving away from the substrate acts on one end side of the connector main body, whose end portions in the width direction interfere with the interior peripheral portion of the attachment hole, so as to generate resistance force that resists the external force.

Abstract: A semiconductor device according to the present invention includes: a semiconductor substrate; a channel layer formed on the semiconductor substrate; a donor layer formed on the channel layer; a first Schottky layer formed on the donor layer; a second Schottky layer formed on the first Schottky layer; a first gate electrode formed on the first Schottky layer to form a Schottky barrier junction with the first Schottky layer; a first source electrode and a first drain electrode formed so as to sandwich the first gate electrode and electrically connected to the channel layer; a second gate electrode formed on the second Schottky layer and made of a material different from the first gate electrode to form a Schottky barrier junction with the second Schottky layer; and a second source electrode and a second drain electrode formed so as to sandwich the second gate electrode and electrically connected to the channel layer.

Abstract: This connector configuration comprises: a fixing member that is a component of a connector and is fixed to a substrate in order to mount the connector onto the substrate; a case that is a component of the connector and has an installation groove formed thereon, into which the fixing member is installed; and a regulating portion provided at either one of the fixing member and the case along the direction of installation of the fixing member to the case. A regulating groove is provided along the direction of installation on the other one of the fixing member and the case, and when the fixing member is installed onto the case, the regulating portion is guided along the regulating groove and tilting of the fixing member relative to the direction of installation is controlled.

Abstract: An image defect correction apparatus that processes luminance signals output from two-dimensionally arranged light-sensitive elements via a plurality of vertical charge coupled devices and a horizontal charge coupled device in a predetermined order, outputs image information, and includes: a recording unit that records therein an X address for identifying a correction-target vertical line of pixels corresponding to a vertical charge coupled device in which a point defect exists; a correction value calculating unit that calculates a correction value from values of (i) a luminance signal corresponding to at least one pixel at a predetermined position on the correction-target vertical line identified by the X address and (ii) a luminance signal corresponding to at least one pixel at a predetermined position on another vertical line; and a correcting unit that corrects values of luminance signals corresponding to the correction-target vertical line, based on the calculated correction value.

Abstract: An electrical connection terminal for a connection hole includes: a base-side end portion (310) having a predetermined width; a retaining portion (313) having an increasing width wider than the predetermined width of the base-side end portion (310), the retaining portion (313) being formed integrally with the base-side end portion (310); and an insertion taper portion (315) having a taper width narrower than the increasing width of the retaining portion (313) to reach a leading end portion, the insertion taper portion (315) being formed integrally with the retaining portion (313); in which the insertion taper portion (315) is composed of a plurality of taper portions taper angles of which change so as to increase along an insertion direction.

Abstract: A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.

Abstract: A semiconductor device which includes both an E-FET and a D-FET and can facilitate control of the Vth in an E-FET and suppress a decrease in the Vf, and a manufacturing method of the same are provided. A semiconductor device which includes both an E-FET and a D-FET on the same semiconductor substrate includes: a first threshold adjustment layer for adjusting threshold of the E-FET; a first etching stopper layer formed on the first threshold adjustment layer; the second threshold adjustment layer formed on the first etching stopper layer for adjusting threshold of the D-FET; a second etching stopper layer formed on the second threshold adjustment layer; a first gate electrode penetrating through the first etching stopper layer, the second threshold adjustment layer, and the second etching stopper layer, which is in contact with the first threshold adjustment layer; and the second gate electrode penetrating through the second etching stopper layer, which is in contact with the second threshold adjustment layer.

Abstract: A data embedding apparatus including: a selecting unit for selecting, based upon the second data, a prediction system of calculating a prediction value with respect to data to be processed within the first data; a predicting unit for calculating the prediction value of the data to be processed by the prediction system selected by the selecting unit; a difference calculating unit for calculating a prediction error of the data to be processed by employing the prediction value; and a prediction error calculating unit for outputting the coded data, in which the predicting unit includes: a 0-embedding time predicting unit for performing prediction when a bit value of the second data is “0”; a 1-embedding time predicting unit for performing prediction when the bit value of the second data is “1”; and an embedding end time predicting unit for performing prediction when embedding of the second data is accomplished.