Patents by Inventor Yoshiaki Sugizaki

Yoshiaki Sugizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10246324
    Abstract: According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with the space portion. The sensing unit further includes a movable beam, a strain sensing element unit, and first and second buried interconnects. The movable beam has fixed and movable portions, and includes first and second interconnect layers. The fixed portion is fixed to the non-space portion. The movable portion is separated from the transistor and extends from the fixed portion into the space portion. The strain sensing element unit is fixed to the movable portion. The first and second buried interconnects are provided in the non-space portion.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: April 2, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hideaki Fukuzawa, Tatsuya Ohguro, Akihiro Kojima, Yoshiaki Sugizaki, Mariko Takayanagi, Yoshihiko Fuji, Akio Hori, Michiko Hara
  • Publication number: 20190097085
    Abstract: The semiconductor layer has a first surface, a second surface provided on opposite side from the first surface, and a third surface provided on the opposite side from the first surface with a step difference with respect to the second surface. The semiconductor layer includes a light emitting layer between the first surface and the third surface. The first electrode is in contact with the second surface. The second electrode is provided in a plane of the third surface. The second electrode includes a contact part in contact with the third surface and an end part not in contact with the third surface. The second electrode contains silver. The insulating film is provided between the end part of the second electrode and the third surface. A semiconductor light emitting device having a high light extraction efficiency is provided.
    Type: Application
    Filed: March 8, 2017
    Publication date: March 28, 2019
    Applicant: ALPAD Corporation
    Inventors: Hideyuki TOMIZAWA, Akihiro KOJIMA, Miyoko SHIMADA, Yosuke AKIMOTO, Hideto FURUYAMA, Yoshiaki SUGIZAKI
  • Publication number: 20190062818
    Abstract: According to one embodiment, a sensor includes an ionic liquid, a probe molecule, and a sensor element. The probe molecule selectively associates with a designated substance in the ionic liquid. The sensor element detects an association of the probe molecule with the designated substance.
    Type: Application
    Filed: March 5, 2018
    Publication date: February 28, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hiroko Miki, Yoshiaki Sugizaki, Tatsuro Saito, Atsunobu Isobayashi
  • Patent number: 10131174
    Abstract: An erasing apparatus of embodiments has a color erasing device, the color erasing device has: a first heating member; a second heating member provided at a position facing the first heating member so as to form a nip portion therebetween through which the sheet is passed; a halogen lamp configured to heat the second heating member from outside thereof; and a reflector provided at a position opposite to the second heating member with the halogen lamp interposed therebetween and having a reflective surface configured to reflect heat received from the halogen lamp toward the second heating member, the reflector forming a guiding section configured to be in sliding contact with the sheet being conveyed so as to guide the sheet to the nip portion, the guiding section being heated by the halogen lamp.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: November 20, 2018
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Hiroyuki Tsuchihashi, Kikuo Mizutani, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Hiroyuki Taki, Ken Iguchi, Chiaki Iizuka
  • Publication number: 20180304662
    Abstract: An image erasing apparatus according to an embodiment includes a sheet supply portion that supplies a sheet and an ejector. A first conveying path conveys the sheet from the sheet supply portion toward the ejector. A reader arranged on the first conveying path reads an image on the sheet. A second conveying path branches from the first conveying path at a downstream of the reader on the first conveying path and merges with the first conveying path at an upstream of the reader on the first conveying path. An erasing unit is arranged on the second conveying path. A conveying path changing portion is arranged at a branching portion. An operating portion receives a setup of the processing to the sheet. A controller changes a conveying path of the sheet in accordance with the setup received by the operating portion before the sheet is supplied from the sheet supply portion.
    Type: Application
    Filed: June 27, 2018
    Publication date: October 25, 2018
    Inventors: Ken IGUCHI, Hidetoshi YOKOCHI, Isao YAHATA, Takahiro KAWAGUCHI, Yoshiaki SUGIZAKI, Kikuo MIZUTANI, Hiroyuki TAKI, Hiroyuki TSUCHIHASHI, Chiaki IIZUKA
  • Publication number: 20180275084
    Abstract: According to one embodiment, a sensor includes a graphene film and at least two electrodes. The graphene film has an opening. The opening dominantly has either a zigzag edge or an armchair edge. The two electrodes electrically contact the graphene film, for reading a change in electric characteristics of the graphene film due to coaction with an object to be detected.
    Type: Application
    Filed: March 2, 2018
    Publication date: September 27, 2018
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tatsuro SAITO, Yoshiaki SUGIZAKI, Atsunobu ISOBAYASHI, Akihiro KAJITA
  • Patent number: 10035369
    Abstract: An image erasing apparatus according to an embodiment includes a sheet supply portion that supplies a sheet and an ejector. A first conveying path conveys the sheet from the sheet supply portion toward the ejector. A reader arranged on the first conveying path reads an image on the sheet. A second conveying path branches from the first conveying path at a downstream of the reader on the first conveying path and merges with the first conveying path at an upstream of the reader on the first conveying path. An erasing unit is arranged on the second conveying path. A conveying path changing portion is arranged at a branching portion. An operating portion receives a setup of the processing to the sheet. A controller changes a conveying path of the sheet in accordance with the setup received by the operating portion before the sheet is supplied from the sheet supply portion.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: July 31, 2018
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki Iizuka
  • Publication number: 20180178572
    Abstract: An erasing apparatus of embodiments has a color erasing device, the color erasing device has: a first heating member; a second heating member provided at a position facing the first heating member so as to form a nip portion therebetween through which the sheet is passed; a halogen lamp configured to heat the second heating member from outside thereof; and a reflector provided at a position opposite to the second heating member with the halogen lamp interposed therebetween and having a reflective surface configured to reflect heat received from the halogen lamp toward the second heating member, the reflector forming a guiding section configured to be in sliding contact with the sheet being conveyed so as to guide the sheet to the nip portion, the guiding section being heated by the halogen lamp.
    Type: Application
    Filed: February 23, 2018
    Publication date: June 28, 2018
    Inventors: Hiroyuki TSUCHIHASHI, Kikuo MIZUTANI, Hidetoshi YOKOCHI, Isao YAHATA, Takahiro KAWAGUCHI, Yoshiaki SUGIZAKI, Hiroyuki TAKI, Ken IGUCHI, Chiaki IIZUKA
  • Patent number: 9925817
    Abstract: An erasing apparatus of embodiments has a color erasing device, the color erasing device has: a first heating member; a second heating member provided at a position facing the first heating member so as to form a nip portion therebetween through which the sheet is passed; a halogen lamp configured to heat the second heating member from outside thereof; and a reflector provided at a position opposite to the second heating member with the halogen lamp interposed therebetween and having a reflective surface configured to reflect heat received from the halogen lamp toward the second heating member, the reflector forming a guiding section configured to be in sliding contact with the sheet being conveyed so as to guide the sheet to the nip portion, the guiding section being heated by the halogen lamp.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: March 27, 2018
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Hiroyuki Tsuchihashi, Kikuo Mizutani, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Hiroyuki Taki, Ken Iguchi, Chiaki Iizuka
  • Patent number: 9887328
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a sealing member configured to cover a lower surface of the semiconductor layer and a side surface of the semiconductor layer to protrude to be higher than an upper surface of the semiconductor layer at a side of the semiconductor layer, a fluorescer layer provided above the semiconductor layer and the sealing member, and an insulating film provided between the sealing member and the semiconductor layer and between the sealing member and the fluorescer layer. A corner of a protruding portion of the sealing member is rounded.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: February 6, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Tomizawa, Akihiro Kojima, Miyoko Shimada, Yosuke Akimoto, Hideko Mukaida, Mitsuyoshi Endo, Hideto Furuyama, Yoshiaki Sugizaki, Kazuo Fujimura, Shinya Ito, Shinji Nunotani
  • Patent number: 9882099
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor layer including a light emitting layer; and a phosphor layer provided on the semiconductor layer. The phosphor layer includes a plurality of phosphors, ?0.05<A×(AR)+B×(Np)+C<0.05 being satisfied for ?0.149055?(3×0.011797)?constant A??0.149055+(3×0.011797), ?0.000192?(3×0.00002461)?constant B??0.000192+(3×0.00002461), and 0.0818492?(3×0.005708)?constant C?0.0818492+(3×0.005708). AR is a ratio of a thickness of the phosphor layer to a width of the phosphor layer, and Np is a number of the plurality of phosphors.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: January 30, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Akimoto, Akihiro Kojima, Miyoko Shimada, Hideyuki Tomizawa, Hideto Furuyama, Yoshiaki Sugizaki
  • Publication number: 20180009656
    Abstract: According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with the space portion. The sensing unit further includes a movable beam, a strain sensing element unit, and first and second buried interconnects. The movable beam has fixed and movable portions, and includes first and second interconnect layers. The fixed portion is fixed to the non-space portion. The movable portion is separated from the transistor and extends from the fixed portion into the space portion. The strain sensing element unit is fixed to the movable portion. The first and second buried interconnects are provided in the non-space portion.
    Type: Application
    Filed: September 12, 2017
    Publication date: January 11, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideaki FUKUZAWA, Tatsuya OHGURO, Akihiro KOJIMA, Yoshiaki SUGIZAKI, Mariko TAKAYANAGI, Yoshihiko FUJI, Akio HORI, Michiko HARA
  • Patent number: 9837580
    Abstract: According to one embodiment, the n-side electrode has a corner and a plurality of straight portions. The plurality of straight portions extends in different directions. The corner connects the plurality of straight portions. A first insulating film is provided between the semiconductor layer and the corner of the n-side electrode. The corner is not in contact with the semiconductor layer. The straight portions of the n-side electrode are in contact with the semiconductor layer.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: December 5, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Tomizawa, Akihiro Kojima, Miyoko Shimada, Yosuke Akimoto, Miyuki Shimojuku, Hideto Furuyama, Yoshiaki Sugizaki
  • Publication number: 20170301829
    Abstract: According to one embodiment, the p-side electrode is provided on the second semiconductor layer. The insulating film is provided on the p-side electrode. The n-side electrode includes a first portion, a second portion, and a third portion. The first portion is provided on a side face of the first semiconductor layer. The second portion is provided in the first n-side region. The third portion overlaps the p-side electrode via the insulating film and connects the first portion and the second portion to each other.
    Type: Application
    Filed: July 3, 2017
    Publication date: October 19, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki TOMIZAWA, Akihiro KOJIMA, Miyoko SHIMADA, Yosuke AKIMOTO, Hideto FURUYAMA, Yoshiaki SUGIZAKI
  • Patent number: 9790087
    Abstract: According to one embodiment, a strain and pressure sensing device includes a semiconductor circuit unit and a sensing unit. The semiconductor circuit unit includes a semiconductor substrate and a transistor. The transistor is provided on a semiconductor substrate. The sensing unit is provided on the semiconductor circuit unit, and has space and non-space portions. The non-space portion is juxtaposed with the space portion. The sensing unit further includes a movable beam, a strain sensing element unit, and first and second buried interconnects. The movable beam has fixed and movable portions, and includes first and second interconnect layers. The fixed portion is fixed to the non-space portion. The movable portion is separated from the transistor and extends from the fixed portion into the space portion. The strain sensing element unit is fixed to the movable portion. The first and second buried interconnects are provided in the non-space portion.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: October 17, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideaki Fukuzawa, Tatsuya Ohguro, Akihiro Kojima, Yoshiaki Sugizaki, Mariko Takayanagi, Yoshihiko Fuji, Akio Hori, Michiko Hara
  • Patent number: 9776448
    Abstract: According to one embodiment, an image erasing apparatus includes a sheet supply section, a discharge tray, a first conveying path, a reader, a second conveying path, an erasing unit and a switching section. A controller controls the first conveying path, the reader, the second conveying path, the erasing unit and the switching section depending on a selected mode. When the selected mode is an erasing mode, the sheet is conveyed on the first conveying path without being read by the reader, conveyed on the second conveying path where the image is erased by the erasing unit, and then conveyed to the discharge tray. When the selected mode is a reading mode, the sheet is conveyed on the first conveying path where the surface of the sheet is read by the reader, and then conveyed to the discharge tray without being conveyed on the second conveying path.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: October 3, 2017
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventors: Ken Iguchi, Hidetoshi Yokochi, Isao Yahata, Takahiro Kawaguchi, Yoshiaki Sugizaki, Kikuo Mizutani, Hiroyuki Taki, Hiroyuki Tsuchihashi, Chiaki Iizuka
  • Patent number: 9722143
    Abstract: According to one embodiment, the p-side electrode is provided on the second semiconductor layer. The insulating film is provided on the p-side electrode. The n-side electrode includes a first portion, a second portion, and a third portion. The first portion is provided on a side face of the first semiconductor layer. The second portion is provided in the first n-side region. The third portion overlaps the p-side electrode via the insulating film and connects the first portion and the second portion to each other.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: August 1, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Tomizawa, Akihiro Kojima, Miyoko Shimada, Yosuke Akimoto, Hideto Furuyama, Yoshiaki Sugizaki
  • Patent number: 9676608
    Abstract: A substrate includes a functional element. An insulating first film forms a cavity which stores the functional element, together with the substrate, and includes a plurality of through-holes. An insulating second film covers the plurality of through-holes, is formed on the first film, and has a gas permeability which is higher than that of the first film. An insulating third film is formed on the second film and has a gas permeability which is lower than the second film. An insulating fourth film is formed on the third film and has an elasticity which is larger than the third film.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: June 13, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiro Kojima, Yoshiaki Sugizaki, Yoshiaki Shimooka
  • Patent number: 9620669
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting chip and a fluorescent material layer. The light emitting chip includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a resin layer. The semiconductor layer includes a light emitting layer, a first major surface, and a second major surface formed on a side opposite to the first major surface. The fluorescent material layer is provided on the first major surface and has a larger planer size than the light emitting chip.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: April 11, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Sugizaki, Hideki Shibata, Akihiro Kojima, Masayuki Ishikawa, Hideo Tamura, Tetsuro Komatsu
  • Publication number: 20170080736
    Abstract: An image erasing apparatus according to an embodiment includes a sheet supply portion that supplies a sheet and an ejector. A first conveying path conveys the sheet from the sheet supply portion toward the ejector. A reader arranged on the first conveying path reads an image on the sheet. A second conveying path branches from the first conveying path at a downstream of the reader on the first conveying path and merges with the first conveying path at an upstream of the reader on the first conveying path. An erasing unit is arranged on the second conveying path. A conveying path changing portion is arranged at a branching portion. An operating portion receives a setup of the processing to the sheet. A controller changes a conveying path of the sheet in accordance with the setup received by the operating portion before the sheet is supplied from the sheet supply portion.
    Type: Application
    Filed: November 30, 2016
    Publication date: March 23, 2017
    Inventors: Ken IGUCHI, Hidetoshi YOKOCHI, Isao YAHATA, Takahiro KAWAGUCHI, Yoshiaki SUGIZAKI, Kikuo MIZUTANI, Hiroyuki TAKI, Hiroyuki TSUCHIHASHI, Chiaki IIZUKA