Abstract: In order to inhibit destruction during a turn-off state, a cathode electrode (6) is not connected to the overall major surface of a semiconductor substrate (10), but selectively connected to a region which is substantially opposed to an anode electrode (5). When a forward voltage is applied, therefore, an electric field which is generated in the semiconductor substrate (10) is distributed substantially only in a region immediately under a P-type diffusion layer (2), to hardly spread into a peripheral region positioned outside the region. Consequently, carriers which are injected from the P-type diffusion layer (2) and an N.sup.+ layer (4) into an N.sup.- layer (1) hardly spread to the peripheral region, but are stored substantially only in the region immediately under the P-type diffusion layer (2). Thus, concentration of a reverse current is relieved during a turn-off state in a peripheral edge portion of the P-type diffusion layer (2).

Abstract: It is an abject to stably and surely perform protection operation of devices. Since the gate threshold voltage V.sub.GE(th)S in a sense IGBT cell constituting a sensing circuit is set to have a higher value than the gate threshold voltage V.sub.GE(th)M in a main IGBT cell constituting a main circuit, a finite time .DELTA.t is required from when the gate voltage V.sub.GE reaches the gate threshold voltage V.sub.GE(th)M until when it reaches the gate threshold voltage V.sub.GE(th)S in the turn-on period. Accordingly, the rise of the main current Is of the sensing circuit is delayed from the main current Im of the main circuit. As a result, surge current does not appear in the current Is. As the surge current does not appear in the main current of the sensing circuit, a protection circuit of the device operates stably, and breakdown of the device is surely prevented.

Abstract: In an insulated gate semiconductor device, a loss is suppressed and a short-circuit tolerance as well as a latch-up tolerance are improved. A saturation current I.sub.CE (sat) and a short-circuit tolerance tw are reduced without much influencing a collector-emitter saturation voltage V.sub.CE (sat) by setting a sheet resistance of an n-type emitter region 4 at a large value. When the sheet resistance is in the range between 40.OMEGA./.quadrature. and 150.OMEGA./.quadrature., 10 .mu.sec or more of the short-circuit tolerance, which is practically sufficient, is ensured while the collector-emitter saturation voltage V.sub.CE (sat) is suppressed to practically small 2.4 V or less. Both the collector-emitter saturation voltage V.sub.CE (sat) and the saturation current I.sub.CE (sat) are restrained small, thereby realizing an enhanced short-circuit tolerance.

Abstract: An improved insulated gate semiconductor device comprises a high-concentration p-type semiconductor region formed widely enough to protrude over n-type emitter regions without reaching an n-type epitaxial layer over a p-type base region only in first regions wherein the n-type emitter regions are wider than second regions as viewed from the top of the device. A gate threshold voltage V.sub.GE (th) has a relatively high level V.sub.GE (th-High) in the first regions, so that a low collector-emitter saturation voltage V.sub.CE (sat) and a low saturation current I.sub.CE (sat) are achieved. This provides for a high short-circuit tolerance as well as a high latch-up tolerance with low losses.

Abstract: In order to obtain a semiconductor device which can suppress a surge voltage and a method of fabricating the same, a thickness (d4-d5) and impurity concentration of an N.sup.- -type layer (4) provided under a P-type base region (5) are so set as to reliably prevent a depletion layer extending from a P-N junction formed in the interface between the P-type base region (5) and the N.sup.- -type layer 4 from reaching an N.sup.+ -type buffer layer 2 in a turn-off time. Thus, it is possible to suppress a surge voltage caused in an actual operation.

Abstract: An improved insulated gate semiconductor device comprises a high-concentration p-type semiconductor region formed widely enough to protrude over n-type emitter regions without reaching an n-type epitaxial layer over a p-type base region only in first regions wherein the n-type emitter regions are wider than second regions as viewed from the top of the device. A gate threshold voltage V.sub.GE (th) has a relatively high level V.sub.GE (th-High) in the first regions, so that a low collector-emitter saturation voltage V.sub.CE (sat) and a low saturation current I.sub.CE (sat) are achieved. This provides for a high short-circuit tolerance as well as a high latch-up tolerance with low losses.