Abstract: In the re-wiring formation process of a WLCSP, at least some of the re-wiring lines 3 that connect the bonding pads 1 and bump pads 2 of the semiconductor chips are formed using a photolithographic process that does not use a photomask. In this re-wiring formation process, standard portions are formed by development following photomask exposure, and portions that are to be designed corresponding to customer specifications are subjected to additional development following additional maskless exposure in the final stage.

Abstract: There are provided a high density and low manufacturing cost wiring board with high reliability in connection, a semiconductor device and a producing method therefor. The invention relates to a wiring board comprising a board having an electrode and being coated with an insulation layer with a hole for exposing the electrode; a wiring consisting of a Cr or Ti layer, which is connected to the electrode and closely contacts with the insulation layer, and of a Cu layer which is closely contacts with the Cr or Ti layer; a protective film which covers the wiring and is provided with another hole for soldering; and a solder for the outer connection which is mounted in the both holes and brought to diffuse into the Cu layer to produce an alloy, and brought to reach the Cr or Ti layer thereby connecting the solder to the Cr or Ti layer.

Abstract: A semiconductor device which includes a semiconductor chip, an insulating film formed on the semiconductor chip, a plurality of projected stress relaxation materials formed on the insulating film, projected electrodes covering at least tops of the stress relaxation materials, and wiring lines for electrically connecting the projected electrodes and element electrodes of the semiconductor chip.

Abstract: Forming solder bumps each having a constant height by surely supplying onto each of electrode pads a solder ball corresponding to a predetermined volume while omitting Au plating performed on the electrode pads onto which the solder bumps are to be formed. For achieving the forming of the solder bumps, the adhesive film is formed instead of the Au plating, the adhesive film being used as an oxidation-preventing film and as film for temporarily fixing each of the solder balls, the solder balls being supplied by stencil mask or the vacuum adsorbing mask.

Abstract: There are provided a high density and low manufacturing cost wiring board with high reliability in connection, a semiconductor device and a producing method therefor.The invention relates to a wiring board comprising a board having an electrode and being coated with an insulation layer with a hole for exposing the electrode; a wiring consisting of a Cr or Ti layer, which is connected to the electrode and closely contacts with the insulation layer, and of a Cu layer which is closely contacts with the Cr or Ti layer; a protective film which covers the wiring and is provided with another hole for soldering; and a solder for the outer connection which is mounted in the both holes and brought to diffuse into the Cu layer to produce an alloy, and brought to reach the Cr or Ti layer thereby connecting the solder to the Cr or Ti layer.

Abstract: A multi-chip module including semiconductor devices and a wiring substrate for mounting the semiconductor devices in which the wiring substrate comprises a glass substrate having holes formed by sand blasting and a wiring layer formed on the surface of the glass substrate and having wiring and an insulation layer.

Abstract: A multi-chip module including semiconductor devices and a wiring substrate for mounting the semiconductor devices in which the wiring substrate comprises a glass substrate having holes formed by sand blasting and a wiring layer formed on the surface of the glass substrate and having wiring and an insulation layer.

Abstract: Disclosed is a technique capable of enhancing the degree of freedom in the layout of a rerouting layer in a wafer level CSP in which defect repairing is performed by cutting a fuse. More specifically, after the defect repairing is performed by irradiating a laser beam to a fuse, an organic passivation layer (photo-sensitive polyimide layer) is filled in a fuse opening. Thereafter, a rerouting layer, a bump land, an uppermost wiring layer, and a solder bump are formed on the organic passivation layer. In the following steps of the defect repairing, the baking process to cure an elastomer layer and the uppermost protection layer is conducted at a temperature below 260° C. in order to prevent the variance of the refresh times of memory cells.

Abstract: A semiconductor integrated circuit device includes a semiconductor substrate, a circuit element formed on one major surface of the semiconductor substrate and constituting an integrated circuit having a plurality of functions or a plurality of characteristics, an internal connection terminal, connected to the integrated circuit, for selecting one of the plurality of functions or one of the characteristics in the integrated circuit, an insulating layer covering the internal connection terminal such that the internal connection terminal is selectively exposed, and an external connection terminal arranged on the insulating layer. One of the plurality of functions or one of the plurality of characteristics is selected by a connection state between the internal connection terminal and the external connection terminal.

Abstract: A semiconductor module, comprising a wiring substrate on which wiring is formed, a semiconductor device electrically connected to the wiring formed on the wiring substrate, and an external connection terminal arranged on the semiconductor device mounted side of the wiring substrate so as to be a connected portion between the wiring and the outside electrically connected thereto, wherein there is formed an insulating resin layer thicker than the semiconductor device between the wiring substrate and the external connection terminal.

Abstract: The object of the present invention is to realize a semiconductor device enabling a flip chip connection without use of underfill.

Abstract: The present invention is a semiconductor device having the semiconductor element 1 obtained by cutting a semiconductor wafer with the electrode pad 2 formed on one side along the scribe line, the semiconductor element protective layer 7 on the semiconductor element 1 which has the opening 7(1) on the pad 2, the stress cushioning layer 3 on the layer 7 which has the opening 3(1) on the pad 2, the lead wire portion 4 reaching the layer 3 from the electrode pad 2 via the openings 7(1) and 3(1), the external electrodes 6 on the lead wire portion 4, and the conductor protective layer 5 on the layer 3 and the layer 7, the layer 3, and the conductor protective layer 5 form the respective end faces on the end surface 1(1) of the semiconductor element 1 inside the scribe line and expose the range from the end face of the end surface 1(1) to the inside of the scribe line.

Abstract: Forming solder bumps each having a constant height by surely supplying onto each of electrode pads a solder ball corresponding to a predetermined volume while omitting Au plating performed on the electrode pads onto which the solder bumps are to be formed. For achieving the forming of the solder bumps, the adhesive film is formed instead of the Au plating, the adhesive film being used as an oxidation-preventing film and as film for temporarily fixing each of the solder balls, the solder balls being supplied by stencil mask or the vacuum adsorbing mask.

Abstract: A multilayer wiring board fabricating method and a multilayer wiring board fabricated with use of the method that a solvent-free fluid polymer precursor is put on a wiring layer of a base substrate, and space among the wirings is exhausted and is filled with the precursor, and the precursor is hardened under a hydrostatic pressure and then the next wiring layer is formed before the above process is repeated one or more times. The multilayer wiring board fabricating method is excellent in the mass productivity and low cost and in that the wiring can be made highly dense with the substrate having vertical via conductors for connection among the conductor layers.