Patents by Inventor Yoshihiko Imanaka

Yoshihiko Imanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080197501
    Abstract: An interconnection substrate including therein one or more resin layers, each of the resin layers including therein a via-hole penetrating from a top surface to a bottom surface of the resin layer. A via-plug of metal particles is formed in the via-hole. Each of the metal particles has a flat shape generally parallel to a plane of the resin layer.
    Type: Application
    Filed: January 2, 2008
    Publication date: August 21, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Yoshihiko IMANAKA
  • Publication number: 20080085955
    Abstract: This invention seeks to provide a resin composition that can simultaneously satisfy resistances such as heat resistance and environmental resistance and moldability at high levels and that has excellent optical properties such as high refractivity and low birefringence and molded article thereof. The present invention is a resin composition containing a polyester resin formed from a dicarboxylic acid component and a diol component (a) and a polycarbonate resin formed from a carbonate-forming component and a diol component (b), the diol component (a) containing a specific fluorene-containing compound and the diol component (b) containing a specific fluorene-containing compound.
    Type: Application
    Filed: July 13, 2005
    Publication date: April 10, 2008
    Inventors: Takatsune Yanagida, Masatoshi Ando, Yoshihiko Imanaka, Masahiro Yamada, Shinichi Kawasaki, Mitsuaki Yamada, Hiroaki Murase, Tsuyoshi Fujiki, Kana Kobori
  • Publication number: 20070293606
    Abstract: It is an object of the present invention to provide an infrared absorption filter which enables a coloring matter having infrared absorptivity to be contained or dispersed uniformly in a high concentration and has excellent durability and an infrared absorption panel comprising this infrared absorption filter. The infrared absorption filter is composed of a polycarbonate resin which contains 20 to 100 mol % of a recurring unit having a fluorene skeleton represented by the formula (1) and 0 to 80 mol % of a recurring unit represented by the formula (2) and a coloring matter having infrared absorptivity.
    Type: Application
    Filed: October 19, 2005
    Publication date: December 20, 2007
    Inventors: Masahiro Yamada, Tsuyoshi Fujiki, Shinichi Kawasaki, Mitsuaki Yamada, Takatsune Yanagida, Masatoshi Ando, Yoshihiko Imanaka
  • Publication number: 20070230151
    Abstract: A circuit substrate comprises a lamination of plural resin insulation films and includes, on a surface and in an interior of the circuit substrate, plural interconnection layers. One of the plural resin insulation films is formed on a first conductor pattern constituting one of the plural interconnection layers in such a manner that a bottom principal surface of the resin insulation film makes a contact with a surface of the first conductor pattern, the resin insulation film including an opening defined by a sloped surface and exposing the first conductor pattern at the bottom principal surface. A ceramic high-K dielectric film is formed at a bottom of the opening in contact with the surface of the first conductor pattern, wherein there is formed a second conductor pattern constituting one of the plural interconnection layers on the resin insulation film so as to cover the sloped surface and in contact with a surface of the ceramic high-K dielectric film.
    Type: Application
    Filed: August 22, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Nobuyuki Hayashi, Yoshihiko Imanaka
  • Publication number: 20070065981
    Abstract: A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer formed on or above said support substrate, leading some of said through holes filles with conductor upwards through said capacitor, having branches, and having wires of a second pitch different from said first pitch; and plural semiconductor elements disposed on or above said wiring layer, having terminals adapted to the second pitch, and connected with said wiring layer via said terminals. A semiconductor apparatus, in which semiconductor elements having a narrow terminal pitch, a support having through wires at a wider pitch, and a capacitor are suitably electrically connected to realize the decoupling function with reduced inductance and large capacitance.
    Type: Application
    Filed: November 16, 2006
    Publication date: March 22, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Keishiro Okamoto, Takeshi Shioga, Osamu Taniguchi, Koji Omote, Yoshihiko Imanaka, Yasuo Yamagishi
  • Patent number: 7176556
    Abstract: A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer formed on or above said support substrate, leading some of said through holes filles with conductor upwards through said capacitor, having branches, and having wires of a second pitch different from said first pitch; and plural semiconductor elements disposed on or above said wiring layer, having terminals adapted to the second pitch, and connected with said wiring layer via said terminals. A semiconductor apparatus, in which semiconductor elements having a narrow terminal pitch, a support having through wires at a wider pitch, and a capacitor are suitably electrically connected to realize the decoupling function with reduced inductance and large capacitance.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: February 13, 2007
    Assignee: Fujitsu Limited
    Inventors: Keishiro Okamoto, Takeshi Shioga, Osamu Taniguchi, Koji Omote, Yoshihiko Imanaka, Yasuo Yamagishi
  • Patent number: 7070859
    Abstract: A laminate which is excellent in appearance, adhesion, scratch resistance, abrasion resistance and hot water resistance and has a high level of weatherability and excellent durability, and an acrylic resin composition and an organosiloxane resin composition both of which can be used for the manufacture of the above laminate and have excellent storage stability. The laminate comprises a polycarbonate substrate, a first layer formed on the surface of the polycarbonate substrate, and a second layer formed on the surface of the first layer, wherein the first layer is composed of a crosslinked acrylic copolymer and an ultraviolet light absorber, and the second layer is composed of a crosslinked organosiloxane polymer; and the crosslinked acrylic copolymer comprises specific recurring units and an urethane bond in a specific ratio, and the organosiloxane polymer has a specific structure composed of colloidal silica and alkoxysilanes.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: July 4, 2006
    Assignee: Teijin Chemicals, Ltd.
    Inventors: Yoshihiko Imanaka, Shunsuke Kajiwara, Tatsuya Ekinaka, Toshio Kita, Takehiro Suga, Ryou Niimi, Isao Sogou
  • Publication number: 20060087029
    Abstract: A semiconductor device includes a semiconductor chip having a surface provided with connecting electrodes, a stacked structure made up of alternately stacked dielectric and wiring layers and provided on the surface of the semiconductor chip, a passive element provided in the stacked structure and electrically connected to the wiring layers; and external electrodes for external electrical connection provided on the stacked structure and electrically connected to the connecting electrodes via the wiring layers. The passive element has at least one layer selected from a group consisting of a capacitor dielectric layer, a resistor layer and a conductor layer that are formed by spraying an aerosol particulate material.
    Type: Application
    Filed: October 17, 2005
    Publication date: April 27, 2006
    Applicants: FUJITSU LIMITED, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Yoshihiko Imanaka, Jun Akedo
  • Patent number: 6846567
    Abstract: A surface-protected plastic composite material comprising a transparent plastic, a coating layer (I) as a first layer stacked on the transparent plastic and a thermally cured coating layer (II) as a second layer stacked on the first layer, the coating layer (I) being formed of a resin composition containing at least 50% by weight, based on the resin content thereof, of an acrylic resin which is an acrylic resin containing at least 50 mol % of recurring unit based on an alkyl methacrylate, the thermally cured coating layer (II) being made of an organosiloxane resin formed from the following components a, b and c, (A) colloidal silica (component a), (B) a hydrolysis condensate (component b) of a trialkoxysilane, (C) a hydrolysis condensate (component c) of a tetraalkoxysilane, the organosiloxane resin containing 5 to 45% by weight of the component a, 50 to 80% by weight of the component b and 2 to 30% by weight of the component c, and use of the composite material as a window glass.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: January 25, 2005
    Assignee: Teijin Chemicals, Ltd.
    Inventors: Tatsuya Ekinaka, Yoshihiko Imanaka
  • Publication number: 20040247878
    Abstract: A laminate which is excellent in appearance, adhesion, scratch resistance, abrasion resistance and hot water resistance and has a high level of weatherability and excellent durability, and an acrylic resin composition and an organosiloxane resin composition both of which can be used for the manufacture of the above laminate and have excellent storage stability.
    Type: Application
    Filed: February 19, 2004
    Publication date: December 9, 2004
    Inventors: Yoshihiko Imanaka, Shunsuke Kajiwara, Tatsuya Ekinaka, Toshio Kita, Takehiro Suga, Ryou Niimi, Isao Sogou
  • Publication number: 20040227227
    Abstract: A circuit substrate includes a passive element and an interconnection pattern, wherein any of the passive element and the interconnection pattern is formed by an aerosol deposition process that uses aerosol of a fine particle material.
    Type: Application
    Filed: April 8, 2004
    Publication date: November 18, 2004
    Applicants: FUJITSU LIMITED, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Yoshihiko Imanaka, Jun Akedo, Maxim Lebedev
  • Patent number: 6780965
    Abstract: A plastic lens, an optical molded article, a film or a sheet formed of a copolycarbonate resin comprising a structural unit (I) of the following general formula (I), and a structural unit (II) of the following formula (II), the structural unit (I) having a molar amount percentage of 15 to 85% on the basis of the total amount of the structural units (I) and (II). According to the present invention, there are provided a plastic lens, an optical molded article, and the like, which are excellent in physical properties such as transparency, thermal stability and impact resistance and are excellent in optical properties such as a balance between a refractive index and an Abbe's number and a photoelasticity constant.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: August 24, 2004
    Assignee: Teijin Chemicals Ltd
    Inventors: Masatoshi Ando, Toshiyuki Miyake, Yoshihiko Imanaka
  • Patent number: 6768205
    Abstract: The objective of the present invention is to provide a reliable thin-film circuit substrate or via formed substrate that is provided with minute via plugs at a fine pitch. The objective is served by forming an insulation layer that functions as an etching stopper on a Si substrate, and then via holes are formed in the Si substrate, using a semiconductor process, until the etching stopper layer is exposed. Further, a thin-film circuit is formed on the insulation layer, and the insulation layer is removed at the via holes such that the thin-film circuit is exposed. As necessary, the thin film circuit is heat-treated, and then the via holes are filled with an electrically conductive material and vamp electrodes are formed.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: July 27, 2004
    Assignee: Fujitsu Limited
    Inventors: Osamu Taniguchi, Tomoko Miyashita, Yasuo Yamagishi, Koji Omote, Yoshihiko Imanaka
  • Publication number: 20040108629
    Abstract: The method for fabricating a ceramic substrate comprises the step of screen-printing a first dielectric material in a first region of a resin film 30 and screen-printing a second dielectric material of a dielectric constant different from that of the first dielectric material in a second region of the resin film 30 to form a layer including on the resin film 30 a high dielectric layer 20a of the first dielectric material and a base dielectric layer 24a of the second dielectric material, the step of releasing the layer from the resin film 30, and the step of sintering the layer released form the resin film 30.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 10, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Yoshihiko Imanaka, Masatoshi Takenouchi
  • Patent number: 6733890
    Abstract: An integrated ceramic module is formed of a first ceramic dielectric layer containing a glass as a sintering agent and having a high dielectric constant and high Q value, formed with an electronic component, and a second ceramic dielectric layer containing a glass as a sintering agent and having a low dielectric constant and a high Q value, formed with a signal transmission line.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: May 11, 2004
    Assignee: Fujitsu Limited
    Inventors: Yoshihiko Imanaka, Masatoshi Takenouchi
  • Publication number: 20030107455
    Abstract: An integrated ceramic module is formed of a first ceramic dielectric layer containing a glass as a sintering agent and having a high dielectric constant and high Q value, formed with an electronic component, and a second ceramic dielectric layer containing a glass as a sintering agent and having a low dielectric constant and a high Q value, formed with a signal transmission line.
    Type: Application
    Filed: October 22, 2002
    Publication date: June 12, 2003
    Inventors: Yoshihiko Imanaka, Masatoshi Takenouchi
  • Publication number: 20030080400
    Abstract: A semiconductor apparatus comprises a support substrate having through holes filles with conductor adapted to a first pitch; a capacitor formed on or above said support substrate; a wiring layer formed on or above said support substrate, leading some of said through holes filles with conductor upwards through said capacitor, having branches, and having wires of a second pitch different from said first pitch; and plural semiconductor elements disposed on or above said wiring layer, having terminals adapted to the second pitch, and connected with said wiring layer via said terminals. A semiconductor apparatus, in which semiconductor elements having a narrow terminal pitch, a support having through wires at a wider pitch, and a capacitor are suitably electrically connected to realize the decoupling function with reduced inductance and large capacitance.
    Type: Application
    Filed: March 8, 2002
    Publication date: May 1, 2003
    Applicant: Fujitsu Limited
    Inventors: Keishiro Okamoto, Takeshi Shioga, Osamu Taniguchi, Koji Omote, Yoshihiko Imanaka, Yasuo Yamagishi
  • Publication number: 20030055200
    Abstract: A plastic lens, an optical molded article, a film or a sheet formed of a copolycarbonate resin comprising a structural unit (I) of the following general formula (I), 1
    Type: Application
    Filed: March 6, 2002
    Publication date: March 20, 2003
    Inventors: Masatoshi Ando, Toshiyuki Miyake, Yoshihiko Imanaka
  • Publication number: 20030045085
    Abstract: The objective of the present invention is to provide a reliable thin-film circuit substrate or via formed substrate that is provided with minute via plugs at a fine pitch. The objective is served by forming an insulation layer that functions as an etching stopper on a Si substrate, and then via holes are formed in the Si substrate, using a semiconductor process, until the etching stopper layer is exposed. Further, a thin-film circuit is formed on the insulation layer, and the insulation layer is removed at the via holes such that the thin-film circuit is exposed. As necessary, the thin film circuit is heat-treated, and then the via holes are filled with an electrically conductive material and vamp electrodes are formed.
    Type: Application
    Filed: March 1, 2002
    Publication date: March 6, 2003
    Applicant: Fujitsu Limited
    Inventors: Osamu Taniguchi, Tomoko Miyashita, Yasuo Yamagishi, Koji Omote, Yoshihiko Imanaka
  • Patent number: 5286713
    Abstract: A superconducting circuit board is provided comprising a sintered alumina board containing more than 99% by weight of alumina and an interconnection pattern of an superconducting ceramics formed on the alumina board. Adhesion of the interconnection pattern to the alumina board is improved by an addition of Ti or Si coupling agent to a paste for forming the interconnection pattern. The use of copper powder in place of copper oxide powder as an ingredient forming a superconducting ceramics in the paste is advantageous for printing and obtaining a uniform superconducting ceramic pattern.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: February 15, 1994
    Assignee: Fujitsu Limited
    Inventors: Hiromitsu Yokoyama, Yoshihiko Imanaka, Kazunori Yamanaka, Nobuo Kamehara, Koichi Niwa, Takuya Uzumaki, Hitoshi Suzuki, Takato Machi