Patents by Inventor Yoshihiko Yagi

Yoshihiko Yagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7659148
    Abstract: A bonding method and an apparatus that enable metal bonding under the atmospheric pressure and at room temperature, wherein the surfaces of objects (1b, 2a) to be bonded together are cleaned in an initial cleaning step (S1) to remove bonding inhibitor substances (G) such as oxides and adhered substances; one (1b) of the bonding surfaces is provided with an uneven profile with a predetermined roughness in a surface roughness control step (S3); a surface treatment step (S5) is performed to remove the substances (F) that have been removed but adhered to the bonding surfaces (1b, 2a) again; and the uneven bonding surface (1b) is pressed against the other bonding surface (2a) to bond them together.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: February 9, 2010
    Assignee: Panasonic Corporation
    Inventors: Tatsuo Sasaoka, Satoshi Horie, Isamu Aokura, Yoshihiko Yagi, Kazuki Fukada
  • Publication number: 20100029044
    Abstract: Conductive bump (17) formed on a surface of electrode terminal (11) of an electronic component. Conductive bump (17) is composed of at least a plurality of cured resin materials having different conductive filler densities. Thus, a short circuit and a connection failure due to crush of conductive bump (17) at the time of mounting can be prevented.
    Type: Application
    Filed: November 20, 2007
    Publication date: February 4, 2010
    Inventors: Yoshihiko Yagi, Daisuke Sakurai
  • Publication number: 20100008056
    Abstract: A stereoscopically connected structure is made up of a first circuit board and a second circuit board which are mounted with other electronic components, and a relay board having a recess which is mounted with an electronic component and is provided with a lead-out wiring extending from the electronic component, and also having a land part to be connected with the lead-out wiring on one of the surfaces of the relay board that face the first circuit board and second circuit board. Thus the relay board can mount the electronic component thereon as well as connect the first circuit board and the second circuit board, thereby achieving high density mounting.
    Type: Application
    Filed: September 18, 2009
    Publication date: January 14, 2010
    Applicant: Panasonic Corporation
    Inventors: Masahiro ONO, Shigeru Kondo, Kazuhiro Nishikawa, Yoshihiko Yagi, Kazuto Nishida
  • Publication number: 20090321122
    Abstract: Relay substrate (1) connecting between at least a first circuit board and a second circuit board, including housing (10) having recess (10a) provided in the outer circumference and hole (22) provided in the inner circumference; plural connecting terminal electrodes (12a, 12c) connecting between the top and bottom surfaces of housing (10); shield electrode (11) provided in recess (10a); and ground electrode (13) provided on a part of the top and bottom surfaces of housing (10).
    Type: Application
    Filed: March 23, 2007
    Publication date: December 31, 2009
    Inventors: Masato Mori, Daido Komyoji, Koichi Nagai, Yoshihiko Yagi
  • Publication number: 20090315178
    Abstract: A conductive bump formed on an electrode surface of an electronic component. This conductive bump is composed of a plurality of photosensitive resin layers having different conductive filler contents. Consequently, this conductive bump is able to realize conflicting functions, namely, improvement in adhesion strength with the electrode and reduction of contact resistance.
    Type: Application
    Filed: March 4, 2008
    Publication date: December 24, 2009
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Patent number: 7613010
    Abstract: A stereoscopically connected structure is made up of a first circuit board and a second circuit board which are mounted with other electronic components, and a relay board having a recess which is mounted with an electronic component and is provided with a lead-out wiring extending from the electronic component, and also having a land part to be connected with the lead-out wiring on one of the surfaces of the relay board that face the first circuit board and second circuit board. Thus the relay board can mount the electronic component thereon as well as connect the first circuit board and the second circuit board, thereby achieving high density mounting.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: November 3, 2009
    Assignee: Panasonic Corporation
    Inventors: Masahiro Ono, Shigeru Kondo, Kazuhiro Nishikawa, Yoshihiko Yagi, Kazuto Nishida
  • Publication number: 20090266582
    Abstract: A three-dimensional circuit board is formed by comprising a board, a first wiring-electrode group provided on a plurality of steps above the board, and a second wiring-electrode connected to the first wiring-electrode group at least in an altitude direction, in which at least a connecting portion between the first wiring-electrode group and the second wiring-electrode is integrated in a continuously identical shape.
    Type: Application
    Filed: January 12, 2007
    Publication date: October 29, 2009
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Publication number: 20090268423
    Abstract: Interconnect substrate (1) that connects at least the first circuit board and the second circuit board. Interconnect substrate (1) includes housing (1) and connecting terminal electrodes for connecting the top and bottom faces of housing (10). Housing (10) has protrusion (11) on its outer periphery and opening (13) in its inner periphery.
    Type: Application
    Filed: June 19, 2007
    Publication date: October 29, 2009
    Inventors: Daisuke Sakurai, Masato Mori, Yoshihiko Yagi
  • Publication number: 20090215287
    Abstract: A substrate connecting member connects two circuit boards connected together while maintaining high reliability of the junctions between itself and the circuit boards even if the circuit boards are warped by temperature change of an impact load. The substrate connecting member includes a frame member made of an insulating resin; slit grooves formed in at least one of the inner and outer surfaces of frame side portions composing the frame member, the slit grooves being formed throughout the entire length of the frame side portions in the direction perpendicular to the thickness direction of the frame side portions; and connection conductor portions having connection terminals provided on the top and bottom surfaces, respectively, of the frame side portions in the thickness direction and connecting conductors each connecting connection terminals.
    Type: Application
    Filed: July 6, 2006
    Publication date: August 27, 2009
    Inventors: Masato Mori, Yoshihiko Yagi, Masahiro Ono, Yoshihiro Tomura, Kunio Hibino, Yasushi Nakagiri, Akihiro Miyashita, Kunio Sakurai
  • Publication number: 20090026634
    Abstract: An electronic part mounting structure includes electronic part (2) having a plurality of electrode terminals (3), a substrate provided with connection terminals (6) in locations corresponding to these electrode terminals (3), and protruding electrode (7) for connecting one of electrode terminals (3) and one of connection terminals (6), where electrode terminal (3) of electronic part (2) and connection terminal (6) of substrate (5) are connected through protruding electrode (7), and protruding electrode (7) is formed of a conductive resin including a photosensitive resin and a conductive filler.
    Type: Application
    Filed: March 6, 2007
    Publication date: January 29, 2009
    Inventors: Daisuke Sakurai, Yoshihiko Yagi
  • Publication number: 20090009979
    Abstract: Three-dimensional structure (40) of the present invention includes first module board (28), second module board (37), and substrate joining member (10) that unifies board (28) and board (37) into one body, thereby electrically connecting these two elements together. The unification is done by molding the outer wall of housing (12) of substrate joining member (10) with resin (29). Substrate joining member (10) used in the three-dimensional structure (40) includes multiple lead terminals (14) made of conductive material, and a frame-shaped and insulating housing (12) to which frame the lead terminals (14) are fixed vertically in a predetermined array. Housing (12) includes projections (18) on at least two outer wall faces of its frame shape.
    Type: Application
    Filed: April 23, 2007
    Publication date: January 8, 2009
    Inventors: Masato Mori, Daido Komyoji, Koichi Nagai, Yoshihiko Yagi
  • Publication number: 20080135283
    Abstract: A protruding electrodes is formed on a lead electrode of an electronic component, and the protruding electrodes comprises a first conductor formed on the lead electrode of the electronic component, and a second conductor overlaid on the first conductor by using a transfer mold having a concavity. By virtue of this structure, protruding electrodes of any configuration can be formed in fine pitches.
    Type: Application
    Filed: April 14, 2006
    Publication date: June 12, 2008
    Inventors: Kunio Hibino, Yoshihiro Tomura, Yoshihiko Yagi, Kazuhiro Nishikawa
  • Publication number: 20080139013
    Abstract: A first circuit board (1) mounted with an electronic component (16) and a second circuit board (2) are vertically connected three-dimensionally through an interconnecting board (3) wherein the terminal portion (6) of the land electrode (5) on the interconnecting board (3) is buried in the termination material (9) of the interconnecting board (3). Consequently, the chance of peeling or cracking due to peeling stress or shearing stress acting between the upper/lower circuit boards and the land electrode by high density mounting, thermal shock or falling impact can be suppressed or buffered resulting in high reliability.
    Type: Application
    Filed: April 17, 2006
    Publication date: June 12, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiro Tomura, Yasushi Nakagiri, Kunio Hibino, Yoshihiko Yagi, Akihiro Miyashita, Masahiro Ono, Masato Mori
  • Publication number: 20070193682
    Abstract: A bonding method and an apparatus that enable metal bonding under the atmospheric pressure and at room temperature, wherein the surfaces of objects (1b, 2a) to be bonded together are cleaned in an initial cleaning step (S1) to remove bonding inhibitor substances (G) such as oxides and adhered substances; one (1b) of the bonding surfaces is provided with an uneven profile with a predetermined roughness in a surface roughness control step (S3); a surface treatment step (S5) is performed to remove the substances (F) that have been removed but adhered to the bonding surfaces (1b, 2a) again; and the uneven bonding surface (1b) is pressed against the other bonding surface (2a) to bond them together.
    Type: Application
    Filed: April 6, 2005
    Publication date: August 23, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Tatsuo Sasaoka, Satoshi Horie, Isamu Aokura, Yoshihiko Yagi, Kazuki Fukada
  • Patent number: 7071090
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Grant
    Filed: March 8, 2005
    Date of Patent: July 4, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Patent number: 6985363
    Abstract: To provide a card-type recording medium which is capable of increasing memory capacity and excellent in rigidity and shock resistance, and to provide a method for manufacturing the same. A card-type recording medium comprising a memory module 221, 222, 270 which is so constituted that a plurality of memory chips 15 are mounted on a memory board 21, 22, 70, 63, 65 is mounted on one surface of a base board 10, and an IC chip 13, 14, 60 for controlling operation of the plurality of memory chips is mounted on the other surface of the base board, with all housed in a package 30, 31.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: January 10, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihiko Yagi, Kazuhiro Uji, Michiro Yoshino, Kenichi Yamamoto
  • Patent number: 6966964
    Abstract: A method for manufacturing a semiconductor device whereby semiconductor elements like semiconductor bare chips are mounted with high productivity on both surfaces of a circuit board while preventing the board from warping, and an apparatus for manufacturing a semiconductor device for faithfully embodying the manufacturing method. Semiconductor elements temporarily fixed on both surfaces of a circuit board are heated while being pressurized in directions to be each pressed against the board, whereby adhesive on both surfaces of the board is thermally set simultaneously and bumps on each semiconductor elements are press-bonded to their opposing board electrodes on the board to be electrically connected. Ultraviolet rays are irradiated to a circumference of mixed curing adhesive applied to at least one surface of the circuit board to form an ultraviolet curing part only on the circumference of the adhesive, thereby increasing strength for temporarily fixing the semiconductor elements to the circuit board.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: November 22, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koujiro Nakamura, Yoshihiko Yagi, Michiro Yoshino, Kazuto Nishida
  • Publication number: 20050168961
    Abstract: A stereoscopically connected structure is made up of a first circuit board and a second circuit board which are mounted with other electronic components, and a relay board having a recess which is mounted with an electronic component and is provided with a lead-out wiring extending from the electronic component, and also having a land part to be connected with the lead-out wiring on one of the surfaces of the relay board that face the first circuit board and second circuit board. Thus the relay board can mount the electronic component thereon as well as connect the first circuit board and the second circuit board, thereby achieving high density mounting.
    Type: Application
    Filed: November 10, 2004
    Publication date: August 4, 2005
    Inventors: Masahiro Ono, Shigeru Kondo, Kazuhiro Nishikawa, Yoshihiko Yagi, Kazuto Nishida
  • Publication number: 20050146029
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Application
    Filed: March 8, 2005
    Publication date: July 7, 2005
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani
  • Patent number: 6894387
    Abstract: A method of forming a bump electrode on an IC electrode includes the steps of forming a ball bond on an IC electrode by a wire bonding apparatus, moving a bonding capillary upward, moving the bonding capillary sideways and then downward, bonding an Au wire to the ball bond portion, and cutting the Au wire. The Au wire is prevented from coming in contact with portions around the ball bond portion other than the ball bond portion by presetting a descent position of the bonding capillary to a position higher than a position in which the ball bond is formed.
    Type: Grant
    Filed: January 25, 2001
    Date of Patent: May 17, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazushi Higashi, Norihito Tsukahara, Takahiro Yonezawa, Yoshihiko Yagi, Yoshifumi Kitayama, Hiroyuki Otani