Patents by Inventor Yoshihiro Yoneda

Yoshihiro Yoneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170131473
    Abstract: A semiconductor optical device includes a semiconductor substrate having first to fourth regions, a 90-degree optical hybrid provided in the third region on a principal surface of the semiconductor substrate, first and second waveguides provided in the first region being optically coupled to the 90-degree optical hybrid, a photodiode provided in the fourth region, a third waveguide provided in the second region to optically couple the 90-degree optical hybrid to the photodiode, and a metal layer provided on a back surface of the semiconductor substrate. The metal layer includes a first part provided in the first region and a second part provided in the second region spaced apart from the first region by a distance. The 90-degree optical hybrid has a first length. The distance between the first and second parts is more than or equal to the first length.
    Type: Application
    Filed: November 2, 2016
    Publication date: May 11, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji MASUYAMA, Yoshihiro YONEDA, Hideki YAGI, Kenji SAKURAI, Takehiko KIKUCHI
  • Publication number: 20170127223
    Abstract: Provided is an information processing device including: a processing unit configured to, when an information transmission control device is detected based on a signal transmitted from the information transmission control device using first communication, cause user information indicating a user to be transmitted to the information transmission control device using second communication whose communicable range is narrower than the first communication, and to acquire, using the first communication, distribution information transmitted from the information transmission control device that has acquired the user information.
    Type: Application
    Filed: March 19, 2015
    Publication date: May 4, 2017
    Applicant: SONY CORPORATION
    Inventors: Masahiro SUEYOSHI, Yoshihiro YONEDA, Takashi ABENO, Tomohiko NAGAYAMA, Masashi ISHIKAWA
  • Publication number: 20170041831
    Abstract: There is provided a communication apparatus including: a first communication unit having a first communication range; a second communication unit having a second communication range wider than the first communication range; a control unit which transmits a request signal for starting communication via the second communication unit from the first communication unit to another communication apparatus, and transmits authentication information from the second communication unit to the another communication apparatus in the case where it is determined that communication with the another communication apparatus via the second communication unit is possible based on a response signal after the first communication unit receives the response signal in response to the request signal; and a notification unit which notifies a user after the second communication unit receives a result of authentication based on the authentication information.
    Type: Application
    Filed: October 25, 2016
    Publication date: February 9, 2017
    Inventors: Kazuo Takada, Isao Soma, Seiji Kuroda, Yasuharu Ishikawa, Yoshihiro Yoneda, Naoki Miyabayashi
  • Publication number: 20160380023
    Abstract: A semiconductor optical device that integrates photodiodes (PDs) and optical waveguides coupling with the PDs and a method of forming the semiconductor optical device are disclosed. The optical waveguides in a portion in the lower cladding layer thereof provides a modified layer that forms a conduction barrier of the lower cladding layer. The modified layer is formed by converting the conduction type thereof or implanting protons therein. The modified layer prevents the electrical coupling between PDs through the waveguides.
    Type: Application
    Filed: June 27, 2016
    Publication date: December 29, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Ryuji MASUYAMA, Hideki YAGI, Naoko KONISHI
  • Patent number: 9497629
    Abstract: There is provided a communication apparatus including: a first communication unit having a first communication range; a second communication unit having a second communication range wider than the first communication range; a control unit which transmits a request signal for starting communication via the second communication unit from the first communication unit to another communication apparatus, and transmits authentication information from the second communication unit to the another communication apparatus in the case where it is determined that communication with the another communication apparatus via the second communication unit is possible based on a response signal after the first communication unit receives the response signal in response to the request signal; and a notification unit which notifies a user after the second communication unit receives a result of authentication based on the authentication information.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: November 15, 2016
    Assignee: SONY CORPORATION
    Inventors: Kazuo Takada, Isao Soma, Seiji Kuroda, Yasuharu Ishikawa, Yoshihiro Yoneda, Naoki Miyabayashi
  • Patent number: 9482834
    Abstract: A semiconductor optical device includes a substrate including first and second regions arranged in a first direction, a photodiode disposed on the first region, an optical waveguide disposed on the second region, and a buried layer disposed on a side surface of the photodiode. The side surface of the photodiode extends in the first direction. The photodiode has a first end surface intersecting with the first direction, and the optical waveguide is in direct contact with the first end surface. The buried layer is composed of a III-V compound semiconductor doped with a transition metal. The photodiode includes a stacked semiconductor layer including a first cladding layer, a light-absorbing layer and a second cladding layer stacked in that order on the substrate. The light-absorbing layer has a side surface having at least a portion recessed with respect to a side surface of the first cladding layer.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: November 1, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takehiko Kikuchi, Hideki Yagi, Yoshihiro Yoneda
  • Publication number: 20160295639
    Abstract: There is provided an information processing system including a service provider unit, a communication terminal and an information processing unit. The communication terminal includes a terminal first communication section, a terminal second communication section to communicate with the information processing unit through a first communication channel, a terminal third communication section to communicate with the information processing unit through a second communication channel, and a terminal communication control section.
    Type: Application
    Filed: June 9, 2016
    Publication date: October 6, 2016
    Inventors: Isao Soma, Naoki Miyabayashi, Yoshihiro Yoneda, Seiji Kuroda, Yasuharu Ishikawa, Kazuo Takada
  • Publication number: 20160240342
    Abstract: Provided is a current fuse that can improve the rating while also preventing explosive scattering of metal in association with arc discharge and enabling reliable cutting off of a circuit. The current fuse (1) includes an insulating substrate (2), a main fuse element (3) disposed on the insulating substrate (2), and a sub-fuse element (4) disposed on the insulating substrate (2) and having a higher melting point than the main fuse element (3). The main fuse element (3) and the sub-fuse element (4) are connected in parallel.
    Type: Application
    Filed: October 7, 2014
    Publication date: August 18, 2016
    Applicant: Dexerials Corporation
    Inventor: Yoshihiro YONEDA
  • Publication number: 20160227353
    Abstract: There is provided an apparatus including a circuitry configured to initiate a reception of an information request that has been wirelessly transmitted from an information processing terminal, initiate, based on the information request, an obtaining of an information wirelessly from an external communication device, and initiate a wireless transmission of the obtained information to the information processing terminal.
    Type: Application
    Filed: August 7, 2014
    Publication date: August 4, 2016
    Applicant: SONY CORPORATION
    Inventors: Masahiro SUEYOSHI, Yoshihiro YONEDA, Naoya HOSHINO
  • Patent number: 9401969
    Abstract: A system and method for information processing is provided. In an embodiment of the present system and method, a connection target apparatus is detected at an information processing apparatus. Upon detection, the information processing apparatus generates apparatus information and transmits the apparatus information to a server via a communication path. Based on the apparatus information, the server generates connection information and transmits the connection information to the information processing apparatus. The information processing apparatus may use the connection information to establish communication with the connection target apparatus via another communication path.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: July 26, 2016
    Assignee: Sony Corporation
    Inventors: Yoshihiro Yoneda, Naoki Miyabayashi
  • Patent number: 9396477
    Abstract: There is provided an information processing system including a service provider unit, a communication terminal and an information processing unit. The communication terminal includes a terminal first communication section, a terminal second communication section to communicate with the information processing unit through a first communication channel, a terminal third communication section to communicate with the information processing unit through a second communication channel, and a terminal communication control section.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: July 19, 2016
    Assignee: Sony Corporation
    Inventors: Isao Soma, Naoki Miyabayashi, Yoshihiro Yoneda, Seiji Kuroda, Yasuharu Ishikawa, Kazuo Takada
  • Publication number: 20160172143
    Abstract: A fuse device that uses a fuse element having an appropriate size in order to improve the rating, while maintaining insulation performance. The fuse device is provided with a fuse element, a case having a housing space for housing the fuse element and having a lead-out port through which both ends of the fuse element are led out, and which supports the fuse element in a bridge-like manner in the housing space; and a shield disposed in the housing space for shielding an inner wall surface leading to the lead-out port from a scattered melted material from a fusing location of the fuse element.
    Type: Application
    Filed: August 27, 2014
    Publication date: June 16, 2016
    Applicant: DEXERIALS CORPORATION
    Inventors: Yoshihiro YONEDA, Kazuaki SUZUKI
  • Patent number: 9366835
    Abstract: An integrated optical semiconductor device includes a substrate including first and second regions; a plurality of light receiving devices disposed in the second region; a multimode interference coupler disposed in the first region, the multimode interference coupler including output optical waveguides optically coupled to the corresponding light receiving devices; first and second conductive layers disposed on a back surface of the substrate in the first and second regions, respectively; and a plurality of capacitors disposed in the second region, each of the capacitors including a first electrode connected to one of the light receiving devices and a second electrode connected to the second conductive layer. The second conductive layer is electrically insulated from the first conductive layer. The substrate is made of a semi-insulating semiconductor. The multimode interference coupler and the light receiving devices include the same n-type semiconductor layer disposed on a principal surface of the substrate.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: June 14, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ryuji Masuyama, Yoshihiro Yoneda, Hideki Yagi, Naoko Konishi
  • Patent number: 9337671
    Abstract: A protective element including a substrate having a first insulating member and a concave portion formed thereon, a heating body layered on the concave portion of the substrate, a second insulating member layered on the substrate so as to cover at least covering the heating body, first and second electrodes layered on a surface of the substrate on which the second insulating member is layered, a heating body electrode layered on the second insulating member so as to be superimposed with the heating body, and electrically connected to a current path between the first and the second electrodes as well as onto and the heating body, and a low-melting point metal layered from the heating body electrode toward the first and the second electrodes configured to cause a blowout of the current path between the first and the second electrodes by heating.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: May 10, 2016
    Assignee: Dexerials Corporation
    Inventors: Chisato Komori, Yuji Furuuchi, Yoshihiro Yoneda, Koichi Mukai, Koji Ejima, Takashi Fujihata, Kazutaka Furuta, Toshiaki Araki
  • Patent number: 9280004
    Abstract: A method for manufacturing a semiconductor modulator includes the steps of preparing a substrate having a main surface including first and second areas; forming a stacked semiconductor layer on the main surface; forming an optical waveguide mesa by etching the stacked semiconductor layer using a mask, the optical waveguide mesa including an optical modulation portion; applying a resin on a top surface and a side surface of the optical waveguide mesa and on the substrate; forming a first opening in the resin on the second area of the substrate; forming an underlayer structure on the second area of the substrate in contact with the substrate; and forming a pad electrode on the underlayer structure in contact with the underlayer structure through the first opening of the resin. The underlayer structure includes an insulating layer made of a dielectric material.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 8, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideki Yagi, Takamitsu Kitamura, Hirohiko Kobayashi, Yoshihiro Yoneda
  • Patent number: 9276162
    Abstract: In order to improve reliability by preventing an edge breakdown in a semiconductor photodetector having a mesa structure such as a mesa APD, the semiconductor photodetector comprises a mesa structure formed on a first semiconductor layer of the first conduction type formed on a semiconductor substrate, the mesa structure including a light absorbing layer for absorbing light, an electric field buffer layer for dropping an electric field intensity, an avalanche multiplication layer for causing avalanche multiplication to occur, and a second semiconductor layer of the second conduction type, wherein the thickness of the avalanche multiplication layer at the portion in the vicinity of the side face of the mesa structure is made thinner than the thickness at the central portion of the mesa structure.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: March 1, 2016
    Assignees: FUJITSU LIMITED, SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Nami Yasuoka, Haruhiko Kuwatsuka, Toru Uchida, Yoshihiro Yoneda
  • Publication number: 20160013001
    Abstract: A fuse element capable of surface-mounting and capable of increased ratings while maintaining high-speed blowout property; and a fuse device using the same. A fuse element blown by self-generated heat caused when a rate-exceeding current flows therethrough constitutes a current path of a fuse device and has a low melting point metal layer and a high melting point metal layer laminated onto the low melting point metal layer; when the current flows therethrough, the low melting point metal layer erodes the high melting point metal layer and blowout occurs.
    Type: Application
    Filed: March 27, 2014
    Publication date: January 14, 2016
    Applicant: DEXERIALS CORPORATION
    Inventors: Yoshihiro YONEDA, Chisato KOMORI, Kazutaka FURUTA, Yasushi UTSUNOMIYA
  • Publication number: 20160005562
    Abstract: A bypass avoiding only abnormal cells or abnormal electronic components in an electronic appliance having a plurality of battery cells or electronic components is formed to decrease resistance while keeping functionality. An insulating substrate 2; a heat-generating resistor 3 arranged on the insulating substrate 2; a first and a second electrodes 4, 5 arranged adjacently to each other on the insulating substrate 2; a third electrode 6 arranged adjacently to the first electrode 4 and electrically connected to the heat-generating resistor; and a first meltable conductor 8 arranged between the first and third electrodes 4, 6 to constitute a current path capable of being blown by a heat generated by the heat-generating resistor 3 are provided. The first meltable conductor 8 melted by heat from the heat-generating resistor 3 gathers on the first and second electrodes 4, 5 to short-circuit them.
    Type: Application
    Filed: August 5, 2015
    Publication date: January 7, 2016
    Inventor: Yoshihiro YONEDA
  • Patent number: 9223088
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of forming a semiconductor mesa by etching a stacked semiconductor layer, the semiconductor mesa being defined by two grooves, one on each side of the semiconductor mesa; forming a first insulating film on a side surface and a top surface of the semiconductor mesa; forming a resin film on the first insulating film, the resin film filling the grooves; etching the resin film on the semiconductor mesa to form a first opening in the resin film, the first insulating film being exposed through the first opening; etching the first insulating film exposed through the first opening to expose the top surface of the semiconductor mesa; depositing an ohmic metal on the top surface of the semiconductor mesa; and depositing a second insulating film on the ohmic metal and a surface of the resin film.
    Type: Grant
    Filed: May 1, 2014
    Date of Patent: December 29, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hirohiko Kobayashi, Yoshihiro Yoneda, Hideki Yagi
  • Publication number: 20150340182
    Abstract: A bypass avoiding only abnormal cells or abnormal electronic components in an electronic appliance having a plurality of battery cells or electronic components is formed to decrease resistance while keeping functionality.
    Type: Application
    Filed: August 5, 2015
    Publication date: November 26, 2015
    Inventor: Yoshihiro YONEDA