Patents by Inventor Yoshihiro Yoshida

Yoshihiro Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4536716
    Abstract: A stereo amplifier circuit which comprises a first circuit responsive to a first input signal and to a second input signal for generating a first output signal which corresponds to the potential difference between the first and second input signals, a second circuit responsive to the first and second input signals for generating a second output signal which corresponds to the potential difference between the second and first input signals, a third circuit responsive to the first and second input signals for generating a third output signal which corresponds to the sum of the first and second input signals. The third output signal contains signal components being antiphasic to the first and second input signals.
    Type: Grant
    Filed: December 12, 1983
    Date of Patent: August 20, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yoshihiro Yoshida, Hidehiko Aoki
  • Patent number: 4485312
    Abstract: A differential pair of first and second transistors for voltage comparison is provided, and a bias circuit for setting a reference voltage is connected to the base of the second transistor. A differential pair of third and fourth transistors is provided for reference voltage switching. The third and fourth transistors have their bases connected to the collectors of the first and second transistors and their collectors connected to the bias circuit in a positive feedback relation with respect to the base of the first transistor.
    Type: Grant
    Filed: June 11, 1982
    Date of Patent: November 27, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hiromi Kusakabe, Yoshihiro Yoshida
  • Patent number: 4462005
    Abstract: A current mirror circuit in which error between input current and output current is small and which can operate with low voltage. First and second current mirror transistors of a first conductivity type have their emitters each connected to a power supply, their bases connected together and their collectors connected to an input terminal and an output terminal respectively. A current amplification factor compensating third transistor of the first conductivity type is provided which has its emitter connected to the bases of the first and second transistors and its collector connected to a reference potential point. A fourth transistor of a second conductivity type is provided for level shifting. This transistor has its collector connected to the emitters of the first and second transistors, its emitter connected to the base of the third transistor and its base connected to the collector of the first transistor. A current source is connected between the third transistor and the reference potential point.
    Type: Grant
    Filed: June 11, 1982
    Date of Patent: July 24, 1984
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Hiromi Kusakabe, Yoshihiro Yoshida
  • Patent number: 4357579
    Abstract: A power amplifier is supplied a DC power source voltage to its power-amplifying circuit from a switching regulator type DC power source. A driver circuit is supplied its DC power source voltage from a non-switching regulator type DC power source like a battery or a series regulator type DC power source, and the DC power source voltage for the driver circuit is limited to a level below the DC power source voltage for the power amplifying circuit to reduce or eliminate spurious emissions based on ripple voltage components on the signal supplied by the DC power source voltage.
    Type: Grant
    Filed: October 8, 1980
    Date of Patent: November 2, 1982
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Shuichi Kato, Hiromi Kusakabe, Hiroyasu Yamaguchi, Yoshihiro Yoshida