Patents by Inventor Yoshikazu Kojima
Yoshikazu Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6747319Abstract: A semiconductor device including multiple high-voltage drive transistors in its output section is improved in electrostatic withstand voltage by connecting electrostatic protection transistors in parallel with the high-voltage drive transistors connected to the output pads. The drain withstand voltage of the electrostatic protection transistors is made lower than the drain withstand voltage of the high-voltage drive transistors. In addition, the channel length of electrostatic protection transistors is made short to enable efficient bipolar operation of the electrostatic protection transistors.Type: GrantFiled: March 9, 2001Date of Patent: June 8, 2004Assignee: Seiko Instruments Inc.Inventors: Yoshikazu Kojima, Kazutoshi Ishii, Masaaki Kamiya, Yasuhiro Moya
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Patent number: 6498376Abstract: A MISFET is provided with a segmented channel comprising regions in which the channel is inverted by a first gate voltage and regions in which the channel is inverted by a second gate voltage. The MISFET is formed in a semiconductor substrate having a first conductivity type and the first inversion region of the channel has a first impurity concentration determined by the surface concentration of the substrate. The second inversion region of the channel has a second impurity concentration determined by doping an impurity to the region selected by a photolithographic process. The first and second inversion regions may be divided into a plurality of plane shapes and the threshold voltage of the MISFET is set to a desired value in accordance with the plane area ratio of the first and second inversion regions.Type: GrantFiled: June 2, 1995Date of Patent: December 24, 2002Assignee: Seiko Instruments INCInventors: Masanori Miyagi, Haruo Konishi, Kazuaki Kubo, Yoshikazu Kojima, Toru Shimizu, Yutaka Saitoh, Toru Machida, Tetsuya Kaneko
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Patent number: 6492692Abstract: To decrease the area of a chip, improve the manufacturing efficiency and decrease the cost in a semiconductor device such as a driver integrated circuit having a number of output pads, and an electronic circuit device such as electronic clock. There are disposed output pads superposed in two dimensions on driving transistors or logic circuits connected thereto, respectively. Further, not only aluminum interconnection but also bump electrodes or barrier metals are used for the interconnection of the semiconductor device. In a case where a semiconductor integrated circuit is electrically adhered on to a printed circuit board in a face down manner, a solder bump disposed on the semiconductor integrated circuit and the interconnection of the printed circuit board are directly connected to each other, thereby realizing the electrical connection. On this occasion, the bump electrode as the external connecting terminal of the semiconductor integrated circuit is laminated on the transistor.Type: GrantFiled: September 28, 1999Date of Patent: December 10, 2002Assignee: Seiko Instruments Inc.Inventors: Kazutoshi Ishii, Naoto Inoue, Koushi Maemura, Shoji Nakanishi, Yoshikazu Kojima, Kiyoaki Kadoi, Takao Akiba, Yasuhiro Moya, Kentaro Kuhara
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Patent number: 6468825Abstract: A method for producing a semiconductor temperature sensor comprises the steps of forming PNP bipolar transistors and PMOS transistors so that a base region of each of the PNP bipolar transistors and a corresponding N-well region of each of the PMOS transistors are formed at the same time, and connecting the PNP bipolar transistors in a Darlington connection.Type: GrantFiled: February 11, 2000Date of Patent: October 22, 2002Assignee: Seiko Instruments Inc.Inventors: Satoshi Machida, Yukito Kawahara, Kentaro Kuhara, Toru Shimizu, Yoshikazu Kojima
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Patent number: 6320242Abstract: In a semiconductor integrated circuit device having laser-trimmable fuses and a trimming position pattern, in order to increase trimming accuracy and reduce the size of the positioning pattern, the fuses and the positioning pattern are formed using the same thin film. The trimming positioning pattern has an abrupt boundary between a high light reflectivity region and a low reflectivity region so that light reflectivity varies abruptly. To further reduce size, the trimming positioning pattern can be formed in pad areas of a integrated circuit chip or placed at intersections between scribe lines in a wafer.Type: GrantFiled: October 21, 1998Date of Patent: November 20, 2001Assignee: Seiko Instruments Inc.Inventors: Hiroaki Takasu, Noritoshi Ando, Yoshikazu Kojima, Kazunari Sugiura, Michiaki Yazawaw
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Patent number: 6306709Abstract: In a MISFET, areas where a channel surface of a channel region is inverted by a first gate voltage and areas where the channel surface is inverted by a second gate voltage are provided in the channel region of the MISFET in plane as components thereof. The channel region 104 having a first impurity concentration determined by a surface concentration of a P-type semiconductor substrate and a channel region 105 having a second impurity concentration determined by doping an impurity to the region selected by a pattern 106 of a mask for doping impurity by ion implantation and others are provided in a channel region of an N-type MOSFET on the P-type semiconductor substrate. The channel region 104 having the first impurity concentration and the channel region 105 having the second impurity concentration are divided into a plurality of plane shapes.Type: GrantFiled: March 16, 1999Date of Patent: October 23, 2001Assignee: Seiko Instruments Inc.Inventors: Masanori Miyagi, Haruo Konishi, Kazuaki Kubo, Yoshikazu Kojima, Toru Shimizu, Yutaka Saitoh, Toru Machida, Tetsuya Kaneko
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Patent number: 6285047Abstract: A linear image sensor IC comprising a plurality of switching circuits each connected to a plurality of light receiving elements in series; scanning circuits for sequentially switching said switching circuits; and driving circuits for operating said scanning circuits, wherein a LOCOS isolation layer is formed between an edge in the main scanning direction of the linear image sensor IC which is closest to an array of the light receiving elements and a light receiving portion of the light receiving element. The inventive image sensor IC is mounted by devising so that the circuit can be put into a thin and long pattern in the scanning direction, so that the chip having a width thinner than a thickness thereof which had been beyond expectation by the prior art can be realized. The use of this very thin IC allows a compact IC assembling substrate having less fluctuation among ICs to be manufactured at low cost.Type: GrantFiled: March 20, 1996Date of Patent: September 4, 2001Assignee: Seiko Instruments, Inc.Inventors: Satoshi Machida, Yukito Kawahara, Masahiro Yokomichi, Yoshikazu Kojima, Noritoshi Ando
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Publication number: 20010009288Abstract: A semiconductor device including multiple high-voltage drive transistors in its output section is improved in electrostatic withstand voltage by connecting electrostatic protection transistors in parallel with the high-voltage drive transistors connected to the output pads. The drain withstand voltage of the electrostatic protection transistors is made lower than the drain withstand voltage of the high-voltage drive transistors. In addition, the channel length of electrostatic protection transistors is made short to enable efficient bipolar operation of the electrostatic protection transistors.Type: ApplicationFiled: March 9, 2001Publication date: July 26, 2001Applicant: Seiko Instruments Inc.Inventors: Yoshikazu Kojima, Kazutoshi Ishii, Masaaki Kamiya, Yasuhiro Moya
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Patent number: 6242890Abstract: A charge/discharge control circuit is provided for an electric power source apparatus in which a service life is prolonged. A voltage dividing circuit, an overcharge voltage detection circuit, an overdischarge voltage detection circuit and a control circuit are connected in parallel to a secondary cell which is an electric power source, wherein the control circuit detects a condition of the secondary cell from the overcharge/overdischarge voltage detection circuits and outputs a signal Vs for controlling a power supply to an external equipment and a charge by an external power source and controls a switching element provided in series with the voltage dividing circuit and reduces a current which flows through the voltage dividing circuit.Type: GrantFiled: April 20, 2000Date of Patent: June 5, 2001Assignee: Seiko Instruments Inc.Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
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Patent number: 6222235Abstract: A semiconductor device including multiple high-voltage drive transistors in its output section is improved in electrostatic withstand voltage by connecting electrostatic protection transistors in parallel with the high-voltage drive transistors connected to the output pads. The drain withstand voltage of the electrostatic protection transistors is made lower than the drain withstand voltage of the high-voltage drive transistors. In addition, the channel length of electrostatic protection transistors is made short to enable efficient bipolar operation of the electrostatic protection transistors.Type: GrantFiled: July 10, 1996Date of Patent: April 24, 2001Assignee: Seiko Instruments Inc.Inventors: Yoshikazu Kojima, Kazutoshi Ishii, Masaaki Kamiya, Yasuhiro Moya
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Patent number: 6191476Abstract: To provide a semiconductor substrate and a light-valve semiconductor substrate capable of preventing the threshold value of a MOS transistor on a single-crystal silicon device forming layer from increasing and forming a MOS integrated circuit with a high reliability even for a long-time operation. A semiconductor substrate and a light-valve semiconductor substrate comprising a single-crystal silicon thin-film device forming layer 5001 formed above an insulating substrate 5004 through an adhesive layer 5003 and an insulating layer 5002 formed on the single-crystal silicon thin-film device forming layer, wherein a heat conductive layers 5201 and 5202 made of a material with a high heat conductivity are arranged between the single-crystal silicon thin-film device forming layer and the adhesive layer and on the insulating layer.Type: GrantFiled: May 20, 1997Date of Patent: February 20, 2001Assignee: Seiko Instruments Inc.Inventors: Kunihiro Takahashi, Mizuaki Suzuki, Tsuneo Yamazaki, Hiroaki Takasu, Kunio Nakajima, Atsushi Sakurai, Tadao Iwaki, Yoshikazu Kojima, Masaaki Kamiya
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Patent number: 6187605Abstract: A semiconductor substrate is utilized to integrally form a drive circuit and a pixel array to produce a transparent semiconductor device for a light valve. The semiconductor device for a light valve is constructed of a semiconductor substrate composed of a bulk single crystal silicon having an opaque thick portion and a thin transparent portion. A pixel array is formed in the transparent portion. A drive circuit is formed in a top face of the opaque portion. A transparent support substrate is laminated to the top face of the semiconductor substrate for reinforcement. A bulk portion of the semiconductor substrate is removed from a back face thereof by selective etching to provide the transparent portion.Type: GrantFiled: September 19, 1994Date of Patent: February 13, 2001Assignee: Seiko Instruments Inc.Inventors: Hiroaki Takasu, Yoshikazu Kojima, Kunihiro Takahashi, Tsuneo Yamazaki, Tadao Iwaki
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Patent number: 6188293Abstract: An low-power consumption integrated ring oscillator capable of stable operation throughout a wide voltage range without undergoing a large frequency change includes a first constant voltage generating circuit having an enhancement mode P-MOS transistor and a depletion mode N-MOS transistor and a second constant voltage generating circuit having a depletion mode N-MOS transistor and an enhancement mode N-MOS transistor. A first constant voltage generated by the first constant voltage circuit is applied to a gate electrode of a P-MOS transistor of transmission gates connected between respective cascaded inverters of the ring oscillator. A second constant voltage generated by the second constant voltage generating circuit is connected to the gate electrode of an N-MOS transistor of the transmission gates. By this construction, current consumption is reduced and battery lifetime can be increased. The boosting circuit for writing and erasing an EEPROM circuit may be formed with the low power ring oscillator.Type: GrantFiled: September 16, 1996Date of Patent: February 13, 2001Assignee: Seiko Instruments Inc.Inventors: Masanori Miyagi, Yoshikazu Kojima
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Patent number: 6181108Abstract: A charge/discharge control circuit is provided for an electric power source apparatus in which a service life is prolonged. A voltage dividing circuit, an overcharge voltage detection circuit, an overdischarge voltage detection circuit and a control circuit are connected in parallel to a secondary cell which is an electric power source, wherein the control circuit detects a condition of the secondary cell from the overcharge/overdischarge voltage detection circuits and outputs a signal Vs for controlling a power supply to an external equipment and a charge by an external power source and controls a switching element provided in series with the voltage dividing circuit and reduces a current which flows through the voltage dividing circuit.Type: GrantFiled: November 20, 1998Date of Patent: January 30, 2001Assignee: Seiko Instruments Inc.Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
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Patent number: 6127808Abstract: A charge/discharge control circuit is provided for an electric power source apparatus in which a service life is prolonged. A voltage dividing circuit, an overcharge voltage detection circuit, an overdischarge voltage detection circuit and a control circuit are connected in parallel to a secondary cell which is an electric power source, wherein the control circuit detects a condition of the secondary cell from the overcharge/overdischarge voltage detection circuits and outputs a signal Vs for controlling a power supply to an external equipment and a charge by an external power source and controls a switching element provided in series with the voltage dividing circuit and reduces a current which flows through the voltage dividing circuit.Type: GrantFiled: November 20, 1998Date of Patent: October 3, 2000Assignee: Seiko Instruments Inc.Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
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Patent number: 6107163Abstract: In a method of manufacturing a semiconductor chip, a wire is traveled in one way to cut a wafer into a plurality of chips while a wire train where wires are arranged by pitches of scribe lines is brought into contact with the scribe lines of the wafer linearly, and an abrasive solution is supplied to a contact portion thereof.Type: GrantFiled: May 20, 1998Date of Patent: August 22, 2000Assignee: Seiko Instruments Inc.Inventors: Yoshikazu Kojima, Masaaki Kamiya
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Patent number: 6097177Abstract: A charge/discharge control circuit for controlling the charging and discharging of a secondary cell has a voltage dividing circuit for dividing an output voltage of the secondary cell, which may comprise plural cells, an overcharge detection circuit for detecting an overcharge state of the secondary cell, an overdischarge detection circuit for detecting an overdischarge state of the secondary cell, and a control circuit for receiving and processing an output signal of the overcharge detecting circuit and the overdischarge detecting circuit and controlling the switch. In a preferred embodiment, an overcharge reference voltage source used for the overcharge voltage detection circuit is used also as an overdischarge reference voltage source for the overdischarge voltage detection circuit.Type: GrantFiled: November 20, 1998Date of Patent: August 1, 2000Assignee: Seiko Instruments Inc.Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
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Patent number: 6087807Abstract: A charge/discharge control circuit is provided for an electric power source apparatus in which a service life is prolonged. A voltage dividing circuit, an overcharge voltage detection circuit, an overdischarge voltage detection circuit and a control circuit are connected in parallel to a secondary cell which is an electric power source, wherein the control circuit detects a condition of the secondary cell from the overcharge/overdischarge voltage detection circuits and outputs a signal Vs for controlling a power supply to an external equipment and a charge by an external power source and controls a switching element provided in series with the voltage dividing circuit and reduces a current which flows through the voltage dividing circuit.Type: GrantFiled: June 9, 1998Date of Patent: July 11, 2000Assignee: Seiko Instruments Inc.Inventors: Minoru Sudo, Takayuki Takashina, Yoshikazu Kojima, Sadashi Shimoda, Hiroshi Mukainakano
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Patent number: 6067062Abstract: A light valve has a composite substrate comprised of an electrically insulating substrate and a semiconductor single crystal thin film formed over the electrically insulating substrate. A pixel array comprising semiconductor switch elements is formed in the semiconductor single crystal thin film. A peripheral circuit having circuit elements is formed in the semiconductor single crystal thin film so that a small-sized, high speed light valve is obtained. X- driver and Y-driver circuits are formed in the semiconductor single crystal thin film and controlled by a control circuit, such as a video signal processing circuit, which receives and processes video signals inputted directly from an external source. The peripheral circuit can be a DRAM sense amplifier for sensing charges stored in each pixel of the pixel array to detect defects in the pixel array.Type: GrantFiled: August 23, 1991Date of Patent: May 23, 2000Assignee: Seiko Instruments Inc.Inventors: Hiroaki Takasu, Yoshikazu Kojima, Masaaki Kamiya, Tsuneo Yamazaki, Hiroshi Suzuki, Masaaki Taguchi, Ryuichi Takano, Satoru Yabe
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Patent number: RE36836Abstract: The invention provides a semi-conductor light valve device and a process for fabricating the same. The device comprises a composite substrate having a supporte substrate, a light-shielding thin film formed on said supporte substrate and semiconductive thin film disposed on the light-shielding thin film with interposing an insulating thin film. A switching element made of a transistor and a transparent electrode for driving light valve are formed on the semiconductive thin film, and the switching element and the transparent electrode are connected electrically with each other. The transistor includes a channel region in the semiconductive thin film and a main gate electrode for controlling the conduction in the channel region, and the light-shielding thin film layer is so formed as to cover the channel region on the side opposite to said channel region, so as to prevent effectively a back channel and shut off the incident light.Type: GrantFiled: August 2, 1995Date of Patent: August 29, 2000Assignees: Agency of Industrial Science and Technology, Seiko Instruments Inc.Inventors: Yutaka Hayashi, Masaaki Kamiya, Yoshikazu Kojima, Hiroaki Takasu