Patents by Inventor Yoshinori Imamura

Yoshinori Imamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5523593
    Abstract: By forming an isolated semiconductor layer or electrode layer on a semiconductor surface between neighboring field effect transistors and element separating trenches which are deep enough to reach at least the semi-insulating substrate or the hetero junction interface on the buffer layer, low frequency oscillation of a compound semiconductor integrated circuit can be reduced. By controlling the thickness of the buffer layer having a hetero junction to at most 150 nm, the low frequency oscillation can be reduced. By forming materials separating adjacent elements with a width of at most 2 .mu.m which reach from the element region surface to the buffer layer having hetero junction so as to enclose the element regions and etched regions in the neighborhood of the elements or so as to enclose the element regions in the etched regions and by controlling the angle of the sides of the etched regions against the semiconductor layer surface to 10.degree. to 60.degree., wires can be prevented from short-circuiting.
    Type: Grant
    Filed: March 25, 1993
    Date of Patent: June 4, 1996
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corporation
    Inventors: Osamu Kagaya, Hiroyuki Takazawa, Yoshinori Imamura, Junji Shigeta, Yukihiro Kawata, Hiroto Oda
  • Patent number: 5381027
    Abstract: This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by intoduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance.
    Type: Grant
    Filed: October 12, 1993
    Date of Patent: January 10, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Usagawa, Kenji Hiruma, Masahiko Kawata, Shigeo Goto, Katsuhiko Mitani, Masao Yamane, Susumu Takahashi, Tomonori Tanoue, Yoshinori Imamura
  • Patent number: 5373191
    Abstract: Source and drain electrode metals of a field effect transistor having a recessed gate electrode metal are directly connected to a high impurity concentration semiconductor layer which faces the gate electrode metal through an insulator film which defines the side wall of the recess. The source and drain electrode metals may be disposed so as to face the gate electrode metal through the side insulator film. With this arrangement, it is possible to lower the parasitic resistance between the gate electrode and another electrode of the field effect transistor, to lower the contact resistance between a semiconductor layer and the source and drain electrodes, to reduce the capacitance of the recess gate electrode and to increase the source-gate breakdown voltage, advantageously. The above-described arrangement is particularly suitable for a transistor employing a compound semiconductor, and can also be applied to semiconductor devices other than field effect transistors.
    Type: Grant
    Filed: December 30, 1992
    Date of Patent: December 13, 1994
    Assignee: Hitachi Ltd.
    Inventors: Toshiyuki Usagawa, Yoshinori Imamura, Hidekazu Okuhira, Shigeo Goto, Masayoshi Kobayashi, Shinichiro Takatani
  • Patent number: 5258631
    Abstract: This invention discloses a heterojunction type field effect transistor such as 2DEG-FET and a heterojunction type bipolar transistor such as 2DEG-HBT. The former is fabricated by applying to the formation of its source and drain regions a technique which causes the disorder of the heterojunction by introduction of an impurity such as by ion implantation or a technique which causes the disorder of the heterojunction by forming a film made of at least one kind of material selected from insulators, metals and semiconductors which have a different linear coefficient of thermal expansion from that of the material of a semiconductor substrate on the heterojunction semiconductor region which is to be disordered. The latter is fabricated by applying either of the techniques described above to a base ohmic contact region. These semiconductor devices can reduce the source-gate resistance and the parasitic base resistance.
    Type: Grant
    Filed: May 18, 1992
    Date of Patent: November 2, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Usagawa, Kenji Hiruma, Masahiko Kawata, Shigeo Goto, Katsuhiko Mitani, Masao Yamane, Susumu Takahashi, Tomonori Tanoue, Yoshinori Imamura
  • Patent number: 5181087
    Abstract: Source and drain electrode metals of a field effect transistor having a recessed gate electrode metal are directly connected to a high impurity concentration semiconductor layer which faces the gate electrode metal through an insulator film which defines the side wall of the recess. The source and drain electrode metals may be disposed so as to face the gate electrode metal through the side insulator film. With this arrangement, it is possible to lower the parasitic resistance between the gate electrode and another electrode of the field effect transistor, to lower the contact resistance between a semiconductor layer and the source and drain electrodes, to reduce the capacitance of the recess gate electrode and to increase the source-gate breakdown voltage, advantageously. The above-described arrangement is particularly suitable for a transistor employing a compound semiconductor, and can also be applied to semiconductor devices other than field effect transistors.
    Type: Grant
    Filed: April 19, 1989
    Date of Patent: January 19, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Usagawa, Yoshinori Imamura, Hidekazu Okuhira, Shigeo Goto, Masayoshi Kobayashi, Shinichiro Takatani
  • Patent number: 4902635
    Abstract: This invention is related to the method for production of semiconductor devices suitable for increasing the integration density of semiconductor integrated circuits, especially GaAs semiconductor IC devices.This invention uses no third wiring metal, contact hole or through hole for connection between the Schottky junction and ohmic electrodes formed on the GaAs semiconductor substrate required in the conventional technology, but provides the method for direct connection between the two electrodes stated above by means of vapor deposition, ion implantation, sputtering, CVD, plasma CVD, dry etching and wet etching.Since the application of this invention enables the two electrodes stated above to be directly connected with high yield, the element area at the connecting portion can be reduced to less than half as compared with the same required in the conventional method, the total element area can be reduced greatly.
    Type: Grant
    Filed: March 31, 1988
    Date of Patent: February 20, 1990
    Assignee: The Agency of Industrial Science and Technology
    Inventors: Yoshinori Imamura, Masaru Miyazaki, Akihisa Terano, Nobutoshi Matsunaga, Hiroshi Yanazawa
  • Patent number: 4782860
    Abstract: A magnet for control valve includes a housing having an inlet and an outlet for a pressurized fluid, a valve seat member having a conical inner surface valve seat, a spherical valve body adapted to be in line contact with the valve seat, a throttle adjusting plate made of a magnetic material shiftable toward and away from the valve seat, and an electromagnet for attracting and releasing the throttle adjusting plate to shift the valve body toward and away from the valve seat. According to the invention a sheet, preferably made of urethane foam is arranged on a side of the throttle adjusting plate opposite to the valve body, thereby eliminating noise caused by self-oscillation of the valve body and throttle adjusting plate, while maintaining high responsibility as a magnetic control valve.
    Type: Grant
    Filed: September 23, 1987
    Date of Patent: November 8, 1988
    Assignee: Bridgestion Corporation
    Inventors: Yuji Sakaguchi, Takeo Takagi, Yoshinori Imamura
  • Patent number: 4771983
    Abstract: A magnet for control valve includes a housing having an inlet and an outlet for a pressurized fluid, a valve seat member having a conical inner surface valve seat, a spherical valve body adapted to be in line contact with the valve seat, a throttle adjusting plate made of a magnetic material shiftable toward and away from the valve seat, and an electromagnet for attracting and releasing the throttle adjusting plate to shift the valve body toward and away from the valve seat. According to the invention, a sheet, preferably made of urethane foam is arranged on a side of the throttle adjusting plate opposite to the valve body, thereby eliminating noise caused by self-oscillation of the valve body and throttle adjusting plate, while maintaining high responsibility as a magnet control valve.
    Type: Grant
    Filed: March 10, 1987
    Date of Patent: September 20, 1988
    Assignee: Bridgestone Corporation
    Inventors: Yuji Sakaguchi, Takeo Takagi, Yoshinori Imamura
  • Patent number: 4664232
    Abstract: A brake device for use in an arm of a robot or manipulator cmprises a brake drum, a lever pivotally supported at its intermediate portion, a brake shoe provided on the lever between its pivotally supported point and its one end, a pneumatic actuator axially contractible upon applying internal pressure thereinto and having a movable end connected to the one end or the other end of the lever, and a spring connected to one end of the lever not connected to the actuator so as to operate to elongate the actuator. This brake device is remarkably small-sized and of light-weight and consumes only small amount of fluid pressure to contribute economy of energy in comparison with prior art brake devices.
    Type: Grant
    Filed: February 27, 1985
    Date of Patent: May 12, 1987
    Assignee: Bridgestone Corporation
    Inventors: Takeo Takagi, Yuji Sakaguchi, Yoshinori Imamura
  • Patent number: 4636682
    Abstract: A high velocity electron beam scanning negatively charge biased image pickup tube has a target which includes at least a transparent conductive layer, a photoconductor layer and a layer for secondary electron emission on a light-transmissive insulating substrate, and in which the transparent conductive layer is arranged on a light incidence side, the photoconductor layer being made of amorphous silicon.
    Type: Grant
    Filed: May 5, 1983
    Date of Patent: January 13, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Chushirou Kusano, Sachio Ishioka, Yoshinori Imamura, Yukio Takasaki, Hirofumi Ogawa, Tatsuo Makishima, Tadaaki Hirai
  • Patent number: 4626885
    Abstract: A photosensor including a transparent electrode for transmitting incident light and a photoconductive layer receiving light from the transparent electrode for performing photoelectric conversion, is disclosed in which the photoconductive layer is made of amorphous silicon, the amorphous silicon contains 5 to 30 atomic percent hydrogen and is doped with at least one selected from elements belonging to the groups II and III in such a manner that a region remote from the transparent electrode is higher in the concentration of the selected element than another region proximate to the transparent electrode, and a voltage is applied across the photoconductive layer so that a surface of the photoconductive layer facing the transparent electrode is at a positive potential with respect to another surface of the photoconductive layer opposite to the surface facing the transparent electrode.
    Type: Grant
    Filed: July 29, 1983
    Date of Patent: December 2, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Sachio Ishioka, Yoshinori Imamura, Tsuyoshi Uda, Yukio Takasaki, Chushirou Kusano, Hirofumi Ogawa, Tatsuo Makishima, Tadaaki Hirai
  • Patent number: 4609846
    Abstract: An image pick-up tube has a photoelectric conversion target including a transparent substrate, and a transparent electrode and a photoconductive layer formed on the transparent substrate. An electron beam is scanned on the photoelectric conversion target. A first electrode is formed on a beam scanning surface of the photoconductive layer so as to be segmented in stripe or grid with its electrode segments electrically connected to each other. A second electrode is formed on the first electrode through an insulating layer with its electrode segments electrically connected to each other. An insulating layer may be interposed between the first electrode and the photoconductive layer.
    Type: Grant
    Filed: September 20, 1984
    Date of Patent: September 2, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Chushirou Kusano, Sachio Ishioka, Yasuharu Shimomoto, Yoshinori Imamura, Hirofumi Ogawa
  • Patent number: 4564784
    Abstract: An image pickup tube comprising a target composed of a light-transmissible plate, a transparent electrode provided on said light-transmissible plate and a photoconductor made of hydrogen-containing amorphous silicon provided on said transparent electrode; an electron beam generator; and a mesh electrode near the aforesaid target, at least the surface of said mesh electrode being made of at least one member selected from the group consisting of Be, B, C, Mg, Al and Si, has high resolution with greatly improved life characteristics.
    Type: Grant
    Filed: November 16, 1983
    Date of Patent: January 14, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Sachio Ishioka, Yoshinori Imamura, Tadaaki Hirai, Saburo Nobutoki, Akio Maruyama
  • Patent number: 4556817
    Abstract: An image pickup tube of high velocity electron beam scanning and negatively charging system having a target including, on a transparent substrate, at least a transparent conductive film, a photoconductive layer, a layer for emitting secondary electrons, and stripe electrodes. The transparent substrate may be made of amorphous silicon.
    Type: Grant
    Filed: November 2, 1983
    Date of Patent: December 3, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Chushirou Kusano, Sachio Ishioka, Yoshinori Imamura, Yukio Takasaki, Hirofumi Ogawa, Tatsuo Makishima, Tadaaki Hirai, Eiichi Maruyama
  • Patent number: 4556816
    Abstract: Disclosed is a photoelectric device having at least a signal electrode, and an amorphous photoconductor layer whose principal constituent is silicon and which contains hydrogen as an indispensable constituent element, the amorphous photoconductor layer being disposed in adjacency to the signal electrode, characterized by comprising a thin layer interposed between the signal electrode and the amorphous photoconductor layer, the thin layer being made of an inorganic material whose principal constituent is at least one compound selected from the group consisting of oxides of at least one element selected from the group that consists of Si, Ti, Al, Mg, Ba, Ta, Bi, V, Ni, Th, Fe, La, Be, Sc and Co, nitrides of at least one element selected from the group that consists of Ga, Si, Mg, Te, Hf, Zr, Nb and B, and halides of at least one element selected from the group that consists of Na, Mg, Li, Ba, Ca and K.
    Type: Grant
    Filed: July 5, 1983
    Date of Patent: December 3, 1985
    Assignee: Hitachi, Ltd.
    Inventors: Yoshinori Imamura, Saburo Ataka, Yukio Takasaki, Yasuo Tanaka, Tadaaki Hirai, Eiichi Maruyama
  • Patent number: 4419604
    Abstract: Disclosed is a light sensitive screen including at least a light-transmitting conductive film and a photoconductive layer, the light-transmitting conductive film being arranged on a side of incidence of light, characterized in that the photoconductive layer is constructed of a single layer or a plurality of layers of one or more photoconductive substances, at least one of such photoconductive substance layers being formed of an amorphous silicon material which contains at least 5 atomic-% to 30 atomic-% of hydrogen, whose optical forbidden band gap is 1.65 eV to 2.25 eV and whose peak component in an infrared absorption spectrum at a wave number of 2,100 cm.sup.-1 is greater than that at a wave number of 2,000 cm.sup.-1. Various characteristics of an imaging device provided with the light sensitive screen, such as dark current, lag and after image characteristics, are improved.
    Type: Grant
    Filed: April 24, 1981
    Date of Patent: December 6, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Sachio Ishioka, Yoshinori Imamura, Yasuharu Shimomoto, Saburo Ataka, Yasuo Tanaka, Eiichi Maruyama
  • Patent number: 4405879
    Abstract: There is disclosed a photoelectric conversion device comprising a transparent substrate; a transparent conductive film formed on said substrate; a photoconductive layer formed of hydrogenated amorphous silicon as an indispensable component and deposited on said transparent conductive film; and a chalcogen glass film formed on said photoconductive layer, wherein said chalcogen glass film includes at least a chalcogen glass layer formed in an atmosphere of inert gas kept at 1.5.times.10.sup.-2 to 1.5.times.10.sup.-1 Torr. As chalcogen glass is preferably used Sb.sub.2 S.sub.3, As.sub.2 S.sub.3, As.sub.2 Se.sub.3 or Sb.sub.2 Se.sub.3. The chalcogen glass film may be a composite film consisting of plural component layers. This invention is very useful to reduce dark current in an image pickup tube and to prevent image inversion in the image pickup tube.
    Type: Grant
    Filed: March 23, 1981
    Date of Patent: September 20, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Saburo Ataka, Yoshinori Imamura, Yasuo Tanaka, Hirokazu Matsubara, Eiichi Maruyama
  • Patent number: 4380557
    Abstract: In preparing an image pickup device by using hydrogen-containing amorphous silicon for a photoconductive layer, a hydrogen-containing amorphous silicon layer is first formed and is then heat-treated at 100.degree. to 300.degree. C. The image pickup characteristics of the amorphous silicon layer are highly improved by this heat treatment. For example, the lag and dark current are reduced and the signal current-target voltage characteristic is improved. Especially excellent improving effects can be obtained when amorphous silicon characterized in that (1) the hydrogen content is 5 to 30 atomic %, (2) the optical forbidden band gap is 1.30 to 1.95 eV and (3) in the infrared absorption spectrum, the component of a wave number of 2000 cm.sup.-1 is observed larger than the component of a wave number of 2100 cm.sup.-1 is subjected to the above-mentioned heat treatment. The adhesion to the substrate is enhanced, and good image pickup characteristics can be obtained.
    Type: Grant
    Filed: July 28, 1981
    Date of Patent: April 19, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Sachio Ishioka, Yasuharu Shimomoto, Yoshinori Imamura, Saburo Ataka, Yasuo Tanaka, Hirokazu Matsubara, Yukio Takasaki, Eiichi Maruyama
  • Patent number: 4378417
    Abstract: In an electrophotographic member employing an amorphous silicon photoconductive layer, a part which is at least 10 nm thick inwardly of the amorphous silicon layer from the surface (or interface) of the amorphous silicon layer is made of amorphous silicon which has an optical forbidden band gap of at least 1.6 eV and a resistivity of at least 10.sup.10 .OMEGA..cm. The electrophotographic member exhibits a satisfactory resolution and good dark-decay characteristics. Further, a region which has an optical forbidden band gap narrower than that of the amorphous silicon forming the surface (or interface) region is disposed within the amorphous silicon layer to a thickness of at least 10 nm, whereby the sensitivity of the electrophotographic member to longer wavelengths of light can be enhanced.
    Type: Grant
    Filed: April 15, 1981
    Date of Patent: March 29, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Maruyama, Sachio Ishioka, Yoshinori Imamura, Hirokazu Matsubara, Yasuharu Shimomoto, Shinkichi Horigome, Yoshio Taniguchi
  • Patent number: RE33094
    Abstract: In an electrophotographic member employing an amorphous silicon photoconductive layer, a part which is at least 10 nm thick inwardly of the amorphous silicon layer from the surface (or interface) of the amorphous silicon layer is made of amorphous silicon which has an optical forbidden band gap of at least 1.6 eV and a resistivity of at least 10.sup.10 .OMEGA..cm. The electrophotographic member exhibits a satisfactory resolution and good dark-decay characteristics. Further, a region which has an optical forbidden band gap narrower than that of the amorphous silicon forming the surface (or interface) region is disposed within the amorphous silicon layer to a thickness of at least 10 nm, whereby the sensitivity of the electrophotographic member to longer wavelengths of light can be enhanced.
    Type: Grant
    Filed: September 11, 1986
    Date of Patent: October 17, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Eiichi Maruyama, Sachio Ishioka, Yoshinori Imamura, Hirokazu Matsubara, Yasuharu Shimomoto, Shinkichi Horigome, Yoshio Taniguchi