Abstract: A plurality of silicon regions different in impurity concentration from each other are simultaneously subjected to dry etching in such a manner that neutral particles in a plasma do not substantially participate in etching and therefore etching is performed substantially by ions. Thus, the silicon regions different in impurity concentration from each other can be etched at substantially the same etching rate, independently of impurity concentration.

Abstract: A planar heat generator comprising a linear heat generator provided with an insulating cover, a pair of insulating intermediate layers provided on opposite sides of the heat generator and heat sealed to each other via the heat generator, and a pair of outer insulating sheets provided on the outer sides of the respective intermediate layer and heat sealed to each other via the intermediate layers, the intermediate layers and outer insulating sheets being made of the same material, the insulating cover of the linear heat generator being made of a material having a slightly higher thermal deformation temperature than the intermediate layers and outer insulating sheets and flattened in a state covering the heat generator through plastic deformation caused by application of pressure and heat at the time of the heat seal.

Abstract: Well regions of p-type are disposed in a surface region of an n-type Si substrate of a semiconductor integrated circuit. The p-type well regions are arranged in the shape of islands, and various semiconductor elements are formed in the p-type well islands. The substrate surface region between the p-type well islands is filled with a depletion layer, and an interconnection layer is disposed on an insulating film over that body region contained within the depletion layer.

Abstract: A semiconductor device including at least a resistance element formed of polycrystalline silicon having a high resistivity. An electrode is provided on the high resistance polycrystalline silicon region with a silicon dioxide film and a silicon nitride film being interposed therebetween. The electrode is coupled to the ground potential. In this manner, high stability is obtained in the behavior of the resistance element inasmuch as the formation of a parasitic MOS device under said high resistance region is suppressed, and the threshold voltage of any such MOS device is made raised.

Abstract: A power converter for power conversion between an a.c. system and a d.c. system includes a full-wave bridge circuit having GTO connected in at least one arm of the full-wave bridge circuit on the positive polarity side. During a conduction-enabled period of GTO which is determined by a firing phase angle, the GTO is so controlled as to perform current chopping operation by a pulse signal of a predetermined pulse width.

Abstract: A semiconductor memory comprising a memory cell disposed on a p-type semiconductor substrate and including an insulated-gate field effect transistor and a storage capacitor. The storage capacitor comprises: an insulator capacitor including a first electrode disposed on the substrate, a film of Si.sub.3 N.sub.4 disposed on the first electrode, and a second electrode disposed on the Si.sub.3 N.sub.4 film; and a pn junction capacitor including a first n-type impurity region for constituting either the source or drain of the insulated-gate field effect transistor, and a second p-type impurity region disposed in contact with the first impurity region and having a higher impurity concentration than the substrate.

Abstract: On the surface of an insulating film formed on the surface of a semiconductor substrate on which an MOS type semiconductor device to be protected is formed, there are formed a first polycrystal silicon member having input and output terminals and a resistivity lower than 1 K.OMEGA./.quadrature. and a second polycrystalline silicon member having a resistivity lower than 1 K.OMEGA./.quadrature. and being maintained at a fixed potential. This second polycrystalline silicon member faces at least a part of the first silicon member with polycrystalline silicon of a resistivity higher than 100 K.OMEGA./.quadrature. interposed therebetween. The input terminal of the first polycrystalline silicon member is connected to an input pad of the MOS type semiconductor device to be protected and the output terminal of the first polycrystalline silicon member is connected to an input gate of the semiconductor device to be protected.

Abstract: A safety apparatus for an elevator system is disclosed in which upon detection an instantaneous power service interruption, an emergency brake is applied to the car and continues to be applied for longer than the time required for the particular car to stop.

Abstract: In a semiconductor integrated circuit having polycrystalline silicon interconnections and metal interconnections, a low resistance layer, containing impurities to a high concentration for the polycrystalline silicon interconnections, is formed in predetermined parts of an undoped polycrystalline silicon layer which is deposited on a first insulator film on a semiconductor substrate, a second insulator film is deposited on the polycrystalline silicon layer under the state under which the undoped parts are left at least around through-holes to be formed, and the metal interconnections at least parts of which run in a direction intersecting the polycrystalline silicon interconnections are provided on the second insulator film, the necessary contacts between the metal interconnections and the polycrystalline silicon interconnections being made through the through-holes provided in the second insulator film in correspondence with the intersecting parts of both the interconnections.

Abstract: In a speed feedback control system wherein a speed command signal and a speed feedback signal are compared and wherein the deviation between these signals is entered into a speed control unit, the speed signal is differentiated to apply speed damping in order to suppress the oscillations of the control system. In this case, while the speed command and the actual speed make a great difference transiently, the speed command is approximate to the sum between the speed feedback signal and the damping signal even transiently. Therefore, the speed command signal is compared with the sum between the speed feedback signal and the damping signal, and the fault of the speed control system is detected upon the fact that the deviation has exceeded a predetermined value.

Abstract: An over-speed preventing apparatus for the DC motor comprises a DC motor the speed of which is controlled by the adjustment of the armature voltage thereof, controlled-rectifier means for supplying power to the separately excited field winding of the motor, means for generating a predetermined field current command, means for detecting the field current, and a constant current control system for controlling the rectifier means in accordance with the error between the field current command and the detected value of the field current. The apparatus further comprises a unidirectional element connected in parallel to the field winding in the direction in which the field current is made to flow back, current decrease detector means inserted between the rectifier circuit and the parallel circuit including the field winding and the unidirectional element, and protecting means energized by the current decrease detector means.