Patents by Inventor Yoshio Sakai
Yoshio Sakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5258586Abstract: An elevator control system for controlling movement of cages up and down in accordance with the situation of waiting persons in landing places or passengers in the cages detected by image pickup devices and other detecting devices includes first and second image processors, the image processing level of the second image processor being not lower than that of the first image processor. The system further includes an elevator controller for controlling movement of the cages up and down, the elevator controller including a device for applying the result of image processing performed by the first image processor to the control of the cages, and a device for applying the result of image processing performed by the second image processor to the control of the cages when the image processing is carried out based on the result of image processing performed by the first image processor and other information pertaining to passengers and waiting persons detected by the other detecting devices.Type: GrantFiled: March 20, 1990Date of Patent: November 2, 1993Assignee: Hitachi, Ltd.Inventors: Masato Suzuki, Masachika Yamazaki, Hiromi Inaba, Kiyoshi Nakamura, Yoshio Sakai, Naofumi Nakata, Chikara Komatsu, Syoji Kasai, Atsuya Fujino
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Patent number: 5237528Abstract: A semiconductor memory comprises a capacitor with a data storage portion, and an insulated-gate field-effect transistor. The capacitor is formed by a plate which is made up of the side walls and base of a groove formed in a semiconductor substrate, and by a capacitor electrode formed on the side walls and the base, over an insulation film, and which is connected electrically to the source or drain of the insulated-gate field-effect transistor. Various embodiments are provided for reducing size and preventing leakage between other memory cells, including forming stacked capacitors, forming the transistor over the capacitor, using a silicon-over-insulator arrangement for the transistor, forming a common capacitor plate and providing high impurity layers within the substrate.Type: GrantFiled: January 17, 1992Date of Patent: August 17, 1993Assignee: Hitachi, Ltd.Inventors: Hideo Sunami, Tokuo Kure, Masanobu Miyao, Yoshifumi Kawamoto, Katsuhiro Shimohigashi, Yoshio Sakai, Osamu Minato, Toshiaki Masuhara, Mitsumasa Koyanagi, Shinji Shimizu
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Patent number: 5229435Abstract: A skin-protecting composition which comprises a silicone-acrylic copolymer which comprises(A) 1 to 15% by weight of a silicon-containing monomer,(B) 30 to 70% by weight of an alkyl acrylate,(C) 0 to 30% by weight of an alkyl methacrylate, and(D) 5 to 45% by weight of a mono-ethylenically unsaturated monomer having a carboxyl group,and a medium, which can effectively block irritative materials and be easily removed from a skin.Type: GrantFiled: April 2, 1990Date of Patent: July 20, 1993Assignees: Shionogi & Co., Ltd., Nissin Chemical Industry Co., Ltd.Inventors: Yoshio Sakai, Izumi Saitoh
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Patent number: 5214496Abstract: A semiconductor memory comprises a capacitor with a data storage portion, and an insulated-gate field-effect transistor. The capacitor is formed by a plate which is made up of the side walls and base of a groove formed in a semiconductor substrate, and by a capacitor electrode formed on the side walls and the base, over an insulation film, and which is connected electrically to the source or drain of the insulated-gate field-effect transistor. Various embodiments are provided for reducing size and preventing leakage between other memory cells, including forming stacked capacitors, forming the transistor over the capacitor, using a silicon-over-insulator arrangement for the transistor, forming a common capacitor plate and providing high impurity layers within the substrate.Type: GrantFiled: December 19, 1989Date of Patent: May 25, 1993Assignee: Hitachi, Ltd.Inventors: Hideo Sunami, Tokuo Kure, Masanobu Miyao, Yoshifumi Kawamoto, Katsuhiro Shimohigashi, Yoshio Sakai, Osamu Minato, Toshiaki Masuhara, Mitsumasa Koyanagi, Shinji Shimizu
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Patent number: 5194749Abstract: In a memory cell of SRAM of CMOS type, load MISFET having a polycrystalline silicon film as area of source, drain and channel is stacked on drive MISFET, and gate electrodes of the drive MISFET and the load MISFET are constituted by conductive films in different layers. Area of source and drain provided on the polycrystalline silicon film has an overlapped area with the gate electrode of the load MISFET.Type: GrantFiled: February 19, 1992Date of Patent: March 16, 1993Assignee: Hitachi, Ltd.Inventors: Satoshi Meguro, Kiyofumi Uchibori, Norio Suzuki, Makoto Motoyoshi, Atsuyoshi Koike, Toshiaki Yamanaka, Yoshio Sakai, Toru Kaga, Naotaka Hashimoto, Takashi Hashimoto, Shigeru Honjou, Osamu Minato
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Patent number: 5187870Abstract: A gyro compass according to the present invention includes an inclinometer for detecting inclination of the spin axis of a rotor with respect to the earth's surface, a horizontal axis torque applying device for exerting a torque about the horizontal axis of the rotor, a vertical axis torque applying device for exerting a torque about the vertical axis of the rotor, and an equilibrium tilt angle storing device for storing an inclination angle of the rotor while the gyro compass is in the equilibrium state. An inclination adjustment controlling device for adjusting an inclination angle stored of the rotor to the inclination angle in the equilibrium state by controlling the vertical axis torque applying device.Type: GrantFiled: June 26, 1992Date of Patent: February 23, 1993Assignee: Furuno Electric Company, LimitedInventors: Atsushi Abe, Yoshio Sakai
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Patent number: 5182776Abstract: An image of an elevator hall or an inside of elevator car is acquired by photographing apparatus, and the number of waiting passenger is detected by comparing the above-mentioned image with a background image when no passenger is present at the elevator hall. Second image processing apparatus with high precision is prepared by the same image information as that of first image processing apparatus, teacher information derived therefrom is compared with an output from the first image processing apparatus. If the teacher information is not coincident with the output from the first image processing means, parameters required for performing the image process by the first image processing appartus, for instance, constants, threshold values and weight coefficients employed in an image processing algorithm are adjusted.Type: GrantFiled: March 4, 1991Date of Patent: January 26, 1993Assignee: Hitachi, Ltd.Inventors: Masato Suzuki, Hiromi Inaba, Hiroshi Takenaga, Masachika Yamazaki, Naoto Oonuma, Kiyoshi Nakamura, Yoshio Sakai, Kenji Yoneda, Naofumi Nakata, Syoji Kasai
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Patent number: 5155671Abstract: A power converter comprising a current-type inverter is disclosed, in which an output of a converter unit is applied as an input to the inverter unit through a DC reactor, and AC power is supplied to a load from the inverter unit. A ripple component of the DC input of the inverter unit is detected, and the switching elements of the inverter unit are controlled by modulation rate if they are to be subjected to PWM control, thus completing a sinusoidal waveform of the output of the inverter unit. Specifically, since the input to the inverter unit is allowed to contain a ripple, the DC reactor is reduced in size. The output of the inverter unit is a sinusoidal AC power containing no high harmonics and therefore the load is free of effects of high harmonics.Type: GrantFiled: March 8, 1990Date of Patent: October 13, 1992Assignees: Hitachi Ltd., Hitachi Elevator Engineering and Service Co., Ltd., Hitachi Engineering Co., Ltd.Inventors: Hiromi Inaba, Kiyoshi Nakamura, Sadao Hokari, Yoshio Sakai, Naoyuki Outi, Takeki Ando, Satoshi Fukuda
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Patent number: 5140389Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacitor portions to be arranged very densely and a sufficiently large capacitance to be maintained with very small cell areas. Since the storage capacitor portions are formed even on the bit lines, the bit lines are shielded, so that the capacitance decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacitor portion so that a part thereof is in the form of a wall substantially vertical to the substrate in order to increase the capacitance.Type: GrantFiled: February 5, 1990Date of Patent: August 18, 1992Assignee: Hitachi, Ltd.Inventors: Shinichiro Kimura, Naotaka Hashimoto, Yoshio Sakai, Tokuo Kure, Yoshifumi Kawamoto, Toru Kaga, Eiji Takeda
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Patent number: 5135097Abstract: An escalator comprises a plurality of treadboards, coupled with each other in the endless form, for conveying people thereon, a driving device for driving the treadboards, which has a driving mechanism, including an electric motor, for transmitting a driving force from the motor to the treadboards and a power converting unit for supplying electric power to the motor. Component devices of the driving device are categorized into two groups in consideration of heat generated in the respective component devices. Component devices, which are categorized into a group of heat generating devices, are installed in a machine room, and component devices, which are categorized into a group of heat sensitive devices, are installed in another machine room. The two machine rooms are arranged in different locations within an escalator frame, which are remote from each other in the direction of the length of the frame.Type: GrantFiled: May 23, 1991Date of Patent: August 4, 1992Assignee: Hitachi, Ltd.Inventors: Chuichi Saito, Yoshio Sakai, Hideaki Takahashi, Kazuhira Ojima, Kazumi Kobune, Hisao Chiba
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Patent number: 5132771Abstract: A semiconductor static random access memory having a high .alpha.-ray immunity and a high packing density is provided which is also capable of high-speed operation. A semiconductor memory device comprises static random access memory cells each including a flip-flop circuit. Storage nodes of each flip-flop circuit have respective pn-junctions formed at regions sandwiched between gate electrodes of first insulated gate field effect transistors and gate electrodes of second insulated gate field effect transistors, respectively. The pn-junction has an area smaller than that of a channel portion of the first or second insulated gate field effect transistor.Type: GrantFiled: April 4, 1990Date of Patent: July 21, 1992Assignees: Hitachi, Ltd., Hitachi VLSI Engineering CorporationInventors: Toshiaki Yamanaka, Naotaka Hashimoto, Takashi Hashimoto, Akihiro Shimizu, Koichiro Ishibashi, Katsuro Sasaki, Katsuhiro Shimohigashi, Eiji Takeda, Yoshio Sakai, Takashi Nishida, Osamu Minato, Toshiaki Masuhara, Shoji Hanamura, Shigeru Honjo, Nobuyuki Moriwaki
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Patent number: 5042620Abstract: A control system for an elevator has a plurality of elevator information generation devices each of which has an information output unit which outputs elevator information to an elevator controller and also to at least one display controller which generates one or more on elevator displays. There are a plurality of display controllers, these are preferably connected to the information output units by a common transmission path. There may be a plurality of elevator controllers, when there are a plurality of elevator cabs, and those elevator controllers may all be connected to the common transmission path. There is then a supervisor controller for controlling the elevator controllers.Type: GrantFiled: September 12, 1989Date of Patent: August 27, 1991Assignee: Hitachi, Ltd.Inventors: Kenzi Yoneda, Yoshio Sakai, Hiroshi Matsumaru, Toshimitsu Tobita, Seiji Yasunobu
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Patent number: 5034797Abstract: A semiconductor device having a CMIS structure for forming a static random access memory is disclosed which device can increase the packing density of the memory and reduce the stand-by power thereof. In this semiconductor device, a first MISFET of a first conductivity type is formed on and a substrate, a second MISFET of a second conductivity type is formed over the first MISFET with a first insulating film therebetween to form a stacked CMIS structure. The second MISFET is made up of a first conductive film, a second insulating film and a second conductive film, with the source, drain and channel regions of the second MISFET being formed in the first conductive film. A first resistive drain region is formed between the channel and drain regions of the first conductive film so that an impurity of the second conductivity type is contained in the first resistive drain region at a lower concentration than in the drain region, or the first resistive drain region is substantially undoped.Type: GrantFiled: March 22, 1990Date of Patent: July 23, 1991Assignee: Hitachi, Ltd.Inventors: Toshiaki Yamanaka, Yoshio Sakai, Takashi Hashimoto, Takashi Nishida, Satoshi Meguro, Shuji Ikeda, Eiji Takeda
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Patent number: 5028975Abstract: Disclosed is an MOSIC including a plurality of silicon gate type MOSFET's in which, after polycrystalline silicon wirings are formed simultaneously with polycrystalline silicon gates, the electrodes contacted with the source and drain regions are made of polycrystalline silicon so as to be connected to the polycrystalline silicon wirings, thereby to prevent the shallow pn junctions of the source and drain regions from being destroyed by the contacts and to provide a high degree of integration to one silicon chip.Type: GrantFiled: May 23, 1990Date of Patent: July 2, 1991Assignee: Hitachi, Ltd.Inventors: Kouichi Nagasawa, Yoshio Sakai, Osamu Minato, Toshiaki Masuhara, Satoshi Meguro
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Patent number: 5025896Abstract: An elevator car and a counterweight is suspended on a sheave by means of a rope in a well-rope faashion. In dependence on the number of passengers on the car, the sheave is applied with an unbalance torque making appearance between the car and counterweight. Upon starting of the elevator operation by releasing a brake, upward or backward bouncing of the car takes place due to the unbalance torque. For preventing such bouncing of the car, a start compensation is performed by generating a motor torque which can cancel out the unbalance torque in precedence to the releasing of the brake. The brake is installed swingably on a winding equipment. Displacement of the brake during actuation thereof indicates the presence of the unbalance torque.Type: GrantFiled: March 14, 1989Date of Patent: June 25, 1991Assignee: Hitachi, Ltd.Inventors: Noboru Arabori, Hideaki Takahashi, Yoshio Sakai, Masao Nakazato, Masakatsu Tanaka, Tatsuhiko Takahashi, Katsutaro Masuda, Masanobu Itoh, Yuji Toda
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Patent number: 4995479Abstract: The present invention relates to a display guide apparatus of elevator facilitating alteration of display format and to its display method. A display guide apparatus according to the present invention comprises an elevator control unit, an information producing unit, and an information display control unit. The information display control unit is so configured that an auxiliary memory medium, which has stored therein information required for displaying the running information of the elevator, may be mounted thereon. At least information required for displaying the running information of the elevator is supplied from the auxiliary memory medium. Information required for displaying general information is supplied from the information producing unit. On the basis of information relating to the running situation of the elevator supplied from the elevator contorl unit, the running information of the elevator and the general information are displayed by display units disposed at least at halls to perform guidance.Type: GrantFiled: March 6, 1989Date of Patent: February 26, 1991Assignee: Hitachi, Ltd.Inventors: Michio Fujiwara, Hiroshi Matsumaru, Yasushi Kobayashi, Yoshio Sakai, Kenzi Yoneda, Osamu Dohi, Akihiko Noguchi
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Patent number: 4982815Abstract: An elevator apparatus includes an electric motor for driving the elevator apparatus, an elevator cage adapted to be lifted or lowered by the electric motor, a brake device for holding and retaining an elevator driving system, including the electric motor, and a malfunction detecting device responsive to the application of a torque to a retainer section of the brake device during the lifting or lowering of the elevator cage.Type: GrantFiled: November 7, 1989Date of Patent: January 8, 1991Assignee: Hitachi, Ltd.Inventors: Noboru Arabori, Hideaki Takahashi, Yoshio Sakai, Tsutomu Sano, Masao Nakazato, Masakatsu Tanaka, Katutaro Masuda, Mitsuo Saito, Yuji Toda
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Patent number: 4970564Abstract: A semiconductor memory device having STC cells wherein major portions of active regions consisting of channel-forming portions are tilted at an angle of 45.degree. with respect to the word lines and the bit lines that meet at right angles with each other, enabling the storage capacity portions to be arranged very densely and sufficiently large capacities to be maintained with very small cell areas. In the semiconductor memory device, furthermore, the storage capacity portions are formed even on the bit lines. Therefore, the bit lines are shielded, the capacitance between the bit lines decreases, and the memory array noise decreases.Type: GrantFiled: December 21, 1988Date of Patent: November 13, 1990Assignee: Hitachi, Ltd.Inventors: Shinichiro Kimura, Naotaka Hashimoto, Yoshio Sakai, Tokuo Kure, Yoshifumi Kawamoto
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Patent number: 4955253Abstract: A control mechanism having a dial and cooperating structure for selectively locking the dial in any one of a plurality of angularly related positions. The locking mechanism is configured to provide a force or manipulating characteristic precluding operation thereof by accident or by young children, such as infants, thereby effectively precluding undesired resetting of the associated control mechanism. The locking structure is formed integrally with the respective relatively movable parts of the mechanism, including the structure for providing the biasing of the locking mechanism to the locking disposition. The locking mechanism is resiliently biased and includes a graspable portion which when grasped to effect movement of the control overcomes the resilient biasing. The biasing structure automatically relocks the dial upon release of the graspable portion.Type: GrantFiled: August 26, 1986Date of Patent: September 11, 1990Assignees: HTC Co., Ltd, Totoku Electric Co., Ltd.Inventors: Yoshio Sakai, Takeshi Yamada
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Patent number: 4907058Abstract: A CMOSLSI is disclosed which includes a semiconductor body, a first N-well region formed in the semiconductor body, a second N-well region, a greater part of which is formed in the first N-well region, a first P-well region formed in the semi-conductor body, a second P-well region, a greater part of which is formed in the first P-well region, a P-channel MOS transistor formed in the second N-well region, and an N-channel MOS transistor formed in the second P-well region, to reduce the distance between the P-channel MOS transistor and the N-channel MOS transistor, thereby increasing the packing density of the CMOSLSI.Type: GrantFiled: July 1, 1988Date of Patent: March 6, 1990Assignee: Hitachi, Ltd.Inventor: Yoshio Sakai