Abstract: A semiconductor device has a substrate having electrode pads, a first semiconductor chip mounted on the substrate with a first adhesion layer interposed therebetween, a second semiconductor chip mounted on the first semiconductor chip with a second adhesion layer interposed therebetween and having electrode pads on the upper surface thereof, wires for bonding the electrode pads of the substrate and the electrode pads of the second semiconductor chip to each other, and a mold resin sealing therein the first and second semiconductor chips and the wires. The peripheral edge portion of the first adhesion layer is protruding outwardly from the first semiconductor chip and the peripheral edge portion of the second semiconductor chip is protruding outwardly beyond the peripheral edge portion of the first semiconductor chip.

Abstract: A semiconductor device has a substrate having electrode pads, a first semiconductor chip mounted on the substrate with a first adhesion layer interposed therebetween, a second semiconductor chip mounted on the first semiconductor chip with a second adhesion layer interposed therebetween and having electrode pads on the upper surface thereof, wires for bonding the electrode pads of the substrate and the electrode pads of the second semiconductor chip to each other, and a mold resin sealing therein the first and second semiconductor chips and the wires. The peripheral edge portion of the first adhesion layer is protruding outwardly from the first semiconductor chip and the peripheral edge portion of the second semiconductor chip is protruding outwardly beyond the peripheral edge portion of the first semiconductor chip.

Abstract: A semiconductor chip is mounted on a first surface of a substrate, the substrate having wiring formed on the first surface, so that a circuit formation surface of the semiconductor chip faces the first surface of the substrate and that electrodes provided on the circuit formation surface are connected with the wiring. A sealing resin layer is then formed on the first surface of the substrate to cover the semiconductor chip. The sealing resin layer and the semiconductor chip are ground starting from a surface opposite to the circuit formation surface to thin the semiconductor chip.

Abstract: A semiconductor chip is mounted on a first surface of a substrate, the substrate having wiring formed on the first surface, so that a circuit formation surface of the semiconductor chip faces the first surface of the substrate and that electrodes provided on the circuit formation surface are connected with the wiring. A sealing resin layer is then formed on the first surface of the substrate to cover the semiconductor chip. The sealing resin layer and the semiconductor chip are ground starting from a surface opposite to the circuit formation surface to thin the semiconductor chip.

Abstract: A method of accurately calibrating a movement control system of mark recognition means in a chip mounting device, comprising the steps of: recognizing a first recognition mark put on a head (2) and a second recognition mark (13) put on a stage (26) with two-field recognition means (7) so as to calibrate and update the preceding control parameters inputted into the movement control system of the two-field recognition means (7); and, with the head (2) lowered to position the first recognition mark closely to the second recognition mark (13), recognizing both marks with third recognition means (20) when the two-field recognition means (7) is moved back so as to calibrate and update the preceding control parameters inputted into the movement control system of the two-field recognition means (7).

Abstract: A method accurately calibrating a movement control system of mark recognition in a chip mounting device, comprising the steps of: recognizing a first recognition mark put on a head (2) and a second recognition mark (13) put on a stage (26) with two-field recognition means (7) so as to calibrate and update the preceding control parameters inputted into the movement control system of the two-field recognition means (7); and, with the head (2) lowered to position the first recognition mark closely to the second recognition mark (13), recognizing both marks with third recognition means (20) when the two-field recognition means (7) is moved back so as to calibrate and update the preceding control parameters inputted into the movement control system of the two-field recognition means (7).

Abstract: A stacked chip semiconductor device including: a substrate having electrode pads; a first semiconductor chip that is flip-chip-packaged on the substrate via a first adhesive layer; a second semiconductor chip that is mounted on an upper part of the first semiconductor chip and that has electrode pads; wires for electrically connecting the electrode pads of the second semiconductor chip and the electrode pads of the substrate; and a molded resin for encapsulating the first semiconductor chip, the second semiconductor chip and the wires, the first adhesive layer forming a fillet at the periphery of the first semiconductor chip. The first semiconductor chip is disposed with its central axis being offset from a central axis of the substrate, the offset being provided so that the first semiconductor chip is shifted toward a side opposite to a side where the fillet has a maximum length from the periphery of the first semiconductor chip.

Abstract: A compact type large capacity titanium electrolytic capacitor with minimized leakage current is provided which takes advantage of a stable complextitanium oxide film having a large surface dielectric constant formed on a titanium substrate.

Abstract: An alignment device comprising a movable table, a plurality of movable support means for movably supporting the movable table, means for reading a recognition mark, and a control means for controlling the drive of the movable support means based on information from the recognition means, wherein each movable support means comprises means having a pair of support blocks each provided to be able to contact/separate with/from the movable table and a pair of piezoelectric actuators each provided with expansible first, second and third piezoelectric elements connected to a support block and extending in each direction, and being capable of walking operation relative to the movable table by the operations of the respective piezoelectric actuators. An alignment accuracy up to a nanometer level can be attained, and the alignment device itself and therefore the entire apparatus incorporating the alignment device can be significantly reduced in thickness and size.

Abstract: A ceramic holder 2 is mounted on the lower end of a connecting block 30 of metal mounted on the lower end of a tool main body 1 of metal, such ceramic holder 2, a ceramic heater 4 and a ceramic presser 5 being sintered. In addition) the coefficient of linear expansion of the ceramic holder 2 is approximately equal to those of the ceramic heater 4 and ceramic presser 5; furthermore, the thermal conductivities of the ceramic holder 2 and ceramic presser 5 are greater as the pressure side of the ceramic presser 5 as seen from the ceramic heater 4 is approached and are smaller as the attaching surface side of the ceramic holder 2 is approached.

Abstract: A chip mounting device comprising a first recognition means (3) for recognizing a first recognition mark (5) on the upper chip-retainable head (2) side, a second recognition means (4) for recognizing a second recognition mark (6) on the lower substrate-retainable stage (1) side, a third recognition means (18) for recognizing the recognition marks (5, 6) concurrently when the first recognition mark (5) is brought close to or into contact with the second recognition mark (6), and a temperature detection means (17) attached to the first recognition means (3) or the second recognition means (4), wherein calibration is carried out based on the recognition of the recognition marks when the temperature detection means (17) detects a beyond-allowance temperature change, whereby permitting a high-accuracy, efficient calibration independently of mechanical deformation and temperature change in environmental atmosphere.

Abstract: A semiconductor device has a substrate having electrode pads, a first semiconductor chip mounted on the substrate with a first adhesion layer interposed therebetween, a second semiconductor chip mounted on the first semiconductor chip with a second adhesion layer interposed therebetween and having electrode pads on the upper surface thereof, wires for bonding the electrode pads of the substrate and the electrode pads of the second semiconductor chip to each other, and a mold resin sealing therein the first and second semiconductor chips and the wires. The peripheral edge portion of the first adhesion layer is protruding outwardly from the first semiconductor chip and the peripheral edge portion of the second semiconductor chip is protruding outwardly beyond the peripheral edge portion of the first semiconductor chip.

Abstract: A semiconductor device with excellent heat dissipation characteristics that can achieve a high reliability when mounted in electronic equipment such as a cellular phone or the like and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of semiconductor chips mounted on the substrate by stacking one on top of another, and an encapsulation resin layer made of encapsulation resin. Among the plurality of semiconductor chips, a first semiconductor chip as an uppermost semiconductor chip is mounted with a surface thereof on which a circuit is formed facing toward the substrate, and the encapsulation resin layer is formed so that at least a surface of the first semiconductor chip opposite to the surface on which the circuit is formed and a part of side surfaces of the first semiconductor chip are exposed to the outside of the encapsulation resin layer.

Abstract: A chip mounting device comprising a first recognition means (3) for recognizing a first recognition mark (5) on the upper chip-retainable head (2) side, a second recognition means (4) for recognizing a second recognition mark (6) on the lower substrate-retainable stage (1) side, a third recognition means (18) for recognizing the recognition marks (5, 6) concurrently when the first recognition mark (5) is brought close to or into contact with the second recognition mark (6), and a temperature detection means (17) attached to the first recognition means (3) or the second recognition means (4), wherein calibration is carried out based on the recognition of the recognition marks when the temperature detection means (17) detects a beyond-allowance temperature change, whereby permitting a high-accuracy, efficient calibration independently of mechanical deformation and temperature change in environmental atmosphere.

Abstract: Disclosed is a treating method of a resin composition comprising: kneading a resin composition comprising a thermoplastic resin, 0 to 0.7 part by weight, based on 1 part by weight of the thermoplastic resin, of a treating agent having a capacity of hydrogenating a halogen and a halide, at 280 to 450° C., in the presence of a metal compound which combines with a halogen atom to generate a metal halide compound having a boiling point or sublimation point not greater than 450° C. at atmospheric pressure, to thereby convert the halide into a metal halide; and separating and collecting, from the resin composition, each of a mixture of the thermoplastic resin and the treating agent having a capacity of hydrogenating a halogen, and the metal halide. This makes it possible to treat a waste without conducting gasification or liquefaction of a resin by combustion or thermal decomposition, thereby removing and collecting the halogen such as bromine and the metal oxide therefrom in a high yield in a short time.

Abstract: A semiconductor chip is mounted on a first surface of a substrate, the substrate having wiring formed on the first surface, so that a circuit formation surface of the semiconductor chip faces the first surface of the substrate and that electrodes provided on the circuit formation surface are connected with the wiring. A sealing resin layer is then formed on the first surface of the substrate to cover the semiconductor chip. The sealing resin layer and the semiconductor chip are ground starting from a surface opposite to the circuit formation surface to thin the semiconductor chip.

Abstract: An alignment device comprising a movable table, a plurality of movable support means for movably supporting the movable table, means for reading a recognition mark, and a control means for controlling the drive of the movable support means based on information from the recognition means, wherein each movable support means comprises means having a pair of support blocks each provided to be able to contact/separate with/from the movable table and a pair of piezoelectric actuators each provided with expansible first, second and third piezoelectric elements connected to a support block and extending in each direction, and being capable of walking operation relative to the movable table by the operations of the respective piezoelectric actuators. An alignment accuracy up to a nanometer level can be attained, and the alignment device itself and therefore the entire apparatus incorporating the alignment device can be significantly reduced in thickness and size.

Abstract: A method and an apparatus for mounting: the method for bonding a plurality of objects to each other, comprising the steps of disposing, apart from each other, a first object, a second object and a holding means therefor, and a backup member having a reference positioning surface in this order, adjusting the parallelism of the second object or the holding means therefor relative to the reference positioning surface, adjusting the parallelism of the first object or the holding means therefor relative to the second object or the holding means therefor, bringing the first object into contact with the second object to temporarily bond both objects to each other, bringing the holding means for the second object into contact with the reference positioning surface of the backup member, and pressing both objects against each other for final bonding, whereby, finally, a highly reliable and accurate bonding state can be achieved.

Abstract: A semiconductor chip is mounted on a first surface of a substrate, the substrate having wiring formed on the first surface, so that a circuit formation surface of the semiconductor chip faces the first surface of the substrate and that electrodes provided on the circuit formation surface are connected with the wiring. A sealing resin layer is then formed on the first surface of the substrate to cover the semiconductor chip. The sealing resin layer and the semiconductor chip are ground starting from a surface opposite to the circuit formation surface to thin the semiconductor chip.

Abstract: A chip-mounting device comprises a chip-holding tool and a substrate-holding stage. At least one of the chip-holding tool and the substrate-holding stage is placed on a coarse adjustment table for coarse positioning of a chip or a substrate. Brake means for fixing the positioned coarse adjustment table is provided on the coarse adjustment table. Fine adjustment means for fine positioning of a chip or a substrate is provided on the coarse adjustment table. The chip-mounting device allows alignment with submicorn accuracy to be performed quickly, shortening tact time in chip mounting remarkably.