Patents by Inventor Yoshiyuki Harada
Yoshiyuki Harada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160043183Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.Type: ApplicationFiled: October 23, 2015Publication date: February 11, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Yoshiyuki HARADA, Toshiki HIKOSAKA, Hisashi YOSHIDA, Hung HUNG, Naoharu SUGIYAMA, Shinya NUNOUE
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Publication number: 20160035938Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.Type: ApplicationFiled: October 15, 2015Publication date: February 4, 2016Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE
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Patent number: 9239974Abstract: An information processing apparatus for customizing a printer driver includes a receiving unit, a detection unit, and a notification unit. The receiving unit receives a fixing instruction to fix a specific setting item on the printer driver at a specific setting through operation input from an operator. The detection unit detects a setting that is a setting of a different setting item from the specific setting item and that is in a prohibited relationship with the specific setting as a corresponding prohibited setting resulting from the fixing instruction. The notification unit notifies the operator of the corresponding prohibited setting detected by the detection unit.Type: GrantFiled: July 17, 2013Date of Patent: January 19, 2016Assignee: KONICA MINOLTA, INC.Inventors: Tatsuo Edamatsu, Ryuichi Miyashita, Yoshiyuki Harada
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Patent number: 9202873Abstract: According to one embodiment, a semiconductor wafer includes a substrate, an AlN buffer layer, a foundation layer, a first high Ga composition layer, a high Al composition layer, a low Al composition layer, an intermediate unit and a second high Ga composition layer. The first layer is provided on the foundation layer. The high Al composition layer is provided on the first layer. The low Al composition layer is provided on the high Al composition layer. The intermediate unit is provided on the low Al composition layer. The second layer is provided on the intermediate unit. The first layer has a first tensile strain and the second layer has a second tensile strain larger than the first tensile strain. Alternatively, the first layer has a first compressive strain and the second layer has a second compressive strain smaller than the first compressive strain.Type: GrantFiled: April 23, 2013Date of Patent: December 1, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiyuki Harada, Toshiki Hikosaka, Hisashi Yoshida, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
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Patent number: 9196786Abstract: According to one embodiment, a semiconductor light emitting element includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer and a light emitting layer. The p-type semiconductor layer includes a first p-side layer of Alx1Ga1?x1N (0?x1<1) including Mg, a second p-side layer of Alx2Ga1?x2N (0<x2<1) including Mg and a third p-side layer of Alx3Ga1?x3N (x2<x3<1) including Mg. The light emitting layer is provided between the n-type semiconductor layer and the second p-side layer. The light emitting layer includes barrier layers and well layers. Each of the well layers is provided between the barrier layers. A p-side barrier layer of the barrier layers most proximal to the second p-side layer includes a first layer of Alz1Ga1?z1N (0?z1), and a second layer of Alz2Ga1?z2N (z1<z2<x2).Type: GrantFiled: December 12, 2013Date of Patent: November 24, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Shigeya Kimura, Yoshiyuki Harada, Shinya Nunoue
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Patent number: 9190559Abstract: According to an embodiment, a semiconductor light emitting device includes a foundation layer, a first semiconductor layer, a light emitting layer, and a second semiconductor layer. The foundation layer has an unevenness having recesses, side portions, and protrusions. A first major surface of the foundation layer has an overlay-region. The foundation layer has a plurality of dislocations including first dislocations whose one ends reaching the recess and second dislocations whose one ends reaching the protrusion. A proportion of a number of the second dislocations reaching the first major surface to a number of all of the second dislocations is smaller than a proportion of a number of the first dislocations reaching the first major surface to a number of all of the first dislocations. A number of the dislocations reaching the overlay-region of the first major surface is smaller than a number of all of the first dislocations.Type: GrantFiled: June 10, 2014Date of Patent: November 17, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
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Publication number: 20150324157Abstract: A printer driver which operates in a computer device issuing an instruction of printing to a printing device, and executes a prohibition process in a script language for verifying and solving prohibition that causes conflict between settings of printing functions of the printing device, under the printer driver, the computer device executes: a first process that calculates identity determination information beforehand from PrintTicket in a state where prohibition is not caused, and stores the calculated identity determination information; a second process that calculates identity determination information from the PrintTicket at a start of the prohibition process for the PrintTicket; and a third process that compares the identity determination information stored in the first process and the identity determination information calculated in the second process, wherein the first process through the third process are performed in this order.Type: ApplicationFiled: April 23, 2015Publication date: November 12, 2015Applicant: KONICA MINOLTA, INC.Inventor: Yoshiyuki HARADA
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Publication number: 20150324667Abstract: A non-transitory computer-readable storage medium storing a printer driver includes a printer driver core component and a print setup user interface component. The print setup user interface component causes the computing device to control a display section to display one or more setup user interface portions by determining whether a setup user interface portion designated by designation information obtained from the printer driver core component is implemented in the print setup user interface component; in response to determining that the designated setup user interface portion is not implemented, searching for a compatible setup user interface portion; and in response to determining that the designated or compatible setup user interface portion is implemented, controlling the display section to display the designated or compatible setup user interface portion.Type: ApplicationFiled: May 6, 2015Publication date: November 12, 2015Applicant: KONICA MINOLTA, INC.Inventor: Yoshiyuki Harada
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Publication number: 20150324158Abstract: A non-transitory computer-readable storage medium storing a printer driver, when being executed by a processor of the computing device, causes a computing device to perform prohibition processing including: obtaining setup items associated with print features of the printer device and corresponding option values from PrintTicket, to create check data; checking the check data for a setup item causing a conflict between option values; and in response to finding a setup item causing a conflict between option values, replacing an option value in the PrintTicket, which is set for the setup item causing the conflict, with another option value.Type: ApplicationFiled: May 6, 2015Publication date: November 12, 2015Applicant: Konica Minolta, Inc.Inventor: Yoshiyuki Harada
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SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE
Publication number: 20150318435Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.Type: ApplicationFiled: July 13, 2015Publication date: November 5, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hajime NAGO, Yoshiyuki HARADA, Shigeya KIMURA, Hisashi YOSHIDA, Shinya NUNOUE -
Publication number: 20150303825Abstract: An operation area of a motor is increased without increasing the capacity of a switching element. A current limiter which limits a current flowing in switching elements to prevent the current from exceeding a predetermined current limit value is provided. A current limit value controller which decreases the current limit value if a loss generated in the switching elements increases at a same current value, and increases the current limit value if the loss decreases at a same current value, is provided.Type: ApplicationFiled: October 11, 2013Publication date: October 22, 2015Applicant: DAIKIN INDUSTRIES, LTD.Inventors: Yoshiyuki Harada, Toshiyuki Maeda
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Publication number: 20150287589Abstract: According to one embodiment, a semiconductor device includes a functional layer of a nitride semiconductor. The functional layer is provided on a nitride semiconductor layer including a first stacked multilayer structure provided on a substrate. The first stacked multilayer structure includes a first lower layer, a first intermediate layer, and a first upper layer. The first lower layer contains Si with a first concentration and has a first thickness. The first intermediate layer is provided on the first lower layer to be in contact with the first lower layer, contains Si with a second concentration lower than the first concentration, and has a second thickness thicker than the first thickness. The first upper layer is provided on the first intermediate layer to be in contact with the first intermediate layer, contains Si with a third concentration lower than the second concentration, and has a third thickness.Type: ApplicationFiled: June 19, 2015Publication date: October 8, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Hung HUNG, Naoharu SUGIYAMA, Hisashi YOSHIDA, Toshiki HIKOSAKA, Yoshiyuki HARADA, Shinya NUNOUE
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Patent number: 9130069Abstract: According to one embodiment, a method is disclosed for manufacturing a nitride semiconductor layer. The method can include forming a first nitride semiconductor layer on a substrate in a reactor supplied with a first carrier gas and a first source gas. The first nitride semiconductor layer includes indium. The first carrier gas includes hydrogen supplied into the reactor at a first flow rate and includes nitrogen supplied into the reactor at a second flow rate. The first source gas includes indium and nitrogen and supplied into the reactor at a third flow rate. The first flow rate is not less than 0.07% and not more than 0.15% of a sum of the first flow rate, the second flow rate, and the third flow rate.Type: GrantFiled: March 13, 2013Date of Patent: September 8, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Yoshiyuki Harada, Hisashi Yoshida, Shigeya Kimura, Shinya Nunoue
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Patent number: 9123831Abstract: According to one embodiment, a semiconductor device includes a functional layer of a nitride semiconductor. The functional layer is provided on a nitride semiconductor layer including a first stacked multilayer structure provided on a substrate. The first stacked multilayer structure includes a first lower layer, a first intermediate layer, and a first upper layer. The first lower layer contains Si with a first concentration and has a first thickness. The first intermediate layer is provided on the first lower layer to be in contact with the first lower layer, contains Si with a second concentration lower than the first concentration, and has a second thickness thicker than the first thickness. The first upper layer is provided on the first intermediate layer to be in contact with the first intermediate layer, contains Si with a third concentration lower than the second concentration, and has a third thickness.Type: GrantFiled: February 28, 2013Date of Patent: September 1, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hung Hung, Naoharu Sugiyama, Hisashi Yoshida, Toshiki Hikosaka, Yoshiyuki Harada, Shinya Nunoue
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Publication number: 20150236200Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.Type: ApplicationFiled: May 1, 2015Publication date: August 20, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Maki SUGAI, Shinya NUNOUE
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Semiconductor light emitting device and method for manufacturing semiconductor light emitting device
Patent number: 9112111Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting layer. The p-type semiconductor layer includes a first p-side layer, a second p-side layer, and a third p-side layer. A concentration profile of Mg of a p-side region includes a first portion, a second portion, a third portion, a fourth portion, a fifth portion, a sixth portion and a seventh portion. The p-side region includes the light emitting layer, the second p-side layer, and the third p-side layer. A Mg concentration of the sixth portion is not less than 1×1020 cm?3 and not more than 3×1020 cm?3. The Al concentration is 1/100 of the maximum value at a second position. A Mg concentration at the second position is not less than 2×1018 cm?3.Type: GrantFiled: December 2, 2013Date of Patent: August 18, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Yoshiyuki Harada, Shigeya Kimura, Hisashi Yoshida, Shinya Nunoue -
Publication number: 20150228851Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.Type: ApplicationFiled: April 24, 2015Publication date: August 13, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shigeya KIMURA, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
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Publication number: 20150221728Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.Type: ApplicationFiled: April 16, 2015Publication date: August 6, 2015Applicant: Kabushiki Kaisha ToshibaInventors: Toshiki HIKOSAKA, Yoshiyuki HARADA, Hisashi YOSHIDA, Naoharu SUGIYAMA, Shinya NUNOUE
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Patent number: 9064997Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type and having a major surface, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first and second semiconductor layers. The major surface is opposite to the light emitting layer. The first semiconductor layer has structural bodies provided in the major surface. The structural bodies are recess or protrusion. A centroid of a first structural body aligns with a centroid of a second structural body nearest the first structural. hb, rb, and Rb satisfy rb/(2·hb)?0.7, and rb/Rb<1, where hb is a depth of the recess, rb is a width of a bottom portion of the recess, and Rb is a width of the protrusion.Type: GrantFiled: July 14, 2014Date of Patent: June 23, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki Hikosaka, Yoshiyuki Harada, Maki Sugai, Shinya Nunoue
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Patent number: 9054036Abstract: According to one embodiment, a nitride semiconductor device includes a stacked body and a functional layer. The stacked body includes an AlGaN layer of AlxGa1-xN (0<x?1), a first Si-containing layer, a first GaN layer, a second Si-containing layer, and a second GaN layer. The first Si-containing layer contacts an upper surface of the AlGaN layer. The first Si-containing layer contains Si at a concentration not less than 7×1019/cm3 and not more than 4×1020/cm3. The first GaN layer is provided on the first Si-containing layer. The first GaN layer includes a protrusion having an oblique surface tilted with respect to the upper surface. The second Si-containing layer is provided on the first GaN layer. The second Si-containing layer contains Si. The second GaN layer is provided on the second Si-containing layer. The functional layer is provided on the stacked body. The functional layer includes a nitride semiconductor.Type: GrantFiled: February 28, 2013Date of Patent: June 9, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Hikosaka, Yoshiyuki Harada, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue