Patents by Inventor Yosuke Takeuchi
Yosuke Takeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180124920Abstract: A flexible substrate having a branch structure in the related art has problems in that: adhesive strength after two bodies are folded and fixed at a bonding region decreases due to an unfolding and opening force at a curve portion and ends of the bonded portions are peeled off and generate gaps; and in a soldering process of the two bodies, the electrodes of one body soldered first are displaced due to reheating in soldering the other body secondly and deteriorate in soldered connection. The present invention provides a new flexible substrate having a branch structure, including first and second bodies joined together, and having a structure in which one of the bodies can be folded back in a longitudinal direction of the whole flexible substrate. Tip ends of the two bodies are provided with multiple electrodes, and are connected by soldering to approximately corresponding positions on both surfaces of an end portion of a printed substrate concerned.Type: ApplicationFiled: March 17, 2016Publication date: May 3, 2018Inventors: Kazumasa YOSHIDA, Toshiyuki OZAWA, Teruaki SATO, Atsushi TOMITA, Yosuke TAKEUCHI, Shinji MINO, Yusuke NASU
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Publication number: 20180053804Abstract: An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes an n?-type semiconductor region formed in a p-type well, an n-type semiconductor region formed closer to a main surface of a semiconductor substrate than the n?-type semiconductor region, and a p?-type semiconductor region formed between the n?-type semiconductor region and the n-type semiconductor region. A net impurity concentration in the n?-type semiconductor region is lower than a net impurity concentration in the n-type semiconductor region. A net impurity concentration in the p?-type semiconductor region is lower than a net impurity concentration in the p-type well.Type: ApplicationFiled: November 3, 2017Publication date: February 22, 2018Applicant: Renesas Electronics CorporationInventors: Yosuke TAKEUCHI, Tatsuya KUNIKIYO
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Publication number: 20180013240Abstract: An electrical connector with a shielding plate in which signal terminals and ground terminals supported by insulating members are arranged in an intermixed order, signal terminals have at least a portion in the longitudinal direction thereof covered by a shielding plate, and respective contact portions formed in free end portions at the front ends of the signal terminals and ground terminals are subject to contact pressure applied by the corresponding counterpart terminals to one side of said contact portions, thereby resulting in resilient flexure, wherein in the shielding plate, at positions corresponding to the ground terminals in the direction of terminal array, there are provided grounding strips parallel to said ground terminals, said grounding strips extend forward and, at least in a state of contact between the ground terminals and counterpart terminals, the other side of the ground terminals is in contact with and supported by the grounding strips.Type: ApplicationFiled: July 10, 2017Publication date: January 11, 2018Inventor: Yosuke TAKEUCHI
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Publication number: 20170358885Abstract: Example implementations involve an electrical connector and a test method of the electrical connector, wherein the electrical conduction condition between a ground member and a ground terminal can be easily confirmed while reliably contacting the ground member and ground terminal. Electrical connector involves a plurality of terminals including two types of terminals, namely, signal terminals and ground terminals; a retaining body, made of an insulating material, that arranges and retains the plurality of terminals in a condition where the signal terminals and ground terminals are intermingled; and a ground member retained by the retaining body on the inward side of the retaining body, in a condition contacting at least two ground terminals; wherein the ground member has a detecting part exposed from the retaining body in order to detect an electrical conduction condition between the ground terminals and the ground member.Type: ApplicationFiled: June 12, 2017Publication date: December 14, 2017Inventors: Takeshi OKUYAMA, Yosuke TAKEUCHI
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Patent number: 9837460Abstract: An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes an n?-type semiconductor region formed in a p-type well, an n-type semiconductor region formed closer to a main surface of a semiconductor substrate than the n?-type semiconductor region, and a p?-type semiconductor region formed between the n?-type semiconductor region and the n-type semiconductor region. A net impurity concentration in the n?-type semiconductor region is lower than a net impurity concentration in the n-type semiconductor region. A net impurity concentration in the p?-type semiconductor region is lower than a net impurity concentration in the p-type well.Type: GrantFiled: November 29, 2016Date of Patent: December 5, 2017Assignee: Renesas Electronics CorporationInventors: Yosuke Takeuchi, Tatsuya Kunikiyo
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Publication number: 20170345842Abstract: A semiconductor device includes a semiconductor substrate, an element isolation film, and a fin having side surfaces facing each other in a first direction of an upper surface and a main surface connecting the facing side surfaces and extending in a second direction orthogonal to the first direction. The device further includes a control gate electrode arranged over the side surface via a gate insulation film and extending in the first direction, and a memory gate electrode arranged over the side surface via another gate insulation film having a charge accumulation layer and extending in the first direction. Furthermore, an overlap length by which the memory gate electrode overlaps with the side surface is smaller than an overlap length by which the control gate electrode overlaps with the side surface in the direction orthogonal to the upper surface.Type: ApplicationFiled: August 21, 2017Publication date: November 30, 2017Inventors: Yosuke TAKEUCHI, Eiji TSUKUDA, Kenichiro SONODA, Shibun TSUDA
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Patent number: 9780109Abstract: A semiconductor device includes a semiconductor substrate, an element isolation film, and a fin having side surfaces facing each other in a first direction of an upper surface and a main surface connecting the facing side surfaces and extending in a second direction orthogonal to the first direction. The device further includes a control gate electrode arranged over the side surface via a gate insulation film and extending in the first direction, and a memory gate electrode arranged over the side surface via another gate insulation film having a charge accumulation layer and extending in the first direction. Furthermore, an overlap length by which the memory gate electrode overlaps with the side surface is smaller than an overlap length by which the control gate electrode overlaps with the side surface in the direction orthogonal to the upper surface.Type: GrantFiled: September 14, 2016Date of Patent: October 3, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yosuke Takeuchi, Eiji Tsukuda, Kenichiro Sonoda, Shibun Tsuda
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Publication number: 20170186804Abstract: An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes an n?-type semiconductor region formed in a p-type well, an n-type semiconductor region formed closer to a main surface of a semiconductor substrate than the n?-type semiconductor region, and a p?-type semiconductor region formed between the n?-type semiconductor region and the n-type semiconductor region. A net impurity concentration in the n?-type semiconductor region is lower than a net impurity concentration in the n-type semiconductor region. A net impurity concentration in the p?-type semiconductor region is lower than a net impurity concentration in the p-type well.Type: ApplicationFiled: November 29, 2016Publication date: June 29, 2017Applicant: Renesas Electronics CorporationInventors: Yosuke TAKEUCHI, Tatsuya KUNIKIYO
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Publication number: 20170084625Abstract: A semiconductor device includes a semiconductor substrate, an element isolation film, and a fin having side surfaces facing each other in a first direction of an upper surface and a main surface connecting the facing side surfaces and extending in a second direction orthogonal to the first direction. The device further includes a control gate electrode arranged over the side surface via a gate insulation film and extending in the first direction, and a memory gate electrode arranged over the side surface via another gate insulation film having a charge accumulation layer and extending in the first direction. Furthermore, an overlap length by which the memory gate electrode overlaps with the side surface is smaller than an overlap length by which the control gate electrode overlaps with the side surface in the direction orthogonal to the upper surface.Type: ApplicationFiled: September 14, 2016Publication date: March 23, 2017Inventors: Yosuke TAKEUCHI, Eiji TSUKUDA, Kenichiro SONODA, Shibun TSUDA
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Publication number: 20170018700Abstract: In a piezoelectric polymer composite in which piezoelectric particles are dispersed in a polymer matrix, the piezoelectric particles include 5 vol % to 30 vol % of particles having a particle size which is 0.25 times to 1 time a thickness of the piezoelectric polymer composite. As a result, the piezoelectric polymer composite exhibits satisfactory piezoelectric characteristics.Type: ApplicationFiled: September 27, 2016Publication date: January 19, 2017Applicant: FUJIFILM CorporationInventors: Tetsu MIYOSHI, Yosuke TAKEUCHI
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Patent number: 9294826Abstract: A wavelength selection switch system includes a wavelength selection switch including an input port and an output port, a nonvolatile memory in which configuration information for controlling an operation of the wavelength selection switch is stored, a high-speed memory in which reading and writing can be performed at a higher speed than in the nonvolatile memory and that stores a copy of the configuration information stored in the nonvolatile memory, and a control unit that controls an operation of the wavelength selection switch based on the configuration information read from the high-speed memory, wherein the control unit periodically reads the configuration information stored in the nonvolatile memory and writes a copy of the read configuration information to the high-speed memory.Type: GrantFiled: February 5, 2013Date of Patent: March 22, 2016Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Tomoyoshi Kataoka, Mitsunori Fukutoku, Etsu Hashimoto, Akio Sahara, Norio Sato, Yosuke Takeuchi
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Patent number: 9247324Abstract: A wavelength selection switch system includes a wavelength selection switch including an input port and an output port, a nonvolatile memory in which configuration information for controlling an operation of the wavelength selection switch is stored, a high-speed memory in which reading and writing can be performed at a higher speed than in the nonvolatile memory and that stores a copy of the configuration information stored in the nonvolatile memory, and a control unit that controls an operation of the wavelength selection switch based on the configuration information read from the high-speed memory, wherein the control unit periodically reads the configuration information stored in the nonvolatile memory and writes a copy of the read configuration information to the high-speed memory.Type: GrantFiled: February 5, 2013Date of Patent: January 26, 2016Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics CorporationInventors: Tomoyoshi Kataoka, Mitsunori Fukutoku, Etsu Hashimoto, Akio Sahara, Norio Sato, Yosuke Takeuchi
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Publication number: 20150030327Abstract: A wavelength selection switch system includes a wavelength selection switch including an input port and an output port, a nonvolatile memory in which configuration information for controlling an operation of the wavelength selection switch is stored, a high-speed memory in which reading and writing can be performed at a higher speed than in the nonvolatile memory and that stores a copy of the configuration information stored in the nonvolatile memory, and a control unit that controls an operation of the wavelength selection switch based on the configuration information read from the high-speed memory, wherein the control unit periodically reads the configuration information stored in the nonvolatile memory and writes a copy of the read configuration information to the high-speed memory.Type: ApplicationFiled: February 5, 2013Publication date: January 29, 2015Applicants: NIPPON TELEGRAPH AND TELEPHONE CORPORATION, NTT Electronics CorporationInventors: Tomoyoshi Kataoka, Mitsunori Fukutoku, Etsu Hashimoto, Akio Sahara, Norio Sato, Yosuke Takeuchi
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Patent number: 8541935Abstract: A color filter for use in a light-emitting display element which emits at least white light, the color filter including a circularly polarizing layer which includes a polarizing layer, the polarizing layer having an orientation layer and a liquid crystal compound layer, wherein the circularly polarizing layer is formed only in an optical path of the white light.Type: GrantFiled: September 6, 2010Date of Patent: September 24, 2013Assignee: UDC Ireland LimitedInventors: Yosuke Takeuchi, Mitsuyoshi Ichihashi, Shinichi Morishima, Tomoki Tasaka
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Patent number: 8518562Abstract: A magnetic storage device stable in write characteristic is provided. A first nonmagnetic film is provided over a recording layer. A first ferromagnetic film is provided over the first nonmagnetic film and has a first magnetization and a first film thickness. A second nonmagnetic film is provided over the first ferromagnetic film. A second ferromagnetic film is provided over the second nonmagnetic film, is coupled in antiparallel with the first ferromagnetic film, and has a second magnetization and a second film thickness. An antiferromagnetic film is provided over the second ferromagnetic film. The sum of the product of the first magnetization and the first film thickness and the product of the second magnetization and the second film thickness is smaller than the product of the magnetization of the recording layer and the film thickness of the recording layer.Type: GrantFiled: November 12, 2009Date of Patent: August 27, 2013Assignee: Renesas Electronics CorporationInventors: Takashi Takenaga, Takeharu Kuroiwa, Hiroshi Takada, Ryoji Matsuda, Yosuke Takeuchi
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Patent number: 8405172Abstract: A semiconductor device excellent in the magnetic shielding effect of blocking off external magnetic fields is provided. The semiconductor device includes: an interlayer insulating film so formed as to cover a switching element formed over a main surface of a semiconductor substrate; a flat plate-like lead wiring; a coupling wiring coupling the lead wiring and the switching element with each other; and a magnetoresistive element including a magnetization free layer the orientation of magnetization of which is variable and formed over the lead wiring. The semiconductor device has a wiring and another wiring through which the magnetization state of the magnetization free layer can be varied. In a memory cell area where multiple magnetoresistive elements are arranged, a first high permeability film arranged above the magnetoresistive elements is extended from the memory cell area up to a peripheral area that is an area other than the memory cell area.Type: GrantFiled: March 30, 2011Date of Patent: March 26, 2013Assignee: Renesas Electronics CorporationInventors: Mikio Tsujiuchi, Masayoshi Tarutani, Yosuke Takeuchi
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Patent number: 8264023Abstract: A semiconductor device includes a semiconductor substrate, a lower electrode, a magnetoresistive element, an upper electrode, and a protective film. The lower electrode is formed over the semiconductor substrate. The magnetoresistive element includes a fixed layer, a tunneling insulating film, and a free layer. The upper electrode is disposed over the free layer. The protective film covers the sides intersecting the main surfaces of the lower electrode, the fixed layer, the tunneling insulating film, the free layer, and the upper electrode. The fixed layer, whose magnetization direction is fixed, is disposed over the lower electrode. The tunneling insulating film is disposed over the fixed layer. The free layer, whose magnetization direction is variable, is disposed over a main surface of the tunneling insulating film. The width of the upper electrode is smaller than that of each of the lower electrode and the fixed layer.Type: GrantFiled: December 17, 2010Date of Patent: September 11, 2012Assignee: Renesas Electronics CorporationInventors: Yosuke Takeuchi, Masamichi Matsuoka, Ryoji Matsuda, Keisuke Tsukamoto
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Patent number: 8227880Abstract: To provide a semiconductor device capable of write operation to a selected magnetoresistive element without causing a malfunction of a non-selected magnetoresistive element and a manufacturing method of this semiconductor device. The semiconductor device includes a magnetic storage element having a magnetization free layer whose magnetization direction is made variable and formed over a lead interconnect and a digit line located below the magnetic storage element, extending in a first direction, and capable of changing the magnetization state of the magnetization free layer by the magnetic field generated. The digit line includes an interconnect body portion and a cladding layer covering therewith the bottom surface and the side surface of the interconnect body portion and opened upward. The cladding layer includes a sidewall portion covering therewith the side surface of the interconnect body portion and a bottom wall portion covering therewith the bottom surface of the interconnect body portion.Type: GrantFiled: September 2, 2010Date of Patent: July 24, 2012Assignee: Renesas Electronics CorporationInventors: Mikio Tsujiuchi, Yosuke Takeuchi, Kazuyuki Omori, Kenichi Mori
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Publication number: 20120099054Abstract: A color filter for use in a light-emitting display element which emits at least white light, the color filter including a circularly polarizing layer which includes a polarizing layer, the polarizing layer having an orientation layer and a liquid crystal compound layer, wherein the circularly polarizing layer is formed only in an optical path of the white light.Type: ApplicationFiled: September 6, 2010Publication date: April 26, 2012Inventors: Yosuke Takeuchi, Mitsuyoshi Ichihashi, Shinichi Morishima, Tomoki Tasaka
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Publication number: 20110241140Abstract: A semiconductor device excellent in the magnetic shielding effect of blocking off external magnetic fields is provided. The semiconductor device includes: an interlayer insulating film so formed as to cover a switching element formed over a main surface of a semiconductor substrate; a flat plate-like lead wiring; a coupling wiring coupling the lead wiring and the switching element with each other; and a magnetoresistive element including a magnetization free layer the orientation of magnetization of which is variable and formed over the lead wiring. The semiconductor device has a wiring and another wiring through which the magnetization state of the magnetization free layer can be varied. In a memory cell area where multiple magnetoresistive elements are arranged, a first high permeability film arranged above the magnetoresistive elements is extended from the memory cell area up to a peripheral area that is an area other than the memory cell area.Type: ApplicationFiled: March 30, 2011Publication date: October 6, 2011Inventors: Mikio TSUJIUCHI, Masayoshi Tarutani, Yosuke Takeuchi