Abstract: A feature map encoding method according to the present disclosure may include generating a feature map from a multi-level feature group; and performing PCA (Picture Component Analysis) transform for the feature map. Here, generating the feature map comprises reshaping the multi-level feature group; and generating the feature map by merging a plurality of base units generated by the reshape.

Abstract: A semiconductor device may include a color filter array, an optical synapse array including a plurality of light passage paths transferring light incident through the color filter array with independently controlled transmissivities, and an optical-to-digital conversion circuit converting the transferred light through the plurality of light passage paths into digital data.

Abstract: A feature map decoding method according to the present disclosure may include decoding a metadata and the feature map; performing inverse conversion on a decoded feature map; and restoring features from inverse converted features. Here, a feature distortion compensation is performed on at least one of the decoded feature map, the inverse converted features or restored features.

Abstract: A storage device having improved security reliability includes a non-volatile memory, and a storage controller configured to control an operation of the non-volatile memory, generate a key material, receive a key identification (ID) from a firmware, determine whether a salt value matching the key ID is stored in the non-volatile memory, generate a private key using the salt value stored in the non-volatile memory and the key material in response to determining that the salt value matching the key ID is stored in the non-volatile memory, and, in response to determining that the sale value matching the key ID is not stored in the non-volatile memory, receive a salt value from the firmware and generate the private key using the salt value from the firmware and the key material, and store the salt value used for generating the private key in the non-volatile memory.

Abstract: Disclosed herein are a method, an apparatus, and a storage medium for image encoding/decoding. An intra-prediction mode for the target block is derived, and intra-prediction for the target block that uses the derived intra-prediction mode is performed. The intra-prediction mode for the target block is derived using an artificial neural network, and an MPM list for the target block is derived using information about the target block, pieces of information about blocks adjacent to the target block, and the artificial neural network. The artificial neural network outputs one or more available intra-prediction modes. Further, the artificial neural network outputs match probabilities for one or more candidate intra-prediction modes, and each of the match probabilities for the candidate intra-prediction modes indicates a probability that the corresponding candidate intra-prediction mode matches the intra-prediction mode for the target block.

Abstract: The present disclosure relates to an image encoding/decoding method for a machine and a device therefor. An image encoding method according to the present disclosure includes extracting an encoding method feature from an encoding input signal; determining an encoding method that is optimal for the encoding input signal based on the encoding method feature; transforming the encoding input signal based on the encoding method; and encoding an encoding target signal generated by transforming encoding method information and the encoding input signal.

Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.

Abstract: A tantalum capacitor includes a sintered tantalum body including tantalum powder, a conductive polymer layer disposed on the sintered tantalum body and including a first filler, a carbon layer disposed on the conductive polymer layer; and a tantalum body including a tantalum wire penetrating through at least a portion of each of the sintered tantalum body and the conductive polymer layer in a first direction. A ratio of an area of the first filler to an area of the conductive polymer layer is greater than 0.38 in a first cross-section partially overlapping the sintered tantalum body, among cross-sections perpendicular to the first direction.

Abstract: An integrated circuit device includes a lower electrode, an upper electrode, and a dielectric layer structure between the lower electrode and the upper electrode, the dielectric layer structure including a first surface facing the lower electrode and a second surface facing the upper electrode. The dielectric layer structure includes a first dielectric layer including a first dielectric material and a plurality of grains extending from the first surface to the second surface and a second dielectric layer including a second dielectric material and surrounding a portion of a sidewall of each of the plurality of grains of the first dielectric layer in a level lower than the second surface. The second dielectric material includes a material having bandgap energy which is higher than bandgap energy of the first dielectric material.

Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.

Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.

Abstract: A tantalum capacitor includes: first and second surfaces facing in a first direction, third and fourth surfaces facing in a second direction, and fifth and sixth surfaces facing in a third direction; a tantalum body having one surface through which a tantalum wire is exposed in the first direction; and a substrate on which the tantalum body is mounted, wherein the substrate may be an organic-inorganic composite substrate.

Abstract: A tantalum capacitor includes a sintered tantalum body including tantalum powder, a conductive polymer layer disposed on the sintered tantalum body and including a first filler, a carbon layer disposed on the conductive polymer layer; and a tantalum body including a tantalum wire penetrating through at least a portion of each of the sintered tantalum body and the conductive polymer layer in a first direction. A ratio of an area of the first filler to an area of the conductive polymer layer is greater than 0.38 in a first cross-section partially overlapping the sintered tantalum body, among cross-sections perpendicular to the first direction.

Abstract: A method of manufacturing a semiconductor device includes forming a preliminary lower electrode layer on a substrate, the preliminary lower electrode layer including a niobium oxide; converting at least a portion of the preliminary lower electrode layer to a first lower electrode layer comprising a niobium nitride by performing a nitridation process on the preliminary lower electrode layer; forming a dielectric layer on the first lower electrode layer; and forming an upper electrode on the dielectric layer.

Abstract: A tantalum capacitor includes a capacitor body comprising a tantalum body having a tantalum wire and a molded portion; an anodic terminal connected to the tantalum wire and disposed on the first surface of the capacitor body; an anodic connection portion connected to the anodic terminal and disposed on the fifth surface of the capacitor body; a cathodic terminal connected to the tantalum body and disposed on the second surface of the capacitor body; a cathodic connection portion connected to the cathodic terminal and spaced apart from the anodic connection portion on the fifth surface of the capacitor body; and a substrate disposed on the sixth surface of the body and on which the tantalum body is mounted, wherein the anodic terminal and the cathodic terminal are electrically isolated on the substrate.

Abstract: A solid electrolyte capacitor includes a sintered body formed by sintering a molded body containing metal powder; and a conductive polymer layer disposed above the sintered body. A ratio (t2/t1) of a thickness (t2) of the conductive polymer layer in an edge portion of the sintered body to a thickness (t1) of the conductive polymer layer in a central portion of the sintered body satisfies 0.35?t2/t1?0.9.

Abstract: A smart controller with a sensor, according to one embodiment of the present inventive concept, communicates wirelessly with a mobile terminal and has a sensor for providing, to the mobile terminal, biometric information of a user or external environmental information, the smart controller comprising: a body; an input button unit which is arranged on the upper surface or a side surface of the body and which generates a control signal for the mobile terminal by means of operation by the user; a sensor for detecting biometric information of the user or external environmental information; and a control unit which is arranged inside the body and which receives an input of a detection value of the sensor and delivers same to the mobile terminal.

Abstract: A tantalum capacitor includes a capacitor body comprising a tantalum body having a tantalum wire and a molded portion; an anodic terminal connected to the tantalum wire and disposed on the first surface of the capacitor body; an anodic connection portion connected to the anodic terminal and disposed on the fifth surface of the capacitor body; a cathodic terminal connected to the tantalum body and disposed on the second surface of the capacitor body; a cathodic connection portion connected to the cathodic terminal and spaced apart from the anodic connection portion on the fifth surface of the capacitor body; and a substrate disposed on the sixth surface of the body and on which the tantalum body is mounted, wherein the anodic terminal and the cathodic terminal are electrically isolated on the substrate.

Abstract: Provided a semiconductor device comprises, a plurality of semiconductor patterns spaced in a first direction; a plurality of mold insulating layers between the plurality of semiconductor patterns, a plurality of silicide patterns contacting the plurality of semiconductor patterns; and a plurality of first metal conductive films between the plurality of mold insulating layers and connected to each of the silicide patterns, wherein each of the silicide patterns includes a first sidewall that faces the semiconductor pattern, and a second sidewall which faces the first metal conductive film, the first sidewall of the silicide pattern and the second sidewall of the silicide pattern extends in the first direction, and the first sidewall of the silicide pattern and the second sidewall of the silicide pattern are curved surfaces.

Abstract: A tantalum capacitor includes: first and second surfaces facing in a first direction, third and fourth surfaces facing in a second direction, and fifth and sixth surfaces facing in a third direction; a tantalum body having one surface through which a tantalum wire is exposed in the first direction; and a substrate on which the tantalum body is mounted, wherein the substrate may be an organic-inorganic composite substrate.